1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * NCR 5380 generic driver routines. These should make it *trivial*
4*4882a593Smuzhiyun * to implement 5380 SCSI drivers under Linux with a non-trantor
5*4882a593Smuzhiyun * architecture.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Note that these routines also work with NR53c400 family chips.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright 1993, Drew Eckhardt
10*4882a593Smuzhiyun * Visionary Computing
11*4882a593Smuzhiyun * (Unix and Linux consulting and custom programming)
12*4882a593Smuzhiyun * drew@colorado.edu
13*4882a593Smuzhiyun * +1 (303) 666-5836
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * For more information, please consult
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * NCR 5380 Family
18*4882a593Smuzhiyun * SCSI Protocol Controller
19*4882a593Smuzhiyun * Databook
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * NCR Microelectronics
22*4882a593Smuzhiyun * 1635 Aeroplaza Drive
23*4882a593Smuzhiyun * Colorado Springs, CO 80916
24*4882a593Smuzhiyun * 1+ (719) 578-3400
25*4882a593Smuzhiyun * 1+ (800) 334-5454
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * With contributions from Ray Van Tassle, Ingmar Baumgart,
30*4882a593Smuzhiyun * Ronald van Cuijlenborg, Alan Cox and others.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Ported to Atari by Roman Hodek and others. */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Adapted for the Sun 3 by Sam Creasey. */
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * Design
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * This is a generic 5380 driver. To use it on a different platform,
41*4882a593Smuzhiyun * one simply writes appropriate system specific macros (ie, data
42*4882a593Smuzhiyun * transfer - some PC's will use the I/O bus, 68K's must use
43*4882a593Smuzhiyun * memory mapped) and drops this file in their 'C' wrapper.
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * As far as command queueing, two queues are maintained for
46*4882a593Smuzhiyun * each 5380 in the system - commands that haven't been issued yet,
47*4882a593Smuzhiyun * and commands that are currently executing. This means that an
48*4882a593Smuzhiyun * unlimited number of commands may be queued, letting
49*4882a593Smuzhiyun * more commands propagate from the higher driver levels giving higher
50*4882a593Smuzhiyun * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
51*4882a593Smuzhiyun * allowing multiple commands to propagate all the way to a SCSI-II device
52*4882a593Smuzhiyun * while a command is already executing.
53*4882a593Smuzhiyun *
54*4882a593Smuzhiyun *
55*4882a593Smuzhiyun * Issues specific to the NCR5380 :
56*4882a593Smuzhiyun *
57*4882a593Smuzhiyun * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
58*4882a593Smuzhiyun * piece of hardware that requires you to sit in a loop polling for
59*4882a593Smuzhiyun * the REQ signal as long as you are connected. Some devices are
60*4882a593Smuzhiyun * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
61*4882a593Smuzhiyun * while doing long seek operations. [...] These
62*4882a593Smuzhiyun * broken devices are the exception rather than the rule and I'd rather
63*4882a593Smuzhiyun * spend my time optimizing for the normal case.
64*4882a593Smuzhiyun *
65*4882a593Smuzhiyun * Architecture :
66*4882a593Smuzhiyun *
67*4882a593Smuzhiyun * At the heart of the design is a coroutine, NCR5380_main,
68*4882a593Smuzhiyun * which is started from a workqueue for each NCR5380 host in the
69*4882a593Smuzhiyun * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
70*4882a593Smuzhiyun * removing the commands from the issue queue and calling
71*4882a593Smuzhiyun * NCR5380_select() if a nexus is not established.
72*4882a593Smuzhiyun *
73*4882a593Smuzhiyun * Once a nexus is established, the NCR5380_information_transfer()
74*4882a593Smuzhiyun * phase goes through the various phases as instructed by the target.
75*4882a593Smuzhiyun * if the target goes into MSG IN and sends a DISCONNECT message,
76*4882a593Smuzhiyun * the command structure is placed into the per instance disconnected
77*4882a593Smuzhiyun * queue, and NCR5380_main tries to find more work. If the target is
78*4882a593Smuzhiyun * idle for too long, the system will try to sleep.
79*4882a593Smuzhiyun *
80*4882a593Smuzhiyun * If a command has disconnected, eventually an interrupt will trigger,
81*4882a593Smuzhiyun * calling NCR5380_intr() which will in turn call NCR5380_reselect
82*4882a593Smuzhiyun * to reestablish a nexus. This will run main if necessary.
83*4882a593Smuzhiyun *
84*4882a593Smuzhiyun * On command termination, the done function will be called as
85*4882a593Smuzhiyun * appropriate.
86*4882a593Smuzhiyun *
87*4882a593Smuzhiyun * SCSI pointers are maintained in the SCp field of SCSI command
88*4882a593Smuzhiyun * structures, being initialized after the command is connected
89*4882a593Smuzhiyun * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
90*4882a593Smuzhiyun * Note that in violation of the standard, an implicit SAVE POINTERS operation
91*4882a593Smuzhiyun * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
92*4882a593Smuzhiyun */
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /*
95*4882a593Smuzhiyun * Using this file :
96*4882a593Smuzhiyun * This file a skeleton Linux SCSI driver for the NCR 5380 series
97*4882a593Smuzhiyun * of chips. To use it, you write an architecture specific functions
98*4882a593Smuzhiyun * and macros and include this file in your driver.
99*4882a593Smuzhiyun *
100*4882a593Smuzhiyun * These macros MUST be defined :
101*4882a593Smuzhiyun *
102*4882a593Smuzhiyun * NCR5380_read(register) - read from the specified register
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun * NCR5380_write(register, value) - write to the specific register
105*4882a593Smuzhiyun *
106*4882a593Smuzhiyun * NCR5380_implementation_fields - additional fields needed for this
107*4882a593Smuzhiyun * specific implementation of the NCR5380
108*4882a593Smuzhiyun *
109*4882a593Smuzhiyun * Either real DMA *or* pseudo DMA may be implemented
110*4882a593Smuzhiyun *
111*4882a593Smuzhiyun * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
112*4882a593Smuzhiyun * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
113*4882a593Smuzhiyun * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
114*4882a593Smuzhiyun * NCR5380_dma_residual - residual byte count
115*4882a593Smuzhiyun *
116*4882a593Smuzhiyun * The generic driver is initialized by calling NCR5380_init(instance),
117*4882a593Smuzhiyun * after setting the appropriate host specific fields and ID.
118*4882a593Smuzhiyun */
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #ifndef NCR5380_io_delay
121*4882a593Smuzhiyun #define NCR5380_io_delay(x)
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun #ifndef NCR5380_acquire_dma_irq
125*4882a593Smuzhiyun #define NCR5380_acquire_dma_irq(x) (1)
126*4882a593Smuzhiyun #endif
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #ifndef NCR5380_release_dma_irq
129*4882a593Smuzhiyun #define NCR5380_release_dma_irq(x)
130*4882a593Smuzhiyun #endif
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static unsigned int disconnect_mask = ~0;
133*4882a593Smuzhiyun module_param(disconnect_mask, int, 0444);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static int do_abort(struct Scsi_Host *);
136*4882a593Smuzhiyun static void do_reset(struct Scsi_Host *);
137*4882a593Smuzhiyun static void bus_reset_cleanup(struct Scsi_Host *);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /**
140*4882a593Smuzhiyun * initialize_SCp - init the scsi pointer field
141*4882a593Smuzhiyun * @cmd: command block to set up
142*4882a593Smuzhiyun *
143*4882a593Smuzhiyun * Set up the internal fields in the SCSI command.
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun
initialize_SCp(struct scsi_cmnd * cmd)146*4882a593Smuzhiyun static inline void initialize_SCp(struct scsi_cmnd *cmd)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun /*
149*4882a593Smuzhiyun * Initialize the Scsi Pointer field so that all of the commands in the
150*4882a593Smuzhiyun * various queues are valid.
151*4882a593Smuzhiyun */
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (scsi_bufflen(cmd)) {
154*4882a593Smuzhiyun cmd->SCp.buffer = scsi_sglist(cmd);
155*4882a593Smuzhiyun cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
156*4882a593Smuzhiyun cmd->SCp.this_residual = cmd->SCp.buffer->length;
157*4882a593Smuzhiyun } else {
158*4882a593Smuzhiyun cmd->SCp.buffer = NULL;
159*4882a593Smuzhiyun cmd->SCp.ptr = NULL;
160*4882a593Smuzhiyun cmd->SCp.this_residual = 0;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun cmd->SCp.Status = 0;
164*4882a593Smuzhiyun cmd->SCp.Message = 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
advance_sg_buffer(struct scsi_cmnd * cmd)167*4882a593Smuzhiyun static inline void advance_sg_buffer(struct scsi_cmnd *cmd)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun struct scatterlist *s = cmd->SCp.buffer;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if (!cmd->SCp.this_residual && s && !sg_is_last(s)) {
172*4882a593Smuzhiyun cmd->SCp.buffer = sg_next(s);
173*4882a593Smuzhiyun cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
174*4882a593Smuzhiyun cmd->SCp.this_residual = cmd->SCp.buffer->length;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
set_resid_from_SCp(struct scsi_cmnd * cmd)178*4882a593Smuzhiyun static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun int resid = cmd->SCp.this_residual;
181*4882a593Smuzhiyun struct scatterlist *s = cmd->SCp.buffer;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (s)
184*4882a593Smuzhiyun while (!sg_is_last(s)) {
185*4882a593Smuzhiyun s = sg_next(s);
186*4882a593Smuzhiyun resid += s->length;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun scsi_set_resid(cmd, resid);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /**
192*4882a593Smuzhiyun * NCR5380_poll_politely2 - wait for two chip register values
193*4882a593Smuzhiyun * @hostdata: host private data
194*4882a593Smuzhiyun * @reg1: 5380 register to poll
195*4882a593Smuzhiyun * @bit1: Bitmask to check
196*4882a593Smuzhiyun * @val1: Expected value
197*4882a593Smuzhiyun * @reg2: Second 5380 register to poll
198*4882a593Smuzhiyun * @bit2: Second bitmask to check
199*4882a593Smuzhiyun * @val2: Second expected value
200*4882a593Smuzhiyun * @wait: Time-out in jiffies
201*4882a593Smuzhiyun *
202*4882a593Smuzhiyun * Polls the chip in a reasonably efficient manner waiting for an
203*4882a593Smuzhiyun * event to occur. After a short quick poll we begin to yield the CPU
204*4882a593Smuzhiyun * (if possible). In irq contexts the time-out is arbitrarily limited.
205*4882a593Smuzhiyun * Callers may hold locks as long as they are held in irq mode.
206*4882a593Smuzhiyun *
207*4882a593Smuzhiyun * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
208*4882a593Smuzhiyun */
209*4882a593Smuzhiyun
NCR5380_poll_politely2(struct NCR5380_hostdata * hostdata,unsigned int reg1,u8 bit1,u8 val1,unsigned int reg2,u8 bit2,u8 val2,unsigned long wait)210*4882a593Smuzhiyun static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
211*4882a593Smuzhiyun unsigned int reg1, u8 bit1, u8 val1,
212*4882a593Smuzhiyun unsigned int reg2, u8 bit2, u8 val2,
213*4882a593Smuzhiyun unsigned long wait)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun unsigned long n = hostdata->poll_loops;
216*4882a593Smuzhiyun unsigned long deadline = jiffies + wait;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun do {
219*4882a593Smuzhiyun if ((NCR5380_read(reg1) & bit1) == val1)
220*4882a593Smuzhiyun return 0;
221*4882a593Smuzhiyun if ((NCR5380_read(reg2) & bit2) == val2)
222*4882a593Smuzhiyun return 0;
223*4882a593Smuzhiyun cpu_relax();
224*4882a593Smuzhiyun } while (n--);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (irqs_disabled() || in_interrupt())
227*4882a593Smuzhiyun return -ETIMEDOUT;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* Repeatedly sleep for 1 ms until deadline */
230*4882a593Smuzhiyun while (time_is_after_jiffies(deadline)) {
231*4882a593Smuzhiyun schedule_timeout_uninterruptible(1);
232*4882a593Smuzhiyun if ((NCR5380_read(reg1) & bit1) == val1)
233*4882a593Smuzhiyun return 0;
234*4882a593Smuzhiyun if ((NCR5380_read(reg2) & bit2) == val2)
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun return -ETIMEDOUT;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun #if NDEBUG
242*4882a593Smuzhiyun static struct {
243*4882a593Smuzhiyun unsigned char mask;
244*4882a593Smuzhiyun const char *name;
245*4882a593Smuzhiyun } signals[] = {
246*4882a593Smuzhiyun {SR_DBP, "PARITY"},
247*4882a593Smuzhiyun {SR_RST, "RST"},
248*4882a593Smuzhiyun {SR_BSY, "BSY"},
249*4882a593Smuzhiyun {SR_REQ, "REQ"},
250*4882a593Smuzhiyun {SR_MSG, "MSG"},
251*4882a593Smuzhiyun {SR_CD, "CD"},
252*4882a593Smuzhiyun {SR_IO, "IO"},
253*4882a593Smuzhiyun {SR_SEL, "SEL"},
254*4882a593Smuzhiyun {0, NULL}
255*4882a593Smuzhiyun },
256*4882a593Smuzhiyun basrs[] = {
257*4882a593Smuzhiyun {BASR_END_DMA_TRANSFER, "END OF DMA"},
258*4882a593Smuzhiyun {BASR_DRQ, "DRQ"},
259*4882a593Smuzhiyun {BASR_PARITY_ERROR, "PARITY ERROR"},
260*4882a593Smuzhiyun {BASR_IRQ, "IRQ"},
261*4882a593Smuzhiyun {BASR_PHASE_MATCH, "PHASE MATCH"},
262*4882a593Smuzhiyun {BASR_BUSY_ERROR, "BUSY ERROR"},
263*4882a593Smuzhiyun {BASR_ATN, "ATN"},
264*4882a593Smuzhiyun {BASR_ACK, "ACK"},
265*4882a593Smuzhiyun {0, NULL}
266*4882a593Smuzhiyun },
267*4882a593Smuzhiyun icrs[] = {
268*4882a593Smuzhiyun {ICR_ASSERT_RST, "ASSERT RST"},
269*4882a593Smuzhiyun {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
270*4882a593Smuzhiyun {ICR_ARBITRATION_LOST, "LOST ARB."},
271*4882a593Smuzhiyun {ICR_ASSERT_ACK, "ASSERT ACK"},
272*4882a593Smuzhiyun {ICR_ASSERT_BSY, "ASSERT BSY"},
273*4882a593Smuzhiyun {ICR_ASSERT_SEL, "ASSERT SEL"},
274*4882a593Smuzhiyun {ICR_ASSERT_ATN, "ASSERT ATN"},
275*4882a593Smuzhiyun {ICR_ASSERT_DATA, "ASSERT DATA"},
276*4882a593Smuzhiyun {0, NULL}
277*4882a593Smuzhiyun },
278*4882a593Smuzhiyun mrs[] = {
279*4882a593Smuzhiyun {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
280*4882a593Smuzhiyun {MR_TARGET, "TARGET"},
281*4882a593Smuzhiyun {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
282*4882a593Smuzhiyun {MR_ENABLE_PAR_INTR, "PARITY INTR"},
283*4882a593Smuzhiyun {MR_ENABLE_EOP_INTR, "EOP INTR"},
284*4882a593Smuzhiyun {MR_MONITOR_BSY, "MONITOR BSY"},
285*4882a593Smuzhiyun {MR_DMA_MODE, "DMA MODE"},
286*4882a593Smuzhiyun {MR_ARBITRATE, "ARBITRATE"},
287*4882a593Smuzhiyun {0, NULL}
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /**
291*4882a593Smuzhiyun * NCR5380_print - print scsi bus signals
292*4882a593Smuzhiyun * @instance: adapter state to dump
293*4882a593Smuzhiyun *
294*4882a593Smuzhiyun * Print the SCSI bus signals for debugging purposes
295*4882a593Smuzhiyun */
296*4882a593Smuzhiyun
NCR5380_print(struct Scsi_Host * instance)297*4882a593Smuzhiyun static void NCR5380_print(struct Scsi_Host *instance)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
300*4882a593Smuzhiyun unsigned char status, basr, mr, icr, i;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun status = NCR5380_read(STATUS_REG);
303*4882a593Smuzhiyun mr = NCR5380_read(MODE_REG);
304*4882a593Smuzhiyun icr = NCR5380_read(INITIATOR_COMMAND_REG);
305*4882a593Smuzhiyun basr = NCR5380_read(BUS_AND_STATUS_REG);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun printk(KERN_DEBUG "SR = 0x%02x : ", status);
308*4882a593Smuzhiyun for (i = 0; signals[i].mask; ++i)
309*4882a593Smuzhiyun if (status & signals[i].mask)
310*4882a593Smuzhiyun printk(KERN_CONT "%s, ", signals[i].name);
311*4882a593Smuzhiyun printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
312*4882a593Smuzhiyun for (i = 0; basrs[i].mask; ++i)
313*4882a593Smuzhiyun if (basr & basrs[i].mask)
314*4882a593Smuzhiyun printk(KERN_CONT "%s, ", basrs[i].name);
315*4882a593Smuzhiyun printk(KERN_CONT "\nICR = 0x%02x : ", icr);
316*4882a593Smuzhiyun for (i = 0; icrs[i].mask; ++i)
317*4882a593Smuzhiyun if (icr & icrs[i].mask)
318*4882a593Smuzhiyun printk(KERN_CONT "%s, ", icrs[i].name);
319*4882a593Smuzhiyun printk(KERN_CONT "\nMR = 0x%02x : ", mr);
320*4882a593Smuzhiyun for (i = 0; mrs[i].mask; ++i)
321*4882a593Smuzhiyun if (mr & mrs[i].mask)
322*4882a593Smuzhiyun printk(KERN_CONT "%s, ", mrs[i].name);
323*4882a593Smuzhiyun printk(KERN_CONT "\n");
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun static struct {
327*4882a593Smuzhiyun unsigned char value;
328*4882a593Smuzhiyun const char *name;
329*4882a593Smuzhiyun } phases[] = {
330*4882a593Smuzhiyun {PHASE_DATAOUT, "DATAOUT"},
331*4882a593Smuzhiyun {PHASE_DATAIN, "DATAIN"},
332*4882a593Smuzhiyun {PHASE_CMDOUT, "CMDOUT"},
333*4882a593Smuzhiyun {PHASE_STATIN, "STATIN"},
334*4882a593Smuzhiyun {PHASE_MSGOUT, "MSGOUT"},
335*4882a593Smuzhiyun {PHASE_MSGIN, "MSGIN"},
336*4882a593Smuzhiyun {PHASE_UNKNOWN, "UNKNOWN"}
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun /**
340*4882a593Smuzhiyun * NCR5380_print_phase - show SCSI phase
341*4882a593Smuzhiyun * @instance: adapter to dump
342*4882a593Smuzhiyun *
343*4882a593Smuzhiyun * Print the current SCSI phase for debugging purposes
344*4882a593Smuzhiyun */
345*4882a593Smuzhiyun
NCR5380_print_phase(struct Scsi_Host * instance)346*4882a593Smuzhiyun static void NCR5380_print_phase(struct Scsi_Host *instance)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
349*4882a593Smuzhiyun unsigned char status;
350*4882a593Smuzhiyun int i;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun status = NCR5380_read(STATUS_REG);
353*4882a593Smuzhiyun if (!(status & SR_REQ))
354*4882a593Smuzhiyun shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
355*4882a593Smuzhiyun else {
356*4882a593Smuzhiyun for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
357*4882a593Smuzhiyun (phases[i].value != (status & PHASE_MASK)); ++i)
358*4882a593Smuzhiyun ;
359*4882a593Smuzhiyun shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun #endif
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun /**
365*4882a593Smuzhiyun * NCR5380_info - report driver and host information
366*4882a593Smuzhiyun * @instance: relevant scsi host instance
367*4882a593Smuzhiyun *
368*4882a593Smuzhiyun * For use as the host template info() handler.
369*4882a593Smuzhiyun */
370*4882a593Smuzhiyun
NCR5380_info(struct Scsi_Host * instance)371*4882a593Smuzhiyun static const char *NCR5380_info(struct Scsi_Host *instance)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun return hostdata->info;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /**
379*4882a593Smuzhiyun * NCR5380_init - initialise an NCR5380
380*4882a593Smuzhiyun * @instance: adapter to configure
381*4882a593Smuzhiyun * @flags: control flags
382*4882a593Smuzhiyun *
383*4882a593Smuzhiyun * Initializes *instance and corresponding 5380 chip,
384*4882a593Smuzhiyun * with flags OR'd into the initial flags value.
385*4882a593Smuzhiyun *
386*4882a593Smuzhiyun * Notes : I assume that the host, hostno, and id bits have been
387*4882a593Smuzhiyun * set correctly. I don't care about the irq and other fields.
388*4882a593Smuzhiyun *
389*4882a593Smuzhiyun * Returns 0 for success
390*4882a593Smuzhiyun */
391*4882a593Smuzhiyun
NCR5380_init(struct Scsi_Host * instance,int flags)392*4882a593Smuzhiyun static int NCR5380_init(struct Scsi_Host *instance, int flags)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
395*4882a593Smuzhiyun int i;
396*4882a593Smuzhiyun unsigned long deadline;
397*4882a593Smuzhiyun unsigned long accesses_per_ms;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun instance->max_lun = 7;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun hostdata->host = instance;
402*4882a593Smuzhiyun hostdata->id_mask = 1 << instance->this_id;
403*4882a593Smuzhiyun hostdata->id_higher_mask = 0;
404*4882a593Smuzhiyun for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
405*4882a593Smuzhiyun if (i > hostdata->id_mask)
406*4882a593Smuzhiyun hostdata->id_higher_mask |= i;
407*4882a593Smuzhiyun for (i = 0; i < 8; ++i)
408*4882a593Smuzhiyun hostdata->busy[i] = 0;
409*4882a593Smuzhiyun hostdata->dma_len = 0;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun spin_lock_init(&hostdata->lock);
412*4882a593Smuzhiyun hostdata->connected = NULL;
413*4882a593Smuzhiyun hostdata->sensing = NULL;
414*4882a593Smuzhiyun INIT_LIST_HEAD(&hostdata->autosense);
415*4882a593Smuzhiyun INIT_LIST_HEAD(&hostdata->unissued);
416*4882a593Smuzhiyun INIT_LIST_HEAD(&hostdata->disconnected);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun hostdata->flags = flags;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun INIT_WORK(&hostdata->main_task, NCR5380_main);
421*4882a593Smuzhiyun hostdata->work_q = alloc_workqueue("ncr5380_%d",
422*4882a593Smuzhiyun WQ_UNBOUND | WQ_MEM_RECLAIM,
423*4882a593Smuzhiyun 1, instance->host_no);
424*4882a593Smuzhiyun if (!hostdata->work_q)
425*4882a593Smuzhiyun return -ENOMEM;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun snprintf(hostdata->info, sizeof(hostdata->info),
428*4882a593Smuzhiyun "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
429*4882a593Smuzhiyun instance->hostt->name, instance->irq, hostdata->io_port,
430*4882a593Smuzhiyun hostdata->base, instance->can_queue, instance->cmd_per_lun,
431*4882a593Smuzhiyun instance->sg_tablesize, instance->this_id,
432*4882a593Smuzhiyun hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
433*4882a593Smuzhiyun hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
434*4882a593Smuzhiyun hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
437*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
438*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, 0);
439*4882a593Smuzhiyun NCR5380_write(SELECT_ENABLE_REG, 0);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun /* Calibrate register polling loop */
442*4882a593Smuzhiyun i = 0;
443*4882a593Smuzhiyun deadline = jiffies + 1;
444*4882a593Smuzhiyun do {
445*4882a593Smuzhiyun cpu_relax();
446*4882a593Smuzhiyun } while (time_is_after_jiffies(deadline));
447*4882a593Smuzhiyun deadline += msecs_to_jiffies(256);
448*4882a593Smuzhiyun do {
449*4882a593Smuzhiyun NCR5380_read(STATUS_REG);
450*4882a593Smuzhiyun ++i;
451*4882a593Smuzhiyun cpu_relax();
452*4882a593Smuzhiyun } while (time_is_after_jiffies(deadline));
453*4882a593Smuzhiyun accesses_per_ms = i / 256;
454*4882a593Smuzhiyun hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun return 0;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /**
460*4882a593Smuzhiyun * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
461*4882a593Smuzhiyun * @instance: adapter to check
462*4882a593Smuzhiyun *
463*4882a593Smuzhiyun * If the system crashed, it may have crashed with a connected target and
464*4882a593Smuzhiyun * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
465*4882a593Smuzhiyun * currently established nexus, which we know nothing about. Failing that
466*4882a593Smuzhiyun * do a bus reset.
467*4882a593Smuzhiyun *
468*4882a593Smuzhiyun * Note that a bus reset will cause the chip to assert IRQ.
469*4882a593Smuzhiyun *
470*4882a593Smuzhiyun * Returns 0 if successful, otherwise -ENXIO.
471*4882a593Smuzhiyun */
472*4882a593Smuzhiyun
NCR5380_maybe_reset_bus(struct Scsi_Host * instance)473*4882a593Smuzhiyun static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
476*4882a593Smuzhiyun int pass;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
479*4882a593Smuzhiyun switch (pass) {
480*4882a593Smuzhiyun case 1:
481*4882a593Smuzhiyun case 3:
482*4882a593Smuzhiyun case 5:
483*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
484*4882a593Smuzhiyun NCR5380_poll_politely(hostdata,
485*4882a593Smuzhiyun STATUS_REG, SR_BSY, 0, 5 * HZ);
486*4882a593Smuzhiyun break;
487*4882a593Smuzhiyun case 2:
488*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
489*4882a593Smuzhiyun do_abort(instance);
490*4882a593Smuzhiyun break;
491*4882a593Smuzhiyun case 4:
492*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
493*4882a593Smuzhiyun do_reset(instance);
494*4882a593Smuzhiyun /* Wait after a reset; the SCSI standard calls for
495*4882a593Smuzhiyun * 250ms, we wait 500ms to be on the safe side.
496*4882a593Smuzhiyun * But some Toshiba CD-ROMs need ten times that.
497*4882a593Smuzhiyun */
498*4882a593Smuzhiyun if (hostdata->flags & FLAG_TOSHIBA_DELAY)
499*4882a593Smuzhiyun msleep(2500);
500*4882a593Smuzhiyun else
501*4882a593Smuzhiyun msleep(500);
502*4882a593Smuzhiyun break;
503*4882a593Smuzhiyun case 6:
504*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "bus locked solid\n");
505*4882a593Smuzhiyun return -ENXIO;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun return 0;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /**
512*4882a593Smuzhiyun * NCR5380_exit - remove an NCR5380
513*4882a593Smuzhiyun * @instance: adapter to remove
514*4882a593Smuzhiyun *
515*4882a593Smuzhiyun * Assumes that no more work can be queued (e.g. by NCR5380_intr).
516*4882a593Smuzhiyun */
517*4882a593Smuzhiyun
NCR5380_exit(struct Scsi_Host * instance)518*4882a593Smuzhiyun static void NCR5380_exit(struct Scsi_Host *instance)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun cancel_work_sync(&hostdata->main_task);
523*4882a593Smuzhiyun destroy_workqueue(hostdata->work_q);
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /**
527*4882a593Smuzhiyun * complete_cmd - finish processing a command and return it to the SCSI ML
528*4882a593Smuzhiyun * @instance: the host instance
529*4882a593Smuzhiyun * @cmd: command to complete
530*4882a593Smuzhiyun */
531*4882a593Smuzhiyun
complete_cmd(struct Scsi_Host * instance,struct scsi_cmnd * cmd)532*4882a593Smuzhiyun static void complete_cmd(struct Scsi_Host *instance,
533*4882a593Smuzhiyun struct scsi_cmnd *cmd)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun if (hostdata->sensing == cmd) {
540*4882a593Smuzhiyun /* Autosense processing ends here */
541*4882a593Smuzhiyun if (status_byte(cmd->result) != GOOD) {
542*4882a593Smuzhiyun scsi_eh_restore_cmnd(cmd, &hostdata->ses);
543*4882a593Smuzhiyun } else {
544*4882a593Smuzhiyun scsi_eh_restore_cmnd(cmd, &hostdata->ses);
545*4882a593Smuzhiyun set_driver_byte(cmd, DRIVER_SENSE);
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun hostdata->sensing = NULL;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun cmd->scsi_done(cmd);
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun /**
554*4882a593Smuzhiyun * NCR5380_queue_command - queue a command
555*4882a593Smuzhiyun * @instance: the relevant SCSI adapter
556*4882a593Smuzhiyun * @cmd: SCSI command
557*4882a593Smuzhiyun *
558*4882a593Smuzhiyun * cmd is added to the per-instance issue queue, with minor
559*4882a593Smuzhiyun * twiddling done to the host specific fields of cmd. If the
560*4882a593Smuzhiyun * main coroutine is not running, it is restarted.
561*4882a593Smuzhiyun */
562*4882a593Smuzhiyun
NCR5380_queue_command(struct Scsi_Host * instance,struct scsi_cmnd * cmd)563*4882a593Smuzhiyun static int NCR5380_queue_command(struct Scsi_Host *instance,
564*4882a593Smuzhiyun struct scsi_cmnd *cmd)
565*4882a593Smuzhiyun {
566*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
567*4882a593Smuzhiyun struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
568*4882a593Smuzhiyun unsigned long flags;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun #if (NDEBUG & NDEBUG_NO_WRITE)
571*4882a593Smuzhiyun switch (cmd->cmnd[0]) {
572*4882a593Smuzhiyun case WRITE_6:
573*4882a593Smuzhiyun case WRITE_10:
574*4882a593Smuzhiyun shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
575*4882a593Smuzhiyun cmd->result = (DID_ERROR << 16);
576*4882a593Smuzhiyun cmd->scsi_done(cmd);
577*4882a593Smuzhiyun return 0;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun cmd->result = 0;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun if (!NCR5380_acquire_dma_irq(instance))
584*4882a593Smuzhiyun return SCSI_MLQUEUE_HOST_BUSY;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun spin_lock_irqsave(&hostdata->lock, flags);
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /*
589*4882a593Smuzhiyun * Insert the cmd into the issue queue. Note that REQUEST SENSE
590*4882a593Smuzhiyun * commands are added to the head of the queue since any command will
591*4882a593Smuzhiyun * clear the contingent allegiance condition that exists and the
592*4882a593Smuzhiyun * sense data is only guaranteed to be valid while the condition exists.
593*4882a593Smuzhiyun */
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun if (cmd->cmnd[0] == REQUEST_SENSE)
596*4882a593Smuzhiyun list_add(&ncmd->list, &hostdata->unissued);
597*4882a593Smuzhiyun else
598*4882a593Smuzhiyun list_add_tail(&ncmd->list, &hostdata->unissued);
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun spin_unlock_irqrestore(&hostdata->lock, flags);
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
603*4882a593Smuzhiyun cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun /* Kick off command processing */
606*4882a593Smuzhiyun queue_work(hostdata->work_q, &hostdata->main_task);
607*4882a593Smuzhiyun return 0;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun
maybe_release_dma_irq(struct Scsi_Host * instance)610*4882a593Smuzhiyun static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /* Caller does the locking needed to set & test these data atomically */
615*4882a593Smuzhiyun if (list_empty(&hostdata->disconnected) &&
616*4882a593Smuzhiyun list_empty(&hostdata->unissued) &&
617*4882a593Smuzhiyun list_empty(&hostdata->autosense) &&
618*4882a593Smuzhiyun !hostdata->connected &&
619*4882a593Smuzhiyun !hostdata->selecting) {
620*4882a593Smuzhiyun NCR5380_release_dma_irq(instance);
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun /**
625*4882a593Smuzhiyun * dequeue_next_cmd - dequeue a command for processing
626*4882a593Smuzhiyun * @instance: the scsi host instance
627*4882a593Smuzhiyun *
628*4882a593Smuzhiyun * Priority is given to commands on the autosense queue. These commands
629*4882a593Smuzhiyun * need autosense because of a CHECK CONDITION result.
630*4882a593Smuzhiyun *
631*4882a593Smuzhiyun * Returns a command pointer if a command is found for a target that is
632*4882a593Smuzhiyun * not already busy. Otherwise returns NULL.
633*4882a593Smuzhiyun */
634*4882a593Smuzhiyun
dequeue_next_cmd(struct Scsi_Host * instance)635*4882a593Smuzhiyun static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
638*4882a593Smuzhiyun struct NCR5380_cmd *ncmd;
639*4882a593Smuzhiyun struct scsi_cmnd *cmd;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun if (hostdata->sensing || list_empty(&hostdata->autosense)) {
642*4882a593Smuzhiyun list_for_each_entry(ncmd, &hostdata->unissued, list) {
643*4882a593Smuzhiyun cmd = NCR5380_to_scmd(ncmd);
644*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
645*4882a593Smuzhiyun cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
648*4882a593Smuzhiyun list_del(&ncmd->list);
649*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance,
650*4882a593Smuzhiyun "dequeue: removed %p from issue queue\n", cmd);
651*4882a593Smuzhiyun return cmd;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun } else {
655*4882a593Smuzhiyun /* Autosense processing begins here */
656*4882a593Smuzhiyun ncmd = list_first_entry(&hostdata->autosense,
657*4882a593Smuzhiyun struct NCR5380_cmd, list);
658*4882a593Smuzhiyun list_del(&ncmd->list);
659*4882a593Smuzhiyun cmd = NCR5380_to_scmd(ncmd);
660*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance,
661*4882a593Smuzhiyun "dequeue: removed %p from autosense queue\n", cmd);
662*4882a593Smuzhiyun scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
663*4882a593Smuzhiyun hostdata->sensing = cmd;
664*4882a593Smuzhiyun return cmd;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun return NULL;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun
requeue_cmd(struct Scsi_Host * instance,struct scsi_cmnd * cmd)669*4882a593Smuzhiyun static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
672*4882a593Smuzhiyun struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun if (hostdata->sensing == cmd) {
675*4882a593Smuzhiyun scsi_eh_restore_cmnd(cmd, &hostdata->ses);
676*4882a593Smuzhiyun list_add(&ncmd->list, &hostdata->autosense);
677*4882a593Smuzhiyun hostdata->sensing = NULL;
678*4882a593Smuzhiyun } else
679*4882a593Smuzhiyun list_add(&ncmd->list, &hostdata->unissued);
680*4882a593Smuzhiyun }
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun /**
683*4882a593Smuzhiyun * NCR5380_main - NCR state machines
684*4882a593Smuzhiyun *
685*4882a593Smuzhiyun * NCR5380_main is a coroutine that runs as long as more work can
686*4882a593Smuzhiyun * be done on the NCR5380 host adapters in a system. Both
687*4882a593Smuzhiyun * NCR5380_queue_command() and NCR5380_intr() will try to start it
688*4882a593Smuzhiyun * in case it is not running.
689*4882a593Smuzhiyun */
690*4882a593Smuzhiyun
NCR5380_main(struct work_struct * work)691*4882a593Smuzhiyun static void NCR5380_main(struct work_struct *work)
692*4882a593Smuzhiyun {
693*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata =
694*4882a593Smuzhiyun container_of(work, struct NCR5380_hostdata, main_task);
695*4882a593Smuzhiyun struct Scsi_Host *instance = hostdata->host;
696*4882a593Smuzhiyun int done;
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun do {
699*4882a593Smuzhiyun done = 1;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
702*4882a593Smuzhiyun while (!hostdata->connected && !hostdata->selecting) {
703*4882a593Smuzhiyun struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun if (!cmd)
706*4882a593Smuzhiyun break;
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun /*
711*4882a593Smuzhiyun * Attempt to establish an I_T_L nexus here.
712*4882a593Smuzhiyun * On success, instance->hostdata->connected is set.
713*4882a593Smuzhiyun * On failure, we must add the command back to the
714*4882a593Smuzhiyun * issue queue so we can keep trying.
715*4882a593Smuzhiyun */
716*4882a593Smuzhiyun /*
717*4882a593Smuzhiyun * REQUEST SENSE commands are issued without tagged
718*4882a593Smuzhiyun * queueing, even on SCSI-II devices because the
719*4882a593Smuzhiyun * contingent allegiance condition exists for the
720*4882a593Smuzhiyun * entire unit.
721*4882a593Smuzhiyun */
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun if (!NCR5380_select(instance, cmd)) {
724*4882a593Smuzhiyun dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
725*4882a593Smuzhiyun maybe_release_dma_irq(instance);
726*4882a593Smuzhiyun } else {
727*4882a593Smuzhiyun dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
728*4882a593Smuzhiyun "main: select failed, returning %p to queue\n", cmd);
729*4882a593Smuzhiyun requeue_cmd(instance, cmd);
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun if (hostdata->connected && !hostdata->dma_len) {
733*4882a593Smuzhiyun dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
734*4882a593Smuzhiyun NCR5380_information_transfer(instance);
735*4882a593Smuzhiyun done = 0;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun if (!hostdata->connected)
738*4882a593Smuzhiyun NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
739*4882a593Smuzhiyun spin_unlock_irq(&hostdata->lock);
740*4882a593Smuzhiyun if (!done)
741*4882a593Smuzhiyun cond_resched();
742*4882a593Smuzhiyun } while (!done);
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun /*
746*4882a593Smuzhiyun * NCR5380_dma_complete - finish DMA transfer
747*4882a593Smuzhiyun * @instance: the scsi host instance
748*4882a593Smuzhiyun *
749*4882a593Smuzhiyun * Called by the interrupt handler when DMA finishes or a phase
750*4882a593Smuzhiyun * mismatch occurs (which would end the DMA transfer).
751*4882a593Smuzhiyun */
752*4882a593Smuzhiyun
NCR5380_dma_complete(struct Scsi_Host * instance)753*4882a593Smuzhiyun static void NCR5380_dma_complete(struct Scsi_Host *instance)
754*4882a593Smuzhiyun {
755*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
756*4882a593Smuzhiyun int transferred;
757*4882a593Smuzhiyun unsigned char **data;
758*4882a593Smuzhiyun int *count;
759*4882a593Smuzhiyun int saved_data = 0, overrun = 0;
760*4882a593Smuzhiyun unsigned char p;
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun if (hostdata->read_overruns) {
763*4882a593Smuzhiyun p = hostdata->connected->SCp.phase;
764*4882a593Smuzhiyun if (p & SR_IO) {
765*4882a593Smuzhiyun udelay(10);
766*4882a593Smuzhiyun if ((NCR5380_read(BUS_AND_STATUS_REG) &
767*4882a593Smuzhiyun (BASR_PHASE_MATCH | BASR_ACK)) ==
768*4882a593Smuzhiyun (BASR_PHASE_MATCH | BASR_ACK)) {
769*4882a593Smuzhiyun saved_data = NCR5380_read(INPUT_DATA_REG);
770*4882a593Smuzhiyun overrun = 1;
771*4882a593Smuzhiyun dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun #ifdef CONFIG_SUN3
777*4882a593Smuzhiyun if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
778*4882a593Smuzhiyun pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
779*4882a593Smuzhiyun instance->host_no);
780*4882a593Smuzhiyun BUG();
781*4882a593Smuzhiyun }
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
784*4882a593Smuzhiyun (BASR_PHASE_MATCH | BASR_ACK)) {
785*4882a593Smuzhiyun pr_err("scsi%d: BASR %02x\n", instance->host_no,
786*4882a593Smuzhiyun NCR5380_read(BUS_AND_STATUS_REG));
787*4882a593Smuzhiyun pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
788*4882a593Smuzhiyun instance->host_no);
789*4882a593Smuzhiyun BUG();
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun #endif
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
794*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
795*4882a593Smuzhiyun NCR5380_read(RESET_PARITY_INTERRUPT_REG);
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
798*4882a593Smuzhiyun hostdata->dma_len = 0;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun data = (unsigned char **)&hostdata->connected->SCp.ptr;
801*4882a593Smuzhiyun count = &hostdata->connected->SCp.this_residual;
802*4882a593Smuzhiyun *data += transferred;
803*4882a593Smuzhiyun *count -= transferred;
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun if (hostdata->read_overruns) {
806*4882a593Smuzhiyun int cnt, toPIO;
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
809*4882a593Smuzhiyun cnt = toPIO = hostdata->read_overruns;
810*4882a593Smuzhiyun if (overrun) {
811*4882a593Smuzhiyun dsprintk(NDEBUG_DMA, instance,
812*4882a593Smuzhiyun "Got an input overrun, using saved byte\n");
813*4882a593Smuzhiyun *(*data)++ = saved_data;
814*4882a593Smuzhiyun (*count)--;
815*4882a593Smuzhiyun cnt--;
816*4882a593Smuzhiyun toPIO--;
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun if (toPIO > 0) {
819*4882a593Smuzhiyun dsprintk(NDEBUG_DMA, instance,
820*4882a593Smuzhiyun "Doing %d byte PIO to 0x%p\n", cnt, *data);
821*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &p, &cnt, data);
822*4882a593Smuzhiyun *count -= toPIO - cnt;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun /**
829*4882a593Smuzhiyun * NCR5380_intr - generic NCR5380 irq handler
830*4882a593Smuzhiyun * @irq: interrupt number
831*4882a593Smuzhiyun * @dev_id: device info
832*4882a593Smuzhiyun *
833*4882a593Smuzhiyun * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
834*4882a593Smuzhiyun * from the disconnected queue, and restarting NCR5380_main()
835*4882a593Smuzhiyun * as required.
836*4882a593Smuzhiyun *
837*4882a593Smuzhiyun * The chip can assert IRQ in any of six different conditions. The IRQ flag
838*4882a593Smuzhiyun * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
839*4882a593Smuzhiyun * Three of these six conditions are latched in the Bus and Status Register:
840*4882a593Smuzhiyun * - End of DMA (cleared by ending DMA Mode)
841*4882a593Smuzhiyun * - Parity error (cleared by reading RPIR)
842*4882a593Smuzhiyun * - Loss of BSY (cleared by reading RPIR)
843*4882a593Smuzhiyun * Two conditions have flag bits that are not latched:
844*4882a593Smuzhiyun * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
845*4882a593Smuzhiyun * - Bus reset (non-maskable)
846*4882a593Smuzhiyun * The remaining condition has no flag bit at all:
847*4882a593Smuzhiyun * - Selection/reselection
848*4882a593Smuzhiyun *
849*4882a593Smuzhiyun * Hence, establishing the cause(s) of any interrupt is partly guesswork.
850*4882a593Smuzhiyun * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
851*4882a593Smuzhiyun * claimed that "the design of the [DP8490] interrupt logic ensures
852*4882a593Smuzhiyun * interrupts will not be lost (they can be on the DP5380)."
853*4882a593Smuzhiyun * The L5380/53C80 datasheet from LOGIC Devices has more details.
854*4882a593Smuzhiyun *
855*4882a593Smuzhiyun * Checking for bus reset by reading RST is futile because of interrupt
856*4882a593Smuzhiyun * latency, but a bus reset will reset chip logic. Checking for parity error
857*4882a593Smuzhiyun * is unnecessary because that interrupt is never enabled. A Loss of BSY
858*4882a593Smuzhiyun * condition will clear DMA Mode. We can tell when this occurs because the
859*4882a593Smuzhiyun * the Busy Monitor interrupt is enabled together with DMA Mode.
860*4882a593Smuzhiyun */
861*4882a593Smuzhiyun
NCR5380_intr(int irq,void * dev_id)862*4882a593Smuzhiyun static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun struct Scsi_Host *instance = dev_id;
865*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
866*4882a593Smuzhiyun int handled = 0;
867*4882a593Smuzhiyun unsigned char basr;
868*4882a593Smuzhiyun unsigned long flags;
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun spin_lock_irqsave(&hostdata->lock, flags);
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun basr = NCR5380_read(BUS_AND_STATUS_REG);
873*4882a593Smuzhiyun if (basr & BASR_IRQ) {
874*4882a593Smuzhiyun unsigned char mr = NCR5380_read(MODE_REG);
875*4882a593Smuzhiyun unsigned char sr = NCR5380_read(STATUS_REG);
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
878*4882a593Smuzhiyun irq, basr, sr, mr);
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
881*4882a593Smuzhiyun /* Probably End of DMA, Phase Mismatch or Loss of BSY.
882*4882a593Smuzhiyun * We ack IRQ after clearing Mode Register. Workarounds
883*4882a593Smuzhiyun * for End of DMA errata need to happen in DMA Mode.
884*4882a593Smuzhiyun */
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun if (hostdata->connected) {
889*4882a593Smuzhiyun NCR5380_dma_complete(instance);
890*4882a593Smuzhiyun queue_work(hostdata->work_q, &hostdata->main_task);
891*4882a593Smuzhiyun } else {
892*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
893*4882a593Smuzhiyun NCR5380_read(RESET_PARITY_INTERRUPT_REG);
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
896*4882a593Smuzhiyun (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
897*4882a593Smuzhiyun /* Probably reselected */
898*4882a593Smuzhiyun NCR5380_write(SELECT_ENABLE_REG, 0);
899*4882a593Smuzhiyun NCR5380_read(RESET_PARITY_INTERRUPT_REG);
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun if (!hostdata->connected) {
904*4882a593Smuzhiyun NCR5380_reselect(instance);
905*4882a593Smuzhiyun queue_work(hostdata->work_q, &hostdata->main_task);
906*4882a593Smuzhiyun }
907*4882a593Smuzhiyun if (!hostdata->connected)
908*4882a593Smuzhiyun NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
909*4882a593Smuzhiyun } else {
910*4882a593Smuzhiyun /* Probably Bus Reset */
911*4882a593Smuzhiyun NCR5380_read(RESET_PARITY_INTERRUPT_REG);
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun if (sr & SR_RST) {
914*4882a593Smuzhiyun /* Certainly Bus Reset */
915*4882a593Smuzhiyun shost_printk(KERN_WARNING, instance,
916*4882a593Smuzhiyun "bus reset interrupt\n");
917*4882a593Smuzhiyun bus_reset_cleanup(instance);
918*4882a593Smuzhiyun } else {
919*4882a593Smuzhiyun dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
922*4882a593Smuzhiyun dregs->csr |= CSR_DMA_ENABLE;
923*4882a593Smuzhiyun #endif
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun handled = 1;
926*4882a593Smuzhiyun } else {
927*4882a593Smuzhiyun dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
928*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
929*4882a593Smuzhiyun dregs->csr |= CSR_DMA_ENABLE;
930*4882a593Smuzhiyun #endif
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun spin_unlock_irqrestore(&hostdata->lock, flags);
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun return IRQ_RETVAL(handled);
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun /**
939*4882a593Smuzhiyun * NCR5380_select - attempt arbitration and selection for a given command
940*4882a593Smuzhiyun * @instance: the Scsi_Host instance
941*4882a593Smuzhiyun * @cmd: the scsi_cmnd to execute
942*4882a593Smuzhiyun *
943*4882a593Smuzhiyun * This routine establishes an I_T_L nexus for a SCSI command. This involves
944*4882a593Smuzhiyun * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
945*4882a593Smuzhiyun *
946*4882a593Smuzhiyun * Returns true if the operation should be retried.
947*4882a593Smuzhiyun * Returns false if it should not be retried.
948*4882a593Smuzhiyun *
949*4882a593Smuzhiyun * Side effects :
950*4882a593Smuzhiyun * If bus busy, arbitration failed, etc, NCR5380_select() will exit
951*4882a593Smuzhiyun * with registers as they should have been on entry - ie
952*4882a593Smuzhiyun * SELECT_ENABLE will be set appropriately, the NCR5380
953*4882a593Smuzhiyun * will cease to drive any SCSI bus signals.
954*4882a593Smuzhiyun *
955*4882a593Smuzhiyun * If successful : the I_T_L nexus will be established, and
956*4882a593Smuzhiyun * hostdata->connected will be set to cmd.
957*4882a593Smuzhiyun * SELECT interrupt will be disabled.
958*4882a593Smuzhiyun *
959*4882a593Smuzhiyun * If failed (no target) : cmd->scsi_done() will be called, and the
960*4882a593Smuzhiyun * cmd->result host byte set to DID_BAD_TARGET.
961*4882a593Smuzhiyun */
962*4882a593Smuzhiyun
NCR5380_select(struct Scsi_Host * instance,struct scsi_cmnd * cmd)963*4882a593Smuzhiyun static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
964*4882a593Smuzhiyun __releases(&hostdata->lock) __acquires(&hostdata->lock)
965*4882a593Smuzhiyun {
966*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
967*4882a593Smuzhiyun unsigned char tmp[3], phase;
968*4882a593Smuzhiyun unsigned char *data;
969*4882a593Smuzhiyun int len;
970*4882a593Smuzhiyun int err;
971*4882a593Smuzhiyun bool ret = true;
972*4882a593Smuzhiyun bool can_disconnect = instance->irq != NO_IRQ &&
973*4882a593Smuzhiyun cmd->cmnd[0] != REQUEST_SENSE &&
974*4882a593Smuzhiyun (disconnect_mask & BIT(scmd_id(cmd)));
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_ARBITRATION, instance);
977*4882a593Smuzhiyun dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
978*4882a593Smuzhiyun instance->this_id);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun /*
981*4882a593Smuzhiyun * Arbitration and selection phases are slow and involve dropping the
982*4882a593Smuzhiyun * lock, so we have to watch out for EH. An exception handler may
983*4882a593Smuzhiyun * change 'selecting' to NULL. This function will then return false
984*4882a593Smuzhiyun * so that the caller will forget about 'cmd'. (During information
985*4882a593Smuzhiyun * transfer phases, EH may change 'connected' to NULL.)
986*4882a593Smuzhiyun */
987*4882a593Smuzhiyun hostdata->selecting = cmd;
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun /*
990*4882a593Smuzhiyun * Set the phase bits to 0, otherwise the NCR5380 won't drive the
991*4882a593Smuzhiyun * data bus during SELECTION.
992*4882a593Smuzhiyun */
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, 0);
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun /*
997*4882a593Smuzhiyun * Start arbitration.
998*4882a593Smuzhiyun */
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1001*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_ARBITRATE);
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun /* The chip now waits for BUS FREE phase. Then after the 800 ns
1004*4882a593Smuzhiyun * Bus Free Delay, arbitration will begin.
1005*4882a593Smuzhiyun */
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun spin_unlock_irq(&hostdata->lock);
1008*4882a593Smuzhiyun err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
1009*4882a593Smuzhiyun INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1010*4882a593Smuzhiyun ICR_ARBITRATION_PROGRESS, HZ);
1011*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1012*4882a593Smuzhiyun if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1013*4882a593Smuzhiyun /* Reselection interrupt */
1014*4882a593Smuzhiyun goto out;
1015*4882a593Smuzhiyun }
1016*4882a593Smuzhiyun if (!hostdata->selecting) {
1017*4882a593Smuzhiyun /* Command was aborted */
1018*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
1019*4882a593Smuzhiyun return false;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun if (err < 0) {
1022*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
1023*4882a593Smuzhiyun shost_printk(KERN_ERR, instance,
1024*4882a593Smuzhiyun "select: arbitration timeout\n");
1025*4882a593Smuzhiyun goto out;
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun spin_unlock_irq(&hostdata->lock);
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun /* The SCSI-2 arbitration delay is 2.4 us */
1030*4882a593Smuzhiyun udelay(3);
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun /* Check for lost arbitration */
1033*4882a593Smuzhiyun if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1034*4882a593Smuzhiyun (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1035*4882a593Smuzhiyun (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1036*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
1037*4882a593Smuzhiyun dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1038*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1039*4882a593Smuzhiyun goto out;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun /* After/during arbitration, BSY should be asserted.
1043*4882a593Smuzhiyun * IBM DPES-31080 Version S31Q works now
1044*4882a593Smuzhiyun * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1045*4882a593Smuzhiyun */
1046*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG,
1047*4882a593Smuzhiyun ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun /*
1050*4882a593Smuzhiyun * Again, bus clear + bus settle time is 1.2us, however, this is
1051*4882a593Smuzhiyun * a minimum so we'll udelay ceil(1.2)
1052*4882a593Smuzhiyun */
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1055*4882a593Smuzhiyun udelay(15);
1056*4882a593Smuzhiyun else
1057*4882a593Smuzhiyun udelay(2);
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1062*4882a593Smuzhiyun if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1063*4882a593Smuzhiyun goto out;
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun if (!hostdata->selecting) {
1066*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
1067*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1068*4882a593Smuzhiyun return false;
1069*4882a593Smuzhiyun }
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun /*
1074*4882a593Smuzhiyun * Now that we have won arbitration, start Selection process, asserting
1075*4882a593Smuzhiyun * the host and target ID's on the SCSI bus.
1076*4882a593Smuzhiyun */
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun /*
1081*4882a593Smuzhiyun * Raise ATN while SEL is true before BSY goes false from arbitration,
1082*4882a593Smuzhiyun * since this is the only way to guarantee that we'll get a MESSAGE OUT
1083*4882a593Smuzhiyun * phase immediately after selection.
1084*4882a593Smuzhiyun */
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1087*4882a593Smuzhiyun ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1088*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun /*
1091*4882a593Smuzhiyun * Reselect interrupts must be turned off prior to the dropping of BSY,
1092*4882a593Smuzhiyun * otherwise we will trigger an interrupt.
1093*4882a593Smuzhiyun */
1094*4882a593Smuzhiyun NCR5380_write(SELECT_ENABLE_REG, 0);
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun spin_unlock_irq(&hostdata->lock);
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun /*
1099*4882a593Smuzhiyun * The initiator shall then wait at least two deskew delays and release
1100*4882a593Smuzhiyun * the BSY signal.
1101*4882a593Smuzhiyun */
1102*4882a593Smuzhiyun udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun /* Reset BSY */
1105*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1106*4882a593Smuzhiyun ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun /*
1109*4882a593Smuzhiyun * Something weird happens when we cease to drive BSY - looks
1110*4882a593Smuzhiyun * like the board/chip is letting us do another read before the
1111*4882a593Smuzhiyun * appropriate propagation delay has expired, and we're confusing
1112*4882a593Smuzhiyun * a BSY signal from ourselves as the target's response to SELECTION.
1113*4882a593Smuzhiyun *
1114*4882a593Smuzhiyun * A small delay (the 'C++' frontend breaks the pipeline with an
1115*4882a593Smuzhiyun * unnecessary jump, making it work on my 386-33/Trantor T128, the
1116*4882a593Smuzhiyun * tighter 'C' code breaks and requires this) solves the problem -
1117*4882a593Smuzhiyun * the 1 us delay is arbitrary, and only used because this delay will
1118*4882a593Smuzhiyun * be the same on other platforms and since it works here, it should
1119*4882a593Smuzhiyun * work there.
1120*4882a593Smuzhiyun *
1121*4882a593Smuzhiyun * wingel suggests that this could be due to failing to wait
1122*4882a593Smuzhiyun * one deskew delay.
1123*4882a593Smuzhiyun */
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun udelay(1);
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun /*
1130*4882a593Smuzhiyun * The SCSI specification calls for a 250 ms timeout for the actual
1131*4882a593Smuzhiyun * selection.
1132*4882a593Smuzhiyun */
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1135*4882a593Smuzhiyun msecs_to_jiffies(250));
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1138*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1139*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1140*4882a593Smuzhiyun NCR5380_reselect(instance);
1141*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1142*4882a593Smuzhiyun goto out;
1143*4882a593Smuzhiyun }
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun if (err < 0) {
1146*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1147*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun /* Can't touch cmd if it has been reclaimed by the scsi ML */
1150*4882a593Smuzhiyun if (!hostdata->selecting)
1151*4882a593Smuzhiyun return false;
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun cmd->result = DID_BAD_TARGET << 16;
1154*4882a593Smuzhiyun complete_cmd(instance, cmd);
1155*4882a593Smuzhiyun dsprintk(NDEBUG_SELECTION, instance,
1156*4882a593Smuzhiyun "target did not respond within 250ms\n");
1157*4882a593Smuzhiyun ret = false;
1158*4882a593Smuzhiyun goto out;
1159*4882a593Smuzhiyun }
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun /*
1162*4882a593Smuzhiyun * No less than two deskew delays after the initiator detects the
1163*4882a593Smuzhiyun * BSY signal is true, it shall release the SEL signal and may
1164*4882a593Smuzhiyun * change the DATA BUS. -wingel
1165*4882a593Smuzhiyun */
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun udelay(1);
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun /*
1172*4882a593Smuzhiyun * Since we followed the SCSI spec, and raised ATN while SEL
1173*4882a593Smuzhiyun * was true but before BSY was false during selection, the information
1174*4882a593Smuzhiyun * transfer phase should be a MESSAGE OUT phase so that we can send the
1175*4882a593Smuzhiyun * IDENTIFY message.
1176*4882a593Smuzhiyun */
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun /* Wait for start of REQ/ACK handshake */
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1181*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1182*4882a593Smuzhiyun if (err < 0) {
1183*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1184*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1185*4882a593Smuzhiyun goto out;
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun if (!hostdata->selecting) {
1188*4882a593Smuzhiyun do_abort(instance);
1189*4882a593Smuzhiyun return false;
1190*4882a593Smuzhiyun }
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1193*4882a593Smuzhiyun scmd_id(cmd));
1194*4882a593Smuzhiyun tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun len = 1;
1197*4882a593Smuzhiyun data = tmp;
1198*4882a593Smuzhiyun phase = PHASE_MSGOUT;
1199*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1200*4882a593Smuzhiyun if (len) {
1201*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1202*4882a593Smuzhiyun cmd->result = DID_ERROR << 16;
1203*4882a593Smuzhiyun complete_cmd(instance, cmd);
1204*4882a593Smuzhiyun dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1205*4882a593Smuzhiyun ret = false;
1206*4882a593Smuzhiyun goto out;
1207*4882a593Smuzhiyun }
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun hostdata->connected = cmd;
1212*4882a593Smuzhiyun hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
1215*4882a593Smuzhiyun dregs->csr |= CSR_INTR;
1216*4882a593Smuzhiyun #endif
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun initialize_SCp(cmd);
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun ret = false;
1221*4882a593Smuzhiyun
1222*4882a593Smuzhiyun out:
1223*4882a593Smuzhiyun if (!hostdata->selecting)
1224*4882a593Smuzhiyun return false;
1225*4882a593Smuzhiyun hostdata->selecting = NULL;
1226*4882a593Smuzhiyun return ret;
1227*4882a593Smuzhiyun }
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun /*
1230*4882a593Smuzhiyun * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1231*4882a593Smuzhiyun * unsigned char *phase, int *count, unsigned char **data)
1232*4882a593Smuzhiyun *
1233*4882a593Smuzhiyun * Purpose : transfers data in given phase using polled I/O
1234*4882a593Smuzhiyun *
1235*4882a593Smuzhiyun * Inputs : instance - instance of driver, *phase - pointer to
1236*4882a593Smuzhiyun * what phase is expected, *count - pointer to number of
1237*4882a593Smuzhiyun * bytes to transfer, **data - pointer to data pointer.
1238*4882a593Smuzhiyun *
1239*4882a593Smuzhiyun * Returns : -1 when different phase is entered without transferring
1240*4882a593Smuzhiyun * maximum number of bytes, 0 if all bytes are transferred or exit
1241*4882a593Smuzhiyun * is in same phase.
1242*4882a593Smuzhiyun *
1243*4882a593Smuzhiyun * Also, *phase, *count, *data are modified in place.
1244*4882a593Smuzhiyun *
1245*4882a593Smuzhiyun * XXX Note : handling for bus free may be useful.
1246*4882a593Smuzhiyun */
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun /*
1249*4882a593Smuzhiyun * Note : this code is not as quick as it could be, however it
1250*4882a593Smuzhiyun * IS 100% reliable, and for the actual data transfer where speed
1251*4882a593Smuzhiyun * counts, we will always do a pseudo DMA or DMA transfer.
1252*4882a593Smuzhiyun */
1253*4882a593Smuzhiyun
NCR5380_transfer_pio(struct Scsi_Host * instance,unsigned char * phase,int * count,unsigned char ** data)1254*4882a593Smuzhiyun static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1255*4882a593Smuzhiyun unsigned char *phase, int *count,
1256*4882a593Smuzhiyun unsigned char **data)
1257*4882a593Smuzhiyun {
1258*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
1259*4882a593Smuzhiyun unsigned char p = *phase, tmp;
1260*4882a593Smuzhiyun int c = *count;
1261*4882a593Smuzhiyun unsigned char *d = *data;
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun /*
1264*4882a593Smuzhiyun * The NCR5380 chip will only drive the SCSI bus when the
1265*4882a593Smuzhiyun * phase specified in the appropriate bits of the TARGET COMMAND
1266*4882a593Smuzhiyun * REGISTER match the STATUS REGISTER
1267*4882a593Smuzhiyun */
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun do {
1272*4882a593Smuzhiyun /*
1273*4882a593Smuzhiyun * Wait for assertion of REQ, after which the phase bits will be
1274*4882a593Smuzhiyun * valid
1275*4882a593Smuzhiyun */
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1278*4882a593Smuzhiyun break;
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun /* Check for phase mismatch */
1283*4882a593Smuzhiyun if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1284*4882a593Smuzhiyun dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1285*4882a593Smuzhiyun NCR5380_dprint_phase(NDEBUG_PIO, instance);
1286*4882a593Smuzhiyun break;
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun /* Do actual transfer from SCSI bus to / from memory */
1290*4882a593Smuzhiyun if (!(p & SR_IO))
1291*4882a593Smuzhiyun NCR5380_write(OUTPUT_DATA_REG, *d);
1292*4882a593Smuzhiyun else
1293*4882a593Smuzhiyun *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1294*4882a593Smuzhiyun
1295*4882a593Smuzhiyun ++d;
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun /*
1298*4882a593Smuzhiyun * The SCSI standard suggests that in MSGOUT phase, the initiator
1299*4882a593Smuzhiyun * should drop ATN on the last byte of the message phase
1300*4882a593Smuzhiyun * after REQ has been asserted for the handshake but before
1301*4882a593Smuzhiyun * the initiator raises ACK.
1302*4882a593Smuzhiyun */
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun if (!(p & SR_IO)) {
1305*4882a593Smuzhiyun if (!((p & SR_MSG) && c > 1)) {
1306*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1307*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_PIO, instance);
1308*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1309*4882a593Smuzhiyun ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1310*4882a593Smuzhiyun } else {
1311*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1312*4882a593Smuzhiyun ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1313*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_PIO, instance);
1314*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1315*4882a593Smuzhiyun ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun } else {
1318*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_PIO, instance);
1319*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1320*4882a593Smuzhiyun }
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun if (NCR5380_poll_politely(hostdata,
1323*4882a593Smuzhiyun STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1324*4882a593Smuzhiyun break;
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun /*
1329*4882a593Smuzhiyun * We have several special cases to consider during REQ/ACK handshaking :
1330*4882a593Smuzhiyun * 1. We were in MSGOUT phase, and we are on the last byte of the
1331*4882a593Smuzhiyun * message. ATN must be dropped as ACK is dropped.
1332*4882a593Smuzhiyun *
1333*4882a593Smuzhiyun * 2. We are in a MSGIN phase, and we are on the last byte of the
1334*4882a593Smuzhiyun * message. We must exit with ACK asserted, so that the calling
1335*4882a593Smuzhiyun * code may raise ATN before dropping ACK to reject the message.
1336*4882a593Smuzhiyun *
1337*4882a593Smuzhiyun * 3. ACK and ATN are clear and the target may proceed as normal.
1338*4882a593Smuzhiyun */
1339*4882a593Smuzhiyun if (!(p == PHASE_MSGIN && c == 1)) {
1340*4882a593Smuzhiyun if (p == PHASE_MSGOUT && c > 1)
1341*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1342*4882a593Smuzhiyun else
1343*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1344*4882a593Smuzhiyun }
1345*4882a593Smuzhiyun } while (--c);
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun *count = c;
1350*4882a593Smuzhiyun *data = d;
1351*4882a593Smuzhiyun tmp = NCR5380_read(STATUS_REG);
1352*4882a593Smuzhiyun /* The phase read from the bus is valid if either REQ is (already)
1353*4882a593Smuzhiyun * asserted or if ACK hasn't been released yet. The latter applies if
1354*4882a593Smuzhiyun * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1355*4882a593Smuzhiyun */
1356*4882a593Smuzhiyun if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1357*4882a593Smuzhiyun *phase = tmp & PHASE_MASK;
1358*4882a593Smuzhiyun else
1359*4882a593Smuzhiyun *phase = PHASE_UNKNOWN;
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun if (!c || (*phase == p))
1362*4882a593Smuzhiyun return 0;
1363*4882a593Smuzhiyun else
1364*4882a593Smuzhiyun return -1;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun /**
1368*4882a593Smuzhiyun * do_reset - issue a reset command
1369*4882a593Smuzhiyun * @instance: adapter to reset
1370*4882a593Smuzhiyun *
1371*4882a593Smuzhiyun * Issue a reset sequence to the NCR5380 and try and get the bus
1372*4882a593Smuzhiyun * back into sane shape.
1373*4882a593Smuzhiyun *
1374*4882a593Smuzhiyun * This clears the reset interrupt flag because there may be no handler for
1375*4882a593Smuzhiyun * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1376*4882a593Smuzhiyun * been installed. And when in EH we may have released the ST DMA interrupt.
1377*4882a593Smuzhiyun */
1378*4882a593Smuzhiyun
do_reset(struct Scsi_Host * instance)1379*4882a593Smuzhiyun static void do_reset(struct Scsi_Host *instance)
1380*4882a593Smuzhiyun {
1381*4882a593Smuzhiyun struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1382*4882a593Smuzhiyun unsigned long flags;
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun local_irq_save(flags);
1385*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG,
1386*4882a593Smuzhiyun PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1387*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1388*4882a593Smuzhiyun udelay(50);
1389*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1390*4882a593Smuzhiyun (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1391*4882a593Smuzhiyun local_irq_restore(flags);
1392*4882a593Smuzhiyun }
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun /**
1395*4882a593Smuzhiyun * do_abort - abort the currently established nexus by going to
1396*4882a593Smuzhiyun * MESSAGE OUT phase and sending an ABORT message.
1397*4882a593Smuzhiyun * @instance: relevant scsi host instance
1398*4882a593Smuzhiyun *
1399*4882a593Smuzhiyun * Returns 0 on success, negative error code on failure.
1400*4882a593Smuzhiyun */
1401*4882a593Smuzhiyun
do_abort(struct Scsi_Host * instance)1402*4882a593Smuzhiyun static int do_abort(struct Scsi_Host *instance)
1403*4882a593Smuzhiyun {
1404*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
1405*4882a593Smuzhiyun unsigned char *msgptr, phase, tmp;
1406*4882a593Smuzhiyun int len;
1407*4882a593Smuzhiyun int rc;
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun /* Request message out phase */
1410*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1411*4882a593Smuzhiyun
1412*4882a593Smuzhiyun /*
1413*4882a593Smuzhiyun * Wait for the target to indicate a valid phase by asserting
1414*4882a593Smuzhiyun * REQ. Once this happens, we'll have either a MSGOUT phase
1415*4882a593Smuzhiyun * and can immediately send the ABORT message, or we'll have some
1416*4882a593Smuzhiyun * other phase and will have to source/sink data.
1417*4882a593Smuzhiyun *
1418*4882a593Smuzhiyun * We really don't care what value was on the bus or what value
1419*4882a593Smuzhiyun * the target sees, so we just handshake.
1420*4882a593Smuzhiyun */
1421*4882a593Smuzhiyun
1422*4882a593Smuzhiyun rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1423*4882a593Smuzhiyun if (rc < 0)
1424*4882a593Smuzhiyun goto out;
1425*4882a593Smuzhiyun
1426*4882a593Smuzhiyun tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1429*4882a593Smuzhiyun
1430*4882a593Smuzhiyun if (tmp != PHASE_MSGOUT) {
1431*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG,
1432*4882a593Smuzhiyun ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1433*4882a593Smuzhiyun rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1434*4882a593Smuzhiyun if (rc < 0)
1435*4882a593Smuzhiyun goto out;
1436*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1437*4882a593Smuzhiyun }
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun tmp = ABORT;
1440*4882a593Smuzhiyun msgptr = &tmp;
1441*4882a593Smuzhiyun len = 1;
1442*4882a593Smuzhiyun phase = PHASE_MSGOUT;
1443*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1444*4882a593Smuzhiyun if (len)
1445*4882a593Smuzhiyun rc = -ENXIO;
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun /*
1448*4882a593Smuzhiyun * If we got here, and the command completed successfully,
1449*4882a593Smuzhiyun * we're about to go into bus free state.
1450*4882a593Smuzhiyun */
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun out:
1453*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1454*4882a593Smuzhiyun return rc;
1455*4882a593Smuzhiyun }
1456*4882a593Smuzhiyun
1457*4882a593Smuzhiyun /*
1458*4882a593Smuzhiyun * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1459*4882a593Smuzhiyun * unsigned char *phase, int *count, unsigned char **data)
1460*4882a593Smuzhiyun *
1461*4882a593Smuzhiyun * Purpose : transfers data in given phase using either real
1462*4882a593Smuzhiyun * or pseudo DMA.
1463*4882a593Smuzhiyun *
1464*4882a593Smuzhiyun * Inputs : instance - instance of driver, *phase - pointer to
1465*4882a593Smuzhiyun * what phase is expected, *count - pointer to number of
1466*4882a593Smuzhiyun * bytes to transfer, **data - pointer to data pointer.
1467*4882a593Smuzhiyun *
1468*4882a593Smuzhiyun * Returns : -1 when different phase is entered without transferring
1469*4882a593Smuzhiyun * maximum number of bytes, 0 if all bytes or transferred or exit
1470*4882a593Smuzhiyun * is in same phase.
1471*4882a593Smuzhiyun *
1472*4882a593Smuzhiyun * Also, *phase, *count, *data are modified in place.
1473*4882a593Smuzhiyun */
1474*4882a593Smuzhiyun
1475*4882a593Smuzhiyun
NCR5380_transfer_dma(struct Scsi_Host * instance,unsigned char * phase,int * count,unsigned char ** data)1476*4882a593Smuzhiyun static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1477*4882a593Smuzhiyun unsigned char *phase, int *count,
1478*4882a593Smuzhiyun unsigned char **data)
1479*4882a593Smuzhiyun {
1480*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
1481*4882a593Smuzhiyun int c = *count;
1482*4882a593Smuzhiyun unsigned char p = *phase;
1483*4882a593Smuzhiyun unsigned char *d = *data;
1484*4882a593Smuzhiyun unsigned char tmp;
1485*4882a593Smuzhiyun int result = 0;
1486*4882a593Smuzhiyun
1487*4882a593Smuzhiyun if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1488*4882a593Smuzhiyun *phase = tmp;
1489*4882a593Smuzhiyun return -1;
1490*4882a593Smuzhiyun }
1491*4882a593Smuzhiyun
1492*4882a593Smuzhiyun hostdata->connected->SCp.phase = p;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun if (p & SR_IO) {
1495*4882a593Smuzhiyun if (hostdata->read_overruns)
1496*4882a593Smuzhiyun c -= hostdata->read_overruns;
1497*4882a593Smuzhiyun else if (hostdata->flags & FLAG_DMA_FIXUP)
1498*4882a593Smuzhiyun --c;
1499*4882a593Smuzhiyun }
1500*4882a593Smuzhiyun
1501*4882a593Smuzhiyun dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1502*4882a593Smuzhiyun (p & SR_IO) ? "receive" : "send", c, d);
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun #ifdef CONFIG_SUN3
1505*4882a593Smuzhiyun /* send start chain */
1506*4882a593Smuzhiyun sun3scsi_dma_start(c, *data);
1507*4882a593Smuzhiyun #endif
1508*4882a593Smuzhiyun
1509*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1510*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1511*4882a593Smuzhiyun MR_ENABLE_EOP_INTR);
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1514*4882a593Smuzhiyun /* On the Medusa, it is a must to initialize the DMA before
1515*4882a593Smuzhiyun * starting the NCR. This is also the cleaner way for the TT.
1516*4882a593Smuzhiyun */
1517*4882a593Smuzhiyun if (p & SR_IO)
1518*4882a593Smuzhiyun result = NCR5380_dma_recv_setup(hostdata, d, c);
1519*4882a593Smuzhiyun else
1520*4882a593Smuzhiyun result = NCR5380_dma_send_setup(hostdata, d, c);
1521*4882a593Smuzhiyun }
1522*4882a593Smuzhiyun
1523*4882a593Smuzhiyun /*
1524*4882a593Smuzhiyun * On the PAS16 at least I/O recovery delays are not needed here.
1525*4882a593Smuzhiyun * Everyone else seems to want them.
1526*4882a593Smuzhiyun */
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun if (p & SR_IO) {
1529*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1530*4882a593Smuzhiyun NCR5380_io_delay(1);
1531*4882a593Smuzhiyun NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1532*4882a593Smuzhiyun } else {
1533*4882a593Smuzhiyun NCR5380_io_delay(1);
1534*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1535*4882a593Smuzhiyun NCR5380_io_delay(1);
1536*4882a593Smuzhiyun NCR5380_write(START_DMA_SEND_REG, 0);
1537*4882a593Smuzhiyun NCR5380_io_delay(1);
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun #ifdef CONFIG_SUN3
1541*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
1542*4882a593Smuzhiyun dregs->csr |= CSR_DMA_ENABLE;
1543*4882a593Smuzhiyun #endif
1544*4882a593Smuzhiyun sun3_dma_active = 1;
1545*4882a593Smuzhiyun #endif
1546*4882a593Smuzhiyun
1547*4882a593Smuzhiyun if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1548*4882a593Smuzhiyun /* On the Falcon, the DMA setup must be done after the last
1549*4882a593Smuzhiyun * NCR access, else the DMA setup gets trashed!
1550*4882a593Smuzhiyun */
1551*4882a593Smuzhiyun if (p & SR_IO)
1552*4882a593Smuzhiyun result = NCR5380_dma_recv_setup(hostdata, d, c);
1553*4882a593Smuzhiyun else
1554*4882a593Smuzhiyun result = NCR5380_dma_send_setup(hostdata, d, c);
1555*4882a593Smuzhiyun }
1556*4882a593Smuzhiyun
1557*4882a593Smuzhiyun /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1558*4882a593Smuzhiyun if (result < 0)
1559*4882a593Smuzhiyun return result;
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun /* For real DMA, result is the byte count. DMA interrupt is expected. */
1562*4882a593Smuzhiyun if (result > 0) {
1563*4882a593Smuzhiyun hostdata->dma_len = result;
1564*4882a593Smuzhiyun return 0;
1565*4882a593Smuzhiyun }
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun /* The result is zero iff pseudo DMA send/receive was completed. */
1568*4882a593Smuzhiyun hostdata->dma_len = c;
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun /*
1571*4882a593Smuzhiyun * A note regarding the DMA errata workarounds for early NMOS silicon.
1572*4882a593Smuzhiyun *
1573*4882a593Smuzhiyun * For DMA sends, we want to wait until the last byte has been
1574*4882a593Smuzhiyun * transferred out over the bus before we turn off DMA mode. Alas, there
1575*4882a593Smuzhiyun * seems to be no terribly good way of doing this on a 5380 under all
1576*4882a593Smuzhiyun * conditions. For non-scatter-gather operations, we can wait until REQ
1577*4882a593Smuzhiyun * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1578*4882a593Smuzhiyun * are nastier, since the device will be expecting more data than we
1579*4882a593Smuzhiyun * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1580*4882a593Smuzhiyun * could test Last Byte Sent to assure transfer (I imagine this is precisely
1581*4882a593Smuzhiyun * why this signal was added to the newer chips) but on the older 538[01]
1582*4882a593Smuzhiyun * this signal does not exist. The workaround for this lack is a watchdog;
1583*4882a593Smuzhiyun * we bail out of the wait-loop after a modest amount of wait-time if
1584*4882a593Smuzhiyun * the usual exit conditions are not met. Not a terribly clean or
1585*4882a593Smuzhiyun * correct solution :-%
1586*4882a593Smuzhiyun *
1587*4882a593Smuzhiyun * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1588*4882a593Smuzhiyun * If the chip is in DMA receive mode, it will respond to a target's
1589*4882a593Smuzhiyun * REQ by latching the SCSI data into the INPUT DATA register and asserting
1590*4882a593Smuzhiyun * ACK, even if it has _already_ been notified by the DMA controller that
1591*4882a593Smuzhiyun * the current DMA transfer has completed! If the NCR5380 is then taken
1592*4882a593Smuzhiyun * out of DMA mode, this already-acknowledged byte is lost. This is
1593*4882a593Smuzhiyun * not a problem for "one DMA transfer per READ command", because
1594*4882a593Smuzhiyun * the situation will never arise... either all of the data is DMA'ed
1595*4882a593Smuzhiyun * properly, or the target switches to MESSAGE IN phase to signal a
1596*4882a593Smuzhiyun * disconnection (either operation bringing the DMA to a clean halt).
1597*4882a593Smuzhiyun * However, in order to handle scatter-receive, we must work around the
1598*4882a593Smuzhiyun * problem. The chosen fix is to DMA fewer bytes, then check for the
1599*4882a593Smuzhiyun * condition before taking the NCR5380 out of DMA mode. One or two extra
1600*4882a593Smuzhiyun * bytes are transferred via PIO as necessary to fill out the original
1601*4882a593Smuzhiyun * request.
1602*4882a593Smuzhiyun */
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun if (hostdata->flags & FLAG_DMA_FIXUP) {
1605*4882a593Smuzhiyun if (p & SR_IO) {
1606*4882a593Smuzhiyun /*
1607*4882a593Smuzhiyun * The workaround was to transfer fewer bytes than we
1608*4882a593Smuzhiyun * intended to with the pseudo-DMA read function, wait for
1609*4882a593Smuzhiyun * the chip to latch the last byte, read it, and then disable
1610*4882a593Smuzhiyun * pseudo-DMA mode.
1611*4882a593Smuzhiyun *
1612*4882a593Smuzhiyun * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1613*4882a593Smuzhiyun * REQ is deasserted when ACK is asserted, and not reasserted
1614*4882a593Smuzhiyun * until ACK goes false. Since the NCR5380 won't lower ACK
1615*4882a593Smuzhiyun * until DACK is asserted, which won't happen unless we twiddle
1616*4882a593Smuzhiyun * the DMA port or we take the NCR5380 out of DMA mode, we
1617*4882a593Smuzhiyun * can guarantee that we won't handshake another extra
1618*4882a593Smuzhiyun * byte.
1619*4882a593Smuzhiyun */
1620*4882a593Smuzhiyun
1621*4882a593Smuzhiyun if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1622*4882a593Smuzhiyun BASR_DRQ, BASR_DRQ, HZ) < 0) {
1623*4882a593Smuzhiyun result = -1;
1624*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1625*4882a593Smuzhiyun }
1626*4882a593Smuzhiyun if (NCR5380_poll_politely(hostdata, STATUS_REG,
1627*4882a593Smuzhiyun SR_REQ, 0, HZ) < 0) {
1628*4882a593Smuzhiyun result = -1;
1629*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1630*4882a593Smuzhiyun }
1631*4882a593Smuzhiyun d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1632*4882a593Smuzhiyun } else {
1633*4882a593Smuzhiyun /*
1634*4882a593Smuzhiyun * Wait for the last byte to be sent. If REQ is being asserted for
1635*4882a593Smuzhiyun * the byte we're interested, we'll ACK it and it will go false.
1636*4882a593Smuzhiyun */
1637*4882a593Smuzhiyun if (NCR5380_poll_politely2(hostdata,
1638*4882a593Smuzhiyun BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1639*4882a593Smuzhiyun BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1640*4882a593Smuzhiyun result = -1;
1641*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1642*4882a593Smuzhiyun }
1643*4882a593Smuzhiyun }
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun NCR5380_dma_complete(instance);
1647*4882a593Smuzhiyun return result;
1648*4882a593Smuzhiyun }
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun /*
1651*4882a593Smuzhiyun * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1652*4882a593Smuzhiyun *
1653*4882a593Smuzhiyun * Purpose : run through the various SCSI phases and do as the target
1654*4882a593Smuzhiyun * directs us to. Operates on the currently connected command,
1655*4882a593Smuzhiyun * instance->connected.
1656*4882a593Smuzhiyun *
1657*4882a593Smuzhiyun * Inputs : instance, instance for which we are doing commands
1658*4882a593Smuzhiyun *
1659*4882a593Smuzhiyun * Side effects : SCSI things happen, the disconnected queue will be
1660*4882a593Smuzhiyun * modified if a command disconnects, *instance->connected will
1661*4882a593Smuzhiyun * change.
1662*4882a593Smuzhiyun *
1663*4882a593Smuzhiyun * XXX Note : we need to watch for bus free or a reset condition here
1664*4882a593Smuzhiyun * to recover from an unexpected bus free condition.
1665*4882a593Smuzhiyun */
1666*4882a593Smuzhiyun
NCR5380_information_transfer(struct Scsi_Host * instance)1667*4882a593Smuzhiyun static void NCR5380_information_transfer(struct Scsi_Host *instance)
1668*4882a593Smuzhiyun __releases(&hostdata->lock) __acquires(&hostdata->lock)
1669*4882a593Smuzhiyun {
1670*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
1671*4882a593Smuzhiyun unsigned char msgout = NOP;
1672*4882a593Smuzhiyun int sink = 0;
1673*4882a593Smuzhiyun int len;
1674*4882a593Smuzhiyun int transfersize;
1675*4882a593Smuzhiyun unsigned char *data;
1676*4882a593Smuzhiyun unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1677*4882a593Smuzhiyun struct scsi_cmnd *cmd;
1678*4882a593Smuzhiyun
1679*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
1680*4882a593Smuzhiyun dregs->csr |= CSR_INTR;
1681*4882a593Smuzhiyun #endif
1682*4882a593Smuzhiyun
1683*4882a593Smuzhiyun while ((cmd = hostdata->connected)) {
1684*4882a593Smuzhiyun struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1685*4882a593Smuzhiyun
1686*4882a593Smuzhiyun tmp = NCR5380_read(STATUS_REG);
1687*4882a593Smuzhiyun /* We only have a valid SCSI phase when REQ is asserted */
1688*4882a593Smuzhiyun if (tmp & SR_REQ) {
1689*4882a593Smuzhiyun phase = (tmp & PHASE_MASK);
1690*4882a593Smuzhiyun if (phase != old_phase) {
1691*4882a593Smuzhiyun old_phase = phase;
1692*4882a593Smuzhiyun NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1693*4882a593Smuzhiyun }
1694*4882a593Smuzhiyun #ifdef CONFIG_SUN3
1695*4882a593Smuzhiyun if (phase == PHASE_CMDOUT &&
1696*4882a593Smuzhiyun sun3_dma_setup_done != cmd) {
1697*4882a593Smuzhiyun int count;
1698*4882a593Smuzhiyun
1699*4882a593Smuzhiyun advance_sg_buffer(cmd);
1700*4882a593Smuzhiyun
1701*4882a593Smuzhiyun count = sun3scsi_dma_xfer_len(hostdata, cmd);
1702*4882a593Smuzhiyun
1703*4882a593Smuzhiyun if (count > 0) {
1704*4882a593Smuzhiyun if (rq_data_dir(cmd->request))
1705*4882a593Smuzhiyun sun3scsi_dma_send_setup(hostdata,
1706*4882a593Smuzhiyun cmd->SCp.ptr, count);
1707*4882a593Smuzhiyun else
1708*4882a593Smuzhiyun sun3scsi_dma_recv_setup(hostdata,
1709*4882a593Smuzhiyun cmd->SCp.ptr, count);
1710*4882a593Smuzhiyun sun3_dma_setup_done = cmd;
1711*4882a593Smuzhiyun }
1712*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
1713*4882a593Smuzhiyun dregs->csr |= CSR_INTR;
1714*4882a593Smuzhiyun #endif
1715*4882a593Smuzhiyun }
1716*4882a593Smuzhiyun #endif /* CONFIG_SUN3 */
1717*4882a593Smuzhiyun
1718*4882a593Smuzhiyun if (sink && (phase != PHASE_MSGOUT)) {
1719*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1720*4882a593Smuzhiyun
1721*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1722*4882a593Smuzhiyun ICR_ASSERT_ACK);
1723*4882a593Smuzhiyun while (NCR5380_read(STATUS_REG) & SR_REQ)
1724*4882a593Smuzhiyun ;
1725*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1726*4882a593Smuzhiyun ICR_ASSERT_ATN);
1727*4882a593Smuzhiyun sink = 0;
1728*4882a593Smuzhiyun continue;
1729*4882a593Smuzhiyun }
1730*4882a593Smuzhiyun
1731*4882a593Smuzhiyun switch (phase) {
1732*4882a593Smuzhiyun case PHASE_DATAOUT:
1733*4882a593Smuzhiyun #if (NDEBUG & NDEBUG_NO_DATAOUT)
1734*4882a593Smuzhiyun shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1735*4882a593Smuzhiyun sink = 1;
1736*4882a593Smuzhiyun do_abort(instance);
1737*4882a593Smuzhiyun cmd->result = DID_ERROR << 16;
1738*4882a593Smuzhiyun complete_cmd(instance, cmd);
1739*4882a593Smuzhiyun hostdata->connected = NULL;
1740*4882a593Smuzhiyun hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1741*4882a593Smuzhiyun return;
1742*4882a593Smuzhiyun #endif
1743*4882a593Smuzhiyun case PHASE_DATAIN:
1744*4882a593Smuzhiyun /*
1745*4882a593Smuzhiyun * If there is no room left in the current buffer in the
1746*4882a593Smuzhiyun * scatter-gather list, move onto the next one.
1747*4882a593Smuzhiyun */
1748*4882a593Smuzhiyun
1749*4882a593Smuzhiyun advance_sg_buffer(cmd);
1750*4882a593Smuzhiyun dsprintk(NDEBUG_INFORMATION, instance,
1751*4882a593Smuzhiyun "this residual %d, sg ents %d\n",
1752*4882a593Smuzhiyun cmd->SCp.this_residual,
1753*4882a593Smuzhiyun sg_nents(cmd->SCp.buffer));
1754*4882a593Smuzhiyun
1755*4882a593Smuzhiyun /*
1756*4882a593Smuzhiyun * The preferred transfer method is going to be
1757*4882a593Smuzhiyun * PSEUDO-DMA for systems that are strictly PIO,
1758*4882a593Smuzhiyun * since we can let the hardware do the handshaking.
1759*4882a593Smuzhiyun *
1760*4882a593Smuzhiyun * For this to work, we need to know the transfersize
1761*4882a593Smuzhiyun * ahead of time, since the pseudo-DMA code will sit
1762*4882a593Smuzhiyun * in an unconditional loop.
1763*4882a593Smuzhiyun */
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun transfersize = 0;
1766*4882a593Smuzhiyun if (!cmd->device->borken)
1767*4882a593Smuzhiyun transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun if (transfersize > 0) {
1770*4882a593Smuzhiyun len = transfersize;
1771*4882a593Smuzhiyun if (NCR5380_transfer_dma(instance, &phase,
1772*4882a593Smuzhiyun &len, (unsigned char **)&cmd->SCp.ptr)) {
1773*4882a593Smuzhiyun /*
1774*4882a593Smuzhiyun * If the watchdog timer fires, all future
1775*4882a593Smuzhiyun * accesses to this device will use the
1776*4882a593Smuzhiyun * polled-IO.
1777*4882a593Smuzhiyun */
1778*4882a593Smuzhiyun scmd_printk(KERN_INFO, cmd,
1779*4882a593Smuzhiyun "switching to slow handshake\n");
1780*4882a593Smuzhiyun cmd->device->borken = 1;
1781*4882a593Smuzhiyun do_reset(instance);
1782*4882a593Smuzhiyun bus_reset_cleanup(instance);
1783*4882a593Smuzhiyun }
1784*4882a593Smuzhiyun } else {
1785*4882a593Smuzhiyun /* Transfer a small chunk so that the
1786*4882a593Smuzhiyun * irq mode lock is not held too long.
1787*4882a593Smuzhiyun */
1788*4882a593Smuzhiyun transfersize = min(cmd->SCp.this_residual,
1789*4882a593Smuzhiyun NCR5380_PIO_CHUNK_SIZE);
1790*4882a593Smuzhiyun len = transfersize;
1791*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len,
1792*4882a593Smuzhiyun (unsigned char **)&cmd->SCp.ptr);
1793*4882a593Smuzhiyun cmd->SCp.this_residual -= transfersize - len;
1794*4882a593Smuzhiyun }
1795*4882a593Smuzhiyun #ifdef CONFIG_SUN3
1796*4882a593Smuzhiyun if (sun3_dma_setup_done == cmd)
1797*4882a593Smuzhiyun sun3_dma_setup_done = NULL;
1798*4882a593Smuzhiyun #endif
1799*4882a593Smuzhiyun return;
1800*4882a593Smuzhiyun case PHASE_MSGIN:
1801*4882a593Smuzhiyun len = 1;
1802*4882a593Smuzhiyun data = &tmp;
1803*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1804*4882a593Smuzhiyun cmd->SCp.Message = tmp;
1805*4882a593Smuzhiyun
1806*4882a593Smuzhiyun switch (tmp) {
1807*4882a593Smuzhiyun case ABORT:
1808*4882a593Smuzhiyun case COMMAND_COMPLETE:
1809*4882a593Smuzhiyun /* Accept message by clearing ACK */
1810*4882a593Smuzhiyun sink = 1;
1811*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1812*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance,
1813*4882a593Smuzhiyun "COMMAND COMPLETE %p target %d lun %llu\n",
1814*4882a593Smuzhiyun cmd, scmd_id(cmd), cmd->device->lun);
1815*4882a593Smuzhiyun
1816*4882a593Smuzhiyun hostdata->connected = NULL;
1817*4882a593Smuzhiyun hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1818*4882a593Smuzhiyun
1819*4882a593Smuzhiyun cmd->result &= ~0xffff;
1820*4882a593Smuzhiyun cmd->result |= cmd->SCp.Status;
1821*4882a593Smuzhiyun cmd->result |= cmd->SCp.Message << 8;
1822*4882a593Smuzhiyun
1823*4882a593Smuzhiyun set_resid_from_SCp(cmd);
1824*4882a593Smuzhiyun
1825*4882a593Smuzhiyun if (cmd->cmnd[0] == REQUEST_SENSE)
1826*4882a593Smuzhiyun complete_cmd(instance, cmd);
1827*4882a593Smuzhiyun else {
1828*4882a593Smuzhiyun if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1829*4882a593Smuzhiyun cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1830*4882a593Smuzhiyun dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1831*4882a593Smuzhiyun cmd);
1832*4882a593Smuzhiyun list_add_tail(&ncmd->list,
1833*4882a593Smuzhiyun &hostdata->autosense);
1834*4882a593Smuzhiyun } else
1835*4882a593Smuzhiyun complete_cmd(instance, cmd);
1836*4882a593Smuzhiyun }
1837*4882a593Smuzhiyun
1838*4882a593Smuzhiyun /*
1839*4882a593Smuzhiyun * Restore phase bits to 0 so an interrupted selection,
1840*4882a593Smuzhiyun * arbitration can resume.
1841*4882a593Smuzhiyun */
1842*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, 0);
1843*4882a593Smuzhiyun
1844*4882a593Smuzhiyun maybe_release_dma_irq(instance);
1845*4882a593Smuzhiyun return;
1846*4882a593Smuzhiyun case MESSAGE_REJECT:
1847*4882a593Smuzhiyun /* Accept message by clearing ACK */
1848*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1849*4882a593Smuzhiyun switch (hostdata->last_message) {
1850*4882a593Smuzhiyun case HEAD_OF_QUEUE_TAG:
1851*4882a593Smuzhiyun case ORDERED_QUEUE_TAG:
1852*4882a593Smuzhiyun case SIMPLE_QUEUE_TAG:
1853*4882a593Smuzhiyun cmd->device->simple_tags = 0;
1854*4882a593Smuzhiyun hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1855*4882a593Smuzhiyun break;
1856*4882a593Smuzhiyun default:
1857*4882a593Smuzhiyun break;
1858*4882a593Smuzhiyun }
1859*4882a593Smuzhiyun break;
1860*4882a593Smuzhiyun case DISCONNECT:
1861*4882a593Smuzhiyun /* Accept message by clearing ACK */
1862*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1863*4882a593Smuzhiyun hostdata->connected = NULL;
1864*4882a593Smuzhiyun list_add(&ncmd->list, &hostdata->disconnected);
1865*4882a593Smuzhiyun dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1866*4882a593Smuzhiyun instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1867*4882a593Smuzhiyun cmd, scmd_id(cmd), cmd->device->lun);
1868*4882a593Smuzhiyun
1869*4882a593Smuzhiyun /*
1870*4882a593Smuzhiyun * Restore phase bits to 0 so an interrupted selection,
1871*4882a593Smuzhiyun * arbitration can resume.
1872*4882a593Smuzhiyun */
1873*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, 0);
1874*4882a593Smuzhiyun
1875*4882a593Smuzhiyun #ifdef SUN3_SCSI_VME
1876*4882a593Smuzhiyun dregs->csr |= CSR_DMA_ENABLE;
1877*4882a593Smuzhiyun #endif
1878*4882a593Smuzhiyun return;
1879*4882a593Smuzhiyun /*
1880*4882a593Smuzhiyun * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1881*4882a593Smuzhiyun * operation, in violation of the SCSI spec so we can safely
1882*4882a593Smuzhiyun * ignore SAVE/RESTORE pointers calls.
1883*4882a593Smuzhiyun *
1884*4882a593Smuzhiyun * Unfortunately, some disks violate the SCSI spec and
1885*4882a593Smuzhiyun * don't issue the required SAVE_POINTERS message before
1886*4882a593Smuzhiyun * disconnecting, and we have to break spec to remain
1887*4882a593Smuzhiyun * compatible.
1888*4882a593Smuzhiyun */
1889*4882a593Smuzhiyun case SAVE_POINTERS:
1890*4882a593Smuzhiyun case RESTORE_POINTERS:
1891*4882a593Smuzhiyun /* Accept message by clearing ACK */
1892*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1893*4882a593Smuzhiyun break;
1894*4882a593Smuzhiyun case EXTENDED_MESSAGE:
1895*4882a593Smuzhiyun /*
1896*4882a593Smuzhiyun * Start the message buffer with the EXTENDED_MESSAGE
1897*4882a593Smuzhiyun * byte, since spi_print_msg() wants the whole thing.
1898*4882a593Smuzhiyun */
1899*4882a593Smuzhiyun extended_msg[0] = EXTENDED_MESSAGE;
1900*4882a593Smuzhiyun /* Accept first byte by clearing ACK */
1901*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1902*4882a593Smuzhiyun
1903*4882a593Smuzhiyun spin_unlock_irq(&hostdata->lock);
1904*4882a593Smuzhiyun
1905*4882a593Smuzhiyun dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun len = 2;
1908*4882a593Smuzhiyun data = extended_msg + 1;
1909*4882a593Smuzhiyun phase = PHASE_MSGIN;
1910*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1911*4882a593Smuzhiyun dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1912*4882a593Smuzhiyun (int)extended_msg[1],
1913*4882a593Smuzhiyun (int)extended_msg[2]);
1914*4882a593Smuzhiyun
1915*4882a593Smuzhiyun if (!len && extended_msg[1] > 0 &&
1916*4882a593Smuzhiyun extended_msg[1] <= sizeof(extended_msg) - 2) {
1917*4882a593Smuzhiyun /* Accept third byte by clearing ACK */
1918*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1919*4882a593Smuzhiyun len = extended_msg[1] - 1;
1920*4882a593Smuzhiyun data = extended_msg + 3;
1921*4882a593Smuzhiyun phase = PHASE_MSGIN;
1922*4882a593Smuzhiyun
1923*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1924*4882a593Smuzhiyun dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1925*4882a593Smuzhiyun len);
1926*4882a593Smuzhiyun
1927*4882a593Smuzhiyun switch (extended_msg[2]) {
1928*4882a593Smuzhiyun case EXTENDED_SDTR:
1929*4882a593Smuzhiyun case EXTENDED_WDTR:
1930*4882a593Smuzhiyun tmp = 0;
1931*4882a593Smuzhiyun }
1932*4882a593Smuzhiyun } else if (len) {
1933*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1934*4882a593Smuzhiyun tmp = 0;
1935*4882a593Smuzhiyun } else {
1936*4882a593Smuzhiyun shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1937*4882a593Smuzhiyun extended_msg[2], extended_msg[1]);
1938*4882a593Smuzhiyun tmp = 0;
1939*4882a593Smuzhiyun }
1940*4882a593Smuzhiyun
1941*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
1942*4882a593Smuzhiyun if (!hostdata->connected)
1943*4882a593Smuzhiyun return;
1944*4882a593Smuzhiyun
1945*4882a593Smuzhiyun /* Reject message */
1946*4882a593Smuzhiyun fallthrough;
1947*4882a593Smuzhiyun default:
1948*4882a593Smuzhiyun /*
1949*4882a593Smuzhiyun * If we get something weird that we aren't expecting,
1950*4882a593Smuzhiyun * log it.
1951*4882a593Smuzhiyun */
1952*4882a593Smuzhiyun if (tmp == EXTENDED_MESSAGE)
1953*4882a593Smuzhiyun scmd_printk(KERN_INFO, cmd,
1954*4882a593Smuzhiyun "rejecting unknown extended message code %02x, length %d\n",
1955*4882a593Smuzhiyun extended_msg[2], extended_msg[1]);
1956*4882a593Smuzhiyun else if (tmp)
1957*4882a593Smuzhiyun scmd_printk(KERN_INFO, cmd,
1958*4882a593Smuzhiyun "rejecting unknown message code %02x\n",
1959*4882a593Smuzhiyun tmp);
1960*4882a593Smuzhiyun
1961*4882a593Smuzhiyun msgout = MESSAGE_REJECT;
1962*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1963*4882a593Smuzhiyun break;
1964*4882a593Smuzhiyun } /* switch (tmp) */
1965*4882a593Smuzhiyun break;
1966*4882a593Smuzhiyun case PHASE_MSGOUT:
1967*4882a593Smuzhiyun len = 1;
1968*4882a593Smuzhiyun data = &msgout;
1969*4882a593Smuzhiyun hostdata->last_message = msgout;
1970*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1971*4882a593Smuzhiyun if (msgout == ABORT) {
1972*4882a593Smuzhiyun hostdata->connected = NULL;
1973*4882a593Smuzhiyun hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1974*4882a593Smuzhiyun cmd->result = DID_ERROR << 16;
1975*4882a593Smuzhiyun complete_cmd(instance, cmd);
1976*4882a593Smuzhiyun maybe_release_dma_irq(instance);
1977*4882a593Smuzhiyun return;
1978*4882a593Smuzhiyun }
1979*4882a593Smuzhiyun msgout = NOP;
1980*4882a593Smuzhiyun break;
1981*4882a593Smuzhiyun case PHASE_CMDOUT:
1982*4882a593Smuzhiyun len = cmd->cmd_len;
1983*4882a593Smuzhiyun data = cmd->cmnd;
1984*4882a593Smuzhiyun /*
1985*4882a593Smuzhiyun * XXX for performance reasons, on machines with a
1986*4882a593Smuzhiyun * PSEUDO-DMA architecture we should probably
1987*4882a593Smuzhiyun * use the dma transfer function.
1988*4882a593Smuzhiyun */
1989*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1990*4882a593Smuzhiyun break;
1991*4882a593Smuzhiyun case PHASE_STATIN:
1992*4882a593Smuzhiyun len = 1;
1993*4882a593Smuzhiyun data = &tmp;
1994*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
1995*4882a593Smuzhiyun cmd->SCp.Status = tmp;
1996*4882a593Smuzhiyun break;
1997*4882a593Smuzhiyun default:
1998*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "unknown phase\n");
1999*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_ANY, instance);
2000*4882a593Smuzhiyun } /* switch(phase) */
2001*4882a593Smuzhiyun } else {
2002*4882a593Smuzhiyun spin_unlock_irq(&hostdata->lock);
2003*4882a593Smuzhiyun NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
2004*4882a593Smuzhiyun spin_lock_irq(&hostdata->lock);
2005*4882a593Smuzhiyun }
2006*4882a593Smuzhiyun }
2007*4882a593Smuzhiyun }
2008*4882a593Smuzhiyun
2009*4882a593Smuzhiyun /*
2010*4882a593Smuzhiyun * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2011*4882a593Smuzhiyun *
2012*4882a593Smuzhiyun * Purpose : does reselection, initializing the instance->connected
2013*4882a593Smuzhiyun * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2014*4882a593Smuzhiyun * nexus has been reestablished,
2015*4882a593Smuzhiyun *
2016*4882a593Smuzhiyun * Inputs : instance - this instance of the NCR5380.
2017*4882a593Smuzhiyun */
2018*4882a593Smuzhiyun
NCR5380_reselect(struct Scsi_Host * instance)2019*4882a593Smuzhiyun static void NCR5380_reselect(struct Scsi_Host *instance)
2020*4882a593Smuzhiyun {
2021*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
2022*4882a593Smuzhiyun unsigned char target_mask;
2023*4882a593Smuzhiyun unsigned char lun;
2024*4882a593Smuzhiyun unsigned char msg[3];
2025*4882a593Smuzhiyun struct NCR5380_cmd *ncmd;
2026*4882a593Smuzhiyun struct scsi_cmnd *tmp;
2027*4882a593Smuzhiyun
2028*4882a593Smuzhiyun /*
2029*4882a593Smuzhiyun * Disable arbitration, etc. since the host adapter obviously
2030*4882a593Smuzhiyun * lost, and tell an interrupted NCR5380_select() to restart.
2031*4882a593Smuzhiyun */
2032*4882a593Smuzhiyun
2033*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
2034*4882a593Smuzhiyun
2035*4882a593Smuzhiyun target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2036*4882a593Smuzhiyun if (!target_mask || target_mask & (target_mask - 1)) {
2037*4882a593Smuzhiyun shost_printk(KERN_WARNING, instance,
2038*4882a593Smuzhiyun "reselect: bad target_mask 0x%02x\n", target_mask);
2039*4882a593Smuzhiyun return;
2040*4882a593Smuzhiyun }
2041*4882a593Smuzhiyun
2042*4882a593Smuzhiyun /*
2043*4882a593Smuzhiyun * At this point, we have detected that our SCSI ID is on the bus,
2044*4882a593Smuzhiyun * SEL is true and BSY was false for at least one bus settle delay
2045*4882a593Smuzhiyun * (400 ns).
2046*4882a593Smuzhiyun *
2047*4882a593Smuzhiyun * We must assert BSY ourselves, until the target drops the SEL
2048*4882a593Smuzhiyun * signal.
2049*4882a593Smuzhiyun */
2050*4882a593Smuzhiyun
2051*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2052*4882a593Smuzhiyun if (NCR5380_poll_politely(hostdata,
2053*4882a593Smuzhiyun STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2054*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
2055*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2056*4882a593Smuzhiyun return;
2057*4882a593Smuzhiyun }
2058*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2059*4882a593Smuzhiyun
2060*4882a593Smuzhiyun /*
2061*4882a593Smuzhiyun * Wait for target to go into MSGIN.
2062*4882a593Smuzhiyun */
2063*4882a593Smuzhiyun
2064*4882a593Smuzhiyun if (NCR5380_poll_politely(hostdata,
2065*4882a593Smuzhiyun STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2066*4882a593Smuzhiyun if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2067*4882a593Smuzhiyun /* BUS FREE phase */
2068*4882a593Smuzhiyun return;
2069*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
2070*4882a593Smuzhiyun do_abort(instance);
2071*4882a593Smuzhiyun return;
2072*4882a593Smuzhiyun }
2073*4882a593Smuzhiyun
2074*4882a593Smuzhiyun #ifdef CONFIG_SUN3
2075*4882a593Smuzhiyun /* acknowledge toggle to MSGIN */
2076*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2077*4882a593Smuzhiyun
2078*4882a593Smuzhiyun /* peek at the byte without really hitting the bus */
2079*4882a593Smuzhiyun msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2080*4882a593Smuzhiyun #else
2081*4882a593Smuzhiyun {
2082*4882a593Smuzhiyun int len = 1;
2083*4882a593Smuzhiyun unsigned char *data = msg;
2084*4882a593Smuzhiyun unsigned char phase = PHASE_MSGIN;
2085*4882a593Smuzhiyun
2086*4882a593Smuzhiyun NCR5380_transfer_pio(instance, &phase, &len, &data);
2087*4882a593Smuzhiyun
2088*4882a593Smuzhiyun if (len) {
2089*4882a593Smuzhiyun do_abort(instance);
2090*4882a593Smuzhiyun return;
2091*4882a593Smuzhiyun }
2092*4882a593Smuzhiyun }
2093*4882a593Smuzhiyun #endif /* CONFIG_SUN3 */
2094*4882a593Smuzhiyun
2095*4882a593Smuzhiyun if (!(msg[0] & 0x80)) {
2096*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2097*4882a593Smuzhiyun spi_print_msg(msg);
2098*4882a593Smuzhiyun printk("\n");
2099*4882a593Smuzhiyun do_abort(instance);
2100*4882a593Smuzhiyun return;
2101*4882a593Smuzhiyun }
2102*4882a593Smuzhiyun lun = msg[0] & 0x07;
2103*4882a593Smuzhiyun
2104*4882a593Smuzhiyun /*
2105*4882a593Smuzhiyun * We need to add code for SCSI-II to track which devices have
2106*4882a593Smuzhiyun * I_T_L_Q nexuses established, and which have simple I_T_L
2107*4882a593Smuzhiyun * nexuses so we can chose to do additional data transfer.
2108*4882a593Smuzhiyun */
2109*4882a593Smuzhiyun
2110*4882a593Smuzhiyun /*
2111*4882a593Smuzhiyun * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2112*4882a593Smuzhiyun * just reestablished, and remove it from the disconnected queue.
2113*4882a593Smuzhiyun */
2114*4882a593Smuzhiyun
2115*4882a593Smuzhiyun tmp = NULL;
2116*4882a593Smuzhiyun list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2117*4882a593Smuzhiyun struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2118*4882a593Smuzhiyun
2119*4882a593Smuzhiyun if (target_mask == (1 << scmd_id(cmd)) &&
2120*4882a593Smuzhiyun lun == (u8)cmd->device->lun) {
2121*4882a593Smuzhiyun list_del(&ncmd->list);
2122*4882a593Smuzhiyun tmp = cmd;
2123*4882a593Smuzhiyun break;
2124*4882a593Smuzhiyun }
2125*4882a593Smuzhiyun }
2126*4882a593Smuzhiyun
2127*4882a593Smuzhiyun if (tmp) {
2128*4882a593Smuzhiyun dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2129*4882a593Smuzhiyun "reselect: removed %p from disconnected queue\n", tmp);
2130*4882a593Smuzhiyun } else {
2131*4882a593Smuzhiyun int target = ffs(target_mask) - 1;
2132*4882a593Smuzhiyun
2133*4882a593Smuzhiyun shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2134*4882a593Smuzhiyun target_mask, lun);
2135*4882a593Smuzhiyun /*
2136*4882a593Smuzhiyun * Since we have an established nexus that we can't do anything
2137*4882a593Smuzhiyun * with, we must abort it.
2138*4882a593Smuzhiyun */
2139*4882a593Smuzhiyun if (do_abort(instance) == 0)
2140*4882a593Smuzhiyun hostdata->busy[target] &= ~(1 << lun);
2141*4882a593Smuzhiyun return;
2142*4882a593Smuzhiyun }
2143*4882a593Smuzhiyun
2144*4882a593Smuzhiyun #ifdef CONFIG_SUN3
2145*4882a593Smuzhiyun if (sun3_dma_setup_done != tmp) {
2146*4882a593Smuzhiyun int count;
2147*4882a593Smuzhiyun
2148*4882a593Smuzhiyun advance_sg_buffer(tmp);
2149*4882a593Smuzhiyun
2150*4882a593Smuzhiyun count = sun3scsi_dma_xfer_len(hostdata, tmp);
2151*4882a593Smuzhiyun
2152*4882a593Smuzhiyun if (count > 0) {
2153*4882a593Smuzhiyun if (rq_data_dir(tmp->request))
2154*4882a593Smuzhiyun sun3scsi_dma_send_setup(hostdata,
2155*4882a593Smuzhiyun tmp->SCp.ptr, count);
2156*4882a593Smuzhiyun else
2157*4882a593Smuzhiyun sun3scsi_dma_recv_setup(hostdata,
2158*4882a593Smuzhiyun tmp->SCp.ptr, count);
2159*4882a593Smuzhiyun sun3_dma_setup_done = tmp;
2160*4882a593Smuzhiyun }
2161*4882a593Smuzhiyun }
2162*4882a593Smuzhiyun
2163*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2164*4882a593Smuzhiyun #endif /* CONFIG_SUN3 */
2165*4882a593Smuzhiyun
2166*4882a593Smuzhiyun /* Accept message by clearing ACK */
2167*4882a593Smuzhiyun NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2168*4882a593Smuzhiyun
2169*4882a593Smuzhiyun hostdata->connected = tmp;
2170*4882a593Smuzhiyun dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2171*4882a593Smuzhiyun scmd_id(tmp), tmp->device->lun);
2172*4882a593Smuzhiyun }
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun /**
2175*4882a593Smuzhiyun * list_find_cmd - test for presence of a command in a linked list
2176*4882a593Smuzhiyun * @haystack: list of commands
2177*4882a593Smuzhiyun * @needle: command to search for
2178*4882a593Smuzhiyun */
2179*4882a593Smuzhiyun
list_find_cmd(struct list_head * haystack,struct scsi_cmnd * needle)2180*4882a593Smuzhiyun static bool list_find_cmd(struct list_head *haystack,
2181*4882a593Smuzhiyun struct scsi_cmnd *needle)
2182*4882a593Smuzhiyun {
2183*4882a593Smuzhiyun struct NCR5380_cmd *ncmd;
2184*4882a593Smuzhiyun
2185*4882a593Smuzhiyun list_for_each_entry(ncmd, haystack, list)
2186*4882a593Smuzhiyun if (NCR5380_to_scmd(ncmd) == needle)
2187*4882a593Smuzhiyun return true;
2188*4882a593Smuzhiyun return false;
2189*4882a593Smuzhiyun }
2190*4882a593Smuzhiyun
2191*4882a593Smuzhiyun /**
2192*4882a593Smuzhiyun * list_remove_cmd - remove a command from linked list
2193*4882a593Smuzhiyun * @haystack: list of commands
2194*4882a593Smuzhiyun * @needle: command to remove
2195*4882a593Smuzhiyun */
2196*4882a593Smuzhiyun
list_del_cmd(struct list_head * haystack,struct scsi_cmnd * needle)2197*4882a593Smuzhiyun static bool list_del_cmd(struct list_head *haystack,
2198*4882a593Smuzhiyun struct scsi_cmnd *needle)
2199*4882a593Smuzhiyun {
2200*4882a593Smuzhiyun if (list_find_cmd(haystack, needle)) {
2201*4882a593Smuzhiyun struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2202*4882a593Smuzhiyun
2203*4882a593Smuzhiyun list_del(&ncmd->list);
2204*4882a593Smuzhiyun return true;
2205*4882a593Smuzhiyun }
2206*4882a593Smuzhiyun return false;
2207*4882a593Smuzhiyun }
2208*4882a593Smuzhiyun
2209*4882a593Smuzhiyun /**
2210*4882a593Smuzhiyun * NCR5380_abort - scsi host eh_abort_handler() method
2211*4882a593Smuzhiyun * @cmd: the command to be aborted
2212*4882a593Smuzhiyun *
2213*4882a593Smuzhiyun * Try to abort a given command by removing it from queues and/or sending
2214*4882a593Smuzhiyun * the target an abort message. This may not succeed in causing a target
2215*4882a593Smuzhiyun * to abort the command. Nonetheless, the low-level driver must forget about
2216*4882a593Smuzhiyun * the command because the mid-layer reclaims it and it may be re-issued.
2217*4882a593Smuzhiyun *
2218*4882a593Smuzhiyun * The normal path taken by a command is as follows. For EH we trace this
2219*4882a593Smuzhiyun * same path to locate and abort the command.
2220*4882a593Smuzhiyun *
2221*4882a593Smuzhiyun * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2222*4882a593Smuzhiyun * [disconnected -> connected ->]...
2223*4882a593Smuzhiyun * [autosense -> connected ->] done
2224*4882a593Smuzhiyun *
2225*4882a593Smuzhiyun * If cmd was not found at all then presumably it has already been completed,
2226*4882a593Smuzhiyun * in which case return SUCCESS to try to avoid further EH measures.
2227*4882a593Smuzhiyun *
2228*4882a593Smuzhiyun * If the command has not completed yet, we must not fail to find it.
2229*4882a593Smuzhiyun * We have no option but to forget the aborted command (even if it still
2230*4882a593Smuzhiyun * lacks sense data). The mid-layer may re-issue a command that is in error
2231*4882a593Smuzhiyun * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2232*4882a593Smuzhiyun * this driver are such that a command can appear on one queue only.
2233*4882a593Smuzhiyun *
2234*4882a593Smuzhiyun * The lock protects driver data structures, but EH handlers also use it
2235*4882a593Smuzhiyun * to serialize their own execution and prevent their own re-entry.
2236*4882a593Smuzhiyun */
2237*4882a593Smuzhiyun
NCR5380_abort(struct scsi_cmnd * cmd)2238*4882a593Smuzhiyun static int NCR5380_abort(struct scsi_cmnd *cmd)
2239*4882a593Smuzhiyun {
2240*4882a593Smuzhiyun struct Scsi_Host *instance = cmd->device->host;
2241*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
2242*4882a593Smuzhiyun unsigned long flags;
2243*4882a593Smuzhiyun int result = SUCCESS;
2244*4882a593Smuzhiyun
2245*4882a593Smuzhiyun spin_lock_irqsave(&hostdata->lock, flags);
2246*4882a593Smuzhiyun
2247*4882a593Smuzhiyun #if (NDEBUG & NDEBUG_ANY)
2248*4882a593Smuzhiyun scmd_printk(KERN_INFO, cmd, __func__);
2249*4882a593Smuzhiyun #endif
2250*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_ANY, instance);
2251*4882a593Smuzhiyun NCR5380_dprint_phase(NDEBUG_ANY, instance);
2252*4882a593Smuzhiyun
2253*4882a593Smuzhiyun if (list_del_cmd(&hostdata->unissued, cmd)) {
2254*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance,
2255*4882a593Smuzhiyun "abort: removed %p from issue queue\n", cmd);
2256*4882a593Smuzhiyun cmd->result = DID_ABORT << 16;
2257*4882a593Smuzhiyun cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2258*4882a593Smuzhiyun goto out;
2259*4882a593Smuzhiyun }
2260*4882a593Smuzhiyun
2261*4882a593Smuzhiyun if (hostdata->selecting == cmd) {
2262*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance,
2263*4882a593Smuzhiyun "abort: cmd %p == selecting\n", cmd);
2264*4882a593Smuzhiyun hostdata->selecting = NULL;
2265*4882a593Smuzhiyun cmd->result = DID_ABORT << 16;
2266*4882a593Smuzhiyun complete_cmd(instance, cmd);
2267*4882a593Smuzhiyun goto out;
2268*4882a593Smuzhiyun }
2269*4882a593Smuzhiyun
2270*4882a593Smuzhiyun if (list_del_cmd(&hostdata->disconnected, cmd)) {
2271*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance,
2272*4882a593Smuzhiyun "abort: removed %p from disconnected list\n", cmd);
2273*4882a593Smuzhiyun /* Can't call NCR5380_select() and send ABORT because that
2274*4882a593Smuzhiyun * means releasing the lock. Need a bus reset.
2275*4882a593Smuzhiyun */
2276*4882a593Smuzhiyun set_host_byte(cmd, DID_ERROR);
2277*4882a593Smuzhiyun complete_cmd(instance, cmd);
2278*4882a593Smuzhiyun result = FAILED;
2279*4882a593Smuzhiyun goto out;
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun
2282*4882a593Smuzhiyun if (hostdata->connected == cmd) {
2283*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2284*4882a593Smuzhiyun hostdata->connected = NULL;
2285*4882a593Smuzhiyun hostdata->dma_len = 0;
2286*4882a593Smuzhiyun if (do_abort(instance) < 0) {
2287*4882a593Smuzhiyun set_host_byte(cmd, DID_ERROR);
2288*4882a593Smuzhiyun complete_cmd(instance, cmd);
2289*4882a593Smuzhiyun result = FAILED;
2290*4882a593Smuzhiyun goto out;
2291*4882a593Smuzhiyun }
2292*4882a593Smuzhiyun set_host_byte(cmd, DID_ABORT);
2293*4882a593Smuzhiyun complete_cmd(instance, cmd);
2294*4882a593Smuzhiyun goto out;
2295*4882a593Smuzhiyun }
2296*4882a593Smuzhiyun
2297*4882a593Smuzhiyun if (list_del_cmd(&hostdata->autosense, cmd)) {
2298*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance,
2299*4882a593Smuzhiyun "abort: removed %p from sense queue\n", cmd);
2300*4882a593Smuzhiyun complete_cmd(instance, cmd);
2301*4882a593Smuzhiyun }
2302*4882a593Smuzhiyun
2303*4882a593Smuzhiyun out:
2304*4882a593Smuzhiyun if (result == FAILED)
2305*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2306*4882a593Smuzhiyun else {
2307*4882a593Smuzhiyun hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
2308*4882a593Smuzhiyun dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2309*4882a593Smuzhiyun }
2310*4882a593Smuzhiyun
2311*4882a593Smuzhiyun queue_work(hostdata->work_q, &hostdata->main_task);
2312*4882a593Smuzhiyun maybe_release_dma_irq(instance);
2313*4882a593Smuzhiyun spin_unlock_irqrestore(&hostdata->lock, flags);
2314*4882a593Smuzhiyun
2315*4882a593Smuzhiyun return result;
2316*4882a593Smuzhiyun }
2317*4882a593Smuzhiyun
2318*4882a593Smuzhiyun
bus_reset_cleanup(struct Scsi_Host * instance)2319*4882a593Smuzhiyun static void bus_reset_cleanup(struct Scsi_Host *instance)
2320*4882a593Smuzhiyun {
2321*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
2322*4882a593Smuzhiyun int i;
2323*4882a593Smuzhiyun struct NCR5380_cmd *ncmd;
2324*4882a593Smuzhiyun
2325*4882a593Smuzhiyun /* reset NCR registers */
2326*4882a593Smuzhiyun NCR5380_write(MODE_REG, MR_BASE);
2327*4882a593Smuzhiyun NCR5380_write(TARGET_COMMAND_REG, 0);
2328*4882a593Smuzhiyun NCR5380_write(SELECT_ENABLE_REG, 0);
2329*4882a593Smuzhiyun
2330*4882a593Smuzhiyun /* After the reset, there are no more connected or disconnected commands
2331*4882a593Smuzhiyun * and no busy units; so clear the low-level status here to avoid
2332*4882a593Smuzhiyun * conflicts when the mid-level code tries to wake up the affected
2333*4882a593Smuzhiyun * commands!
2334*4882a593Smuzhiyun */
2335*4882a593Smuzhiyun
2336*4882a593Smuzhiyun if (hostdata->selecting) {
2337*4882a593Smuzhiyun hostdata->selecting->result = DID_RESET << 16;
2338*4882a593Smuzhiyun complete_cmd(instance, hostdata->selecting);
2339*4882a593Smuzhiyun hostdata->selecting = NULL;
2340*4882a593Smuzhiyun }
2341*4882a593Smuzhiyun
2342*4882a593Smuzhiyun list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2343*4882a593Smuzhiyun struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2344*4882a593Smuzhiyun
2345*4882a593Smuzhiyun set_host_byte(cmd, DID_RESET);
2346*4882a593Smuzhiyun complete_cmd(instance, cmd);
2347*4882a593Smuzhiyun }
2348*4882a593Smuzhiyun INIT_LIST_HEAD(&hostdata->disconnected);
2349*4882a593Smuzhiyun
2350*4882a593Smuzhiyun list_for_each_entry(ncmd, &hostdata->autosense, list) {
2351*4882a593Smuzhiyun struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2352*4882a593Smuzhiyun
2353*4882a593Smuzhiyun cmd->scsi_done(cmd);
2354*4882a593Smuzhiyun }
2355*4882a593Smuzhiyun INIT_LIST_HEAD(&hostdata->autosense);
2356*4882a593Smuzhiyun
2357*4882a593Smuzhiyun if (hostdata->connected) {
2358*4882a593Smuzhiyun set_host_byte(hostdata->connected, DID_RESET);
2359*4882a593Smuzhiyun complete_cmd(instance, hostdata->connected);
2360*4882a593Smuzhiyun hostdata->connected = NULL;
2361*4882a593Smuzhiyun }
2362*4882a593Smuzhiyun
2363*4882a593Smuzhiyun for (i = 0; i < 8; ++i)
2364*4882a593Smuzhiyun hostdata->busy[i] = 0;
2365*4882a593Smuzhiyun hostdata->dma_len = 0;
2366*4882a593Smuzhiyun
2367*4882a593Smuzhiyun queue_work(hostdata->work_q, &hostdata->main_task);
2368*4882a593Smuzhiyun maybe_release_dma_irq(instance);
2369*4882a593Smuzhiyun }
2370*4882a593Smuzhiyun
2371*4882a593Smuzhiyun /**
2372*4882a593Smuzhiyun * NCR5380_host_reset - reset the SCSI host
2373*4882a593Smuzhiyun * @cmd: SCSI command undergoing EH
2374*4882a593Smuzhiyun *
2375*4882a593Smuzhiyun * Returns SUCCESS
2376*4882a593Smuzhiyun */
2377*4882a593Smuzhiyun
NCR5380_host_reset(struct scsi_cmnd * cmd)2378*4882a593Smuzhiyun static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2379*4882a593Smuzhiyun {
2380*4882a593Smuzhiyun struct Scsi_Host *instance = cmd->device->host;
2381*4882a593Smuzhiyun struct NCR5380_hostdata *hostdata = shost_priv(instance);
2382*4882a593Smuzhiyun unsigned long flags;
2383*4882a593Smuzhiyun struct NCR5380_cmd *ncmd;
2384*4882a593Smuzhiyun
2385*4882a593Smuzhiyun spin_lock_irqsave(&hostdata->lock, flags);
2386*4882a593Smuzhiyun
2387*4882a593Smuzhiyun #if (NDEBUG & NDEBUG_ANY)
2388*4882a593Smuzhiyun shost_printk(KERN_INFO, instance, __func__);
2389*4882a593Smuzhiyun #endif
2390*4882a593Smuzhiyun NCR5380_dprint(NDEBUG_ANY, instance);
2391*4882a593Smuzhiyun NCR5380_dprint_phase(NDEBUG_ANY, instance);
2392*4882a593Smuzhiyun
2393*4882a593Smuzhiyun list_for_each_entry(ncmd, &hostdata->unissued, list) {
2394*4882a593Smuzhiyun struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2395*4882a593Smuzhiyun
2396*4882a593Smuzhiyun scmd->result = DID_RESET << 16;
2397*4882a593Smuzhiyun scmd->scsi_done(scmd);
2398*4882a593Smuzhiyun }
2399*4882a593Smuzhiyun INIT_LIST_HEAD(&hostdata->unissued);
2400*4882a593Smuzhiyun
2401*4882a593Smuzhiyun do_reset(instance);
2402*4882a593Smuzhiyun bus_reset_cleanup(instance);
2403*4882a593Smuzhiyun
2404*4882a593Smuzhiyun spin_unlock_irqrestore(&hostdata->lock, flags);
2405*4882a593Smuzhiyun
2406*4882a593Smuzhiyun return SUCCESS;
2407*4882a593Smuzhiyun }
2408