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/OK3568_Linux_fs/kernel/drivers/gpio/
H A Dgpio-omap.c77 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
83 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
108 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, in omap_set_gpio_direction() argument
111 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
117 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
120 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
124 reg += bank->regs->set_dataout; in omap_set_gpio_dataout_reg()
125 bank->context.dataout |= l; in omap_set_gpio_dataout_reg()
127 reg += bank->regs->clr_dataout; in omap_set_gpio_dataout_reg()
128 bank->context.dataout &= ~l; in omap_set_gpio_dataout_reg()
[all …]
H A Dgpio-rockchip.c77 static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank, in rockchip_gpio_writel() argument
80 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel()
82 if (bank->gpio_type == GPIO_TYPE_V2) in rockchip_gpio_writel()
88 static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank, in rockchip_gpio_readl() argument
91 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl()
94 if (bank->gpio_type == GPIO_TYPE_V2) in rockchip_gpio_readl()
102 static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank, in rockchip_gpio_writel_bit() argument
106 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel_bit()
109 if (bank->gpio_type == GPIO_TYPE_V2) { in rockchip_gpio_writel_bit()
124 static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank, in rockchip_gpio_readl_bit() argument
[all …]
H A Dgpio-brcmstb.c36 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32))) argument
37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
39 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
42 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
43 #define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL) argument
44 #define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT) argument
76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv() local
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/renesas/
H A Dsh_pfc.h448 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ argument
449 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
450 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument
452 #define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ argument
453 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \
454 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \
455 PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \
456 PORT_GP_CFG_1(bank, 3, fn, sfx, cfg)
457 #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) argument
459 #define PORT_GP_CFG_6(bank, fn, sfx, cfg) \ argument
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/OK3568_Linux_fs/kernel/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.c56 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local
57 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
61 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask()
63 mask = readl(bank->eint_base + reg_mask); in exynos_irq_mask()
65 writel(mask, bank->eint_base + reg_mask); in exynos_irq_mask()
67 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask()
74 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local
75 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
77 writel(1 << irqd->hwirq, bank->eint_base + reg_pend); in exynos_irq_ack()
84 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local
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H A Dpinctrl-samsung.c354 * given a pin number that is local to a pin controller, find out the pin bank
355 * and the register base of the pin bank.
359 struct samsung_pin_bank **bank) in pin_to_reg_bank() argument
371 if (bank) in pin_to_reg_bank()
372 *bank = b; in pin_to_reg_bank()
381 struct samsung_pin_bank *bank; in samsung_pinmux_setup() local
393 &reg, &pin_offset, &bank); in samsung_pinmux_setup()
394 type = bank->type; in samsung_pinmux_setup()
403 spin_lock_irqsave(&bank->slock, flags); in samsung_pinmux_setup()
410 spin_unlock_irqrestore(&bank->slock, flags); in samsung_pinmux_setup()
[all …]
/OK3568_Linux_fs/kernel/drivers/crypto/qat/qat_common/
H A Dadf_transport.c36 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_reserve_ring() argument
38 spin_lock(&bank->lock); in adf_reserve_ring()
39 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
40 spin_unlock(&bank->lock); in adf_reserve_ring()
43 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
44 spin_unlock(&bank->lock); in adf_reserve_ring()
48 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_unreserve_ring() argument
50 spin_lock(&bank->lock); in adf_unreserve_ring()
51 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
52 spin_unlock(&bank->lock); in adf_unreserve_ring()
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/OK3568_Linux_fs/u-boot/cmd/
H A Dflash.c36 * the syntax is B:SF[-SL], where B is the bank number, SF is the first
38 * bank numbers start at 1 to be consistent with other specs, sector numbers
46 * or an invalid flash bank.
52 int bank, first, last; in abbrev_spec() local
59 bank = simple_strtoul (str, &ep, 10); in abbrev_spec()
61 bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS || in abbrev_spec()
62 (fp = &flash_info[bank - 1])->flash_id == FLASH_UNKNOWN) in abbrev_spec()
95 ulong bank, sector_end_addr; in flash_sect_roundb() local
101 for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS && !found; ++bank) { in flash_sect_roundb()
102 info = &flash_info[bank]; in flash_sect_roundb()
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c153 static void stm32_gpio_backup_value(struct stm32_gpio_bank *bank, in stm32_gpio_backup_value() argument
156 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value()
157 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value()
160 static void stm32_gpio_backup_mode(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_mode() argument
163 bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK | in stm32_gpio_backup_mode()
165 bank->pin_backup[offset] |= mode << STM32_GPIO_BKP_MODE_SHIFT; in stm32_gpio_backup_mode()
166 bank->pin_backup[offset] |= alt << STM32_GPIO_BKP_ALT_SHIFT; in stm32_gpio_backup_mode()
169 static void stm32_gpio_backup_driving(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_driving() argument
172 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_TYPE); in stm32_gpio_backup_driving()
173 bank->pin_backup[offset] |= drive << STM32_GPIO_BKP_TYPE; in stm32_gpio_backup_driving()
[all …]
/OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c63 int bank; member
103 return lanes[lane].bank; in serdes_get_bank_by_lane()
111 int bank = lanes[lane].bank; in serdes_lane_enabled() local
115 if (in_be32(&regs->bank[bank].rstctl) & SRDS_RSTCTL_SDPD) in serdes_lane_enabled()
124 if (bank > 0) in serdes_lane_enabled()
125 return !(srds_lpd_b[bank] & (8 >> (lane - (6 + 4 * bank)))); in serdes_lane_enabled()
182 * Returns the SERDES bank (1, 2, or 3) that a given device is on for a given
225 * Set BnGCRy0[RRST] = 0 for each lane in the each bank that is in __serdes_reset_rx()
235 * Set BnGCRy0[RRST] = 1 for each lane in the each bank that is in __serdes_reset_rx()
272 * Enable a SERDES bank that was disabled via the RCW
[all …]
/OK3568_Linux_fs/kernel/drivers/net/phy/mscc/
H A Dmscc_macsec.c23 enum macsec_bank bank, u32 reg) in vsc8584_macsec_phy_read() argument
34 MSCC_PHY_MACSEC_20_TARGET(bank >> 2)); in vsc8584_macsec_phy_read()
36 if (bank >> 2 == 0x1) in vsc8584_macsec_phy_read()
38 bank &= 0x3; in vsc8584_macsec_phy_read()
40 bank = 0; in vsc8584_macsec_phy_read()
45 MSCC_PHY_MACSEC_19_TARGET(bank)); in vsc8584_macsec_phy_read()
62 enum macsec_bank bank, u32 reg, u32 val) in vsc8584_macsec_phy_write() argument
72 MSCC_PHY_MACSEC_20_TARGET(bank >> 2)); in vsc8584_macsec_phy_write()
74 if ((bank >> 2 == 0x1) || (bank >> 2 == 0x3)) in vsc8584_macsec_phy_write()
75 bank &= 0x3; in vsc8584_macsec_phy_write()
[all …]
/OK3568_Linux_fs/u-boot/drivers/irq/
H A Dirq-gpio-v2.c91 struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0); in generic_gpio_handle_irq() local
95 isr = readl(bank->regbase + GPIO_INT_STATUS); in generic_gpio_handle_irq()
96 ilr_l = readl(bank->regbase + GPIO_INTTYPE_LEVEL_L); in generic_gpio_handle_irq()
97 ilr_h = readl(bank->regbase + GPIO_INTTYPE_LEVEL_H); in generic_gpio_handle_irq()
98 gpio_irq = bank->irq_base; in generic_gpio_handle_irq()
104 gpio_irq_mask(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
105 gpio_irq_ack(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
114 gpio_irq_unmask(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
120 gpio_irq_unmask(bank->regbase, offset_to_bit(h_pin)); in generic_gpio_handle_irq()
128 gpio_irq_unmask(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
[all …]
H A Dirq-gpio.c86 struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0); in generic_gpio_handle_irq() local
90 isr = readl(bank->regbase + GPIO_INT_STATUS); in generic_gpio_handle_irq()
91 ilr = readl(bank->regbase + GPIO_INTTYPE_LEVEL); in generic_gpio_handle_irq()
93 gpio_irq = bank->irq_base; in generic_gpio_handle_irq()
99 gpio_irq_mask(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
100 gpio_irq_ack(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
108 gpio_irq_unmask(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
116 gpio_irq_unmask(bank->regbase, offset_to_bit(pin)); in generic_gpio_handle_irq()
177 struct gpio_bank *bank = gpio_to_bank(gpio); in gpio_irq_set_type() local
180 if (!bank) in gpio_irq_set_type()
[all …]
/OK3568_Linux_fs/kernel/drivers/bus/
H A Duniphier-system-bus.c23 #define UNIPHIER_SBC_STRIDE 0x10 /* register stride to next bank */
25 #define UNIPHIER_SBC_BASE_DUMMY 0xffffffff /* data to squash bank 0, 1 */
35 struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS]; member
39 int bank, u32 addr, u64 paddr, u32 size) in uniphier_system_bus_add_bank() argument
44 "range found: bank = %d, addr = %08x, paddr = %08llx, size = %08x\n", in uniphier_system_bus_add_bank()
45 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
48 dev_err(priv->dev, "unsupported bank number %d\n", bank); in uniphier_system_bus_add_bank()
52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
54 "range for bank %d has already been specified\n", bank); in uniphier_system_bus_add_bank()
[all …]
/OK3568_Linux_fs/kernel/arch/x86/kernel/cpu/mce/
H A Damd.c120 static enum smca_bank_types smca_get_bank_type(unsigned int bank) in smca_get_bank_type() argument
124 if (bank >= MAX_NR_BANKS) in smca_get_bank_type()
127 b = &smca_banks[bank]; in smca_get_bank_type()
185 * So to define a unique name for each bank, we use a temp c-string to append
214 static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu) in smca_set_misc_banks_map() argument
222 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high)) in smca_set_misc_banks_map()
228 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high)) in smca_set_misc_banks_map()
232 per_cpu(smca_misc_banks_map, cpu) |= BIT(bank); in smca_set_misc_banks_map()
236 static void smca_configure(unsigned int bank, unsigned int cpu) in smca_configure() argument
241 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); in smca_configure()
[all …]
/OK3568_Linux_fs/u-boot/board/toradex/apalis_imx6/
H A Dpf0100_otp.inc75 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
82 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
83 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
84 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/OK3568_Linux_fs/u-boot/board/toradex/colibri_imx6/
H A Dpf0100_otp.inc73 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
74 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
82 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Diotiming-s3c2412.c41 unsigned int bank; in s3c2412_print_timing() local
43 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing()
44 bt = iot->bank[bank].io_2412; in s3c2412_print_timing()
49 "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, in s3c2412_print_timing()
87 * s3c2412_calc_bank - calculate the bank divisor settings.
89 * @bt: The bank timing.
108 * s3c2412_iotiming_debugfs - debugfs show io bank timing information
111 * @iob: The IO bank information to decode.
131 * s3c2412_iotiming_calc - calculate all the bank divisor settings.
133 * @iot: The bank timing information.
[all …]
H A Diotiming-s3c2410.c27 * s3c2410_print_timing - print bank timing data for debug purposes
35 int bank; in s3c2410_print_timing() local
37 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing()
38 bt = timings->bank[bank].io_2410; in s3c2410_print_timing()
43 "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, in s3c2410_print_timing()
53 * bank_reg - convert bank number to pointer to the control register.
54 * @bank: The IO bank number.
56 static inline void __iomem *bank_reg(unsigned int bank) in bank_reg() argument
58 return S3C2410_BANKCON0 + (bank << 2); in bank_reg()
62 * bank_is_io - test whether bank is used for IO
[all …]
/OK3568_Linux_fs/u-boot/drivers/pinctrl/rockchip/
H A Dpinctrl-rockchip-core.c19 static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin) in rockchip_verify_config() argument
24 if (bank >= ctrl->nr_banks) { in rockchip_verify_config()
25 debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks); in rockchip_verify_config()
38 void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, in rockchip_get_recalced_mux() argument
41 struct rockchip_pinctrl_priv *priv = bank->priv; in rockchip_get_recalced_mux()
48 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
62 rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, in rockchip_get_mux_route() argument
65 struct rockchip_pinctrl_priv *priv = bank->priv; in rockchip_get_mux_route()
72 if (data->bank_num == bank->bank_num && in rockchip_get_mux_route()
112 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument
[all …]
/OK3568_Linux_fs/u-boot/drivers/gpio/
H A Ds5p_gpio.c36 /* Platform data for each bank */
38 struct s5p_gpio_bank *bank; member
42 /* Information about each bank at run-time */
44 struct s5p_gpio_bank *bank; member
60 struct s5p_gpio_bank *bank; in s5p_gpio_get_bank() local
61 bank = (struct s5p_gpio_bank *)data->reg_addr; in s5p_gpio_get_bank()
62 bank += (gpio - upto) / GPIO_PER_BANK; in s5p_gpio_get_bank()
63 debug("gpio=%d, bank=%p\n", gpio, bank); in s5p_gpio_get_bank()
64 return bank; in s5p_gpio_get_bank()
74 static void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) in s5p_gpio_cfg_pin() argument
[all …]
H A Dintel_ich6_gpio.c21 * Danger Will Robinson! Bank 0 (GPIOs 0-31) seems to be fairly stable. Most
23 * absurdly complex and constantly changing. We'll provide Bank 1 and Bank 2,
57 static int _ich6_gpio_set_value(struct ich6_bank_priv *bank, unsigned offset, in _ich6_gpio_set_value() argument
62 if (bank->use_lvl_write_cache) in _ich6_gpio_set_value()
63 val = bank->lvl_write_cache; in _ich6_gpio_set_value()
65 val = inl(bank->lvl); in _ich6_gpio_set_value()
71 outl(val, bank->lvl); in _ich6_gpio_set_value()
72 if (bank->use_lvl_write_cache) in _ich6_gpio_set_value()
73 bank->lvl_write_cache = val; in _ich6_gpio_set_value()
114 "bank-name", NULL); in gpio_ich6_ofdata_to_platdata()
[all …]
H A Domap_gpio.c55 static void _set_gpio_direction(const struct gpio_bank *bank, int gpio, in _set_gpio_direction() argument
58 void *reg = bank->base; in _set_gpio_direction()
73 * corresponding to the specified bank.
75 static int _get_gpio_direction(const struct gpio_bank *bank, int gpio) in _get_gpio_direction() argument
77 void *reg = bank->base; in _get_gpio_direction()
90 static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio, in _set_gpio_dataout() argument
93 void *reg = bank->base; in _set_gpio_dataout()
105 static int _get_gpio_value(const struct gpio_bank *bank, int gpio) in _get_gpio_value() argument
107 void *reg = bank->base; in _get_gpio_value()
110 input = _get_gpio_direction(bank, gpio); in _get_gpio_value()
[all …]
H A Dzynq_gpio.c66 #define ZYNQ_GPIO_DATA_LSW_OFFSET(BANK) (0x000 + (8 * BANK)) argument
68 #define ZYNQ_GPIO_DATA_MSW_OFFSET(BANK) (0x004 + (8 * BANK)) argument
70 #define ZYNQ_GPIO_DATA_RO_OFFSET(BANK) (0x060 + (4 * BANK)) argument
72 #define ZYNQ_GPIO_DIRM_OFFSET(BANK) (0x204 + (0x40 * BANK)) argument
74 #define ZYNQ_GPIO_OUTEN_OFFSET(BANK) (0x208 + (0x40 * BANK)) argument
76 #define ZYNQ_GPIO_INTMASK_OFFSET(BANK) (0x20C + (0x40 * BANK)) argument
78 #define ZYNQ_GPIO_INTEN_OFFSET(BANK) (0x210 + (0x40 * BANK)) argument
80 #define ZYNQ_GPIO_INTDIS_OFFSET(BANK) (0x214 + (0x40 * BANK)) argument
82 #define ZYNQ_GPIO_INTSTS_OFFSET(BANK) (0x218 + (0x40 * BANK)) argument
84 #define ZYNQ_GPIO_INTTYPE_OFFSET(BANK) (0x21C + (0x40 * BANK)) argument
[all …]
/OK3568_Linux_fs/u-boot/drivers/misc/
H A Dmxc_ocotp.c90 * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX,
92 * Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
95 * Similar hole exists between bank 14 and bank 15 of size
100 * This function is to covert user input to physical bank index.
103 * When write, no need to consider hole, always use the bank/word
131 u32 fuse_word_physical(u32 bank, u32 word_index) in fuse_word_physical() argument
134 if (bank == 8) in fuse_word_physical()
146 u32 fuse_word_physical(u32 bank, u32 word_index) in fuse_word_physical() argument
164 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, in prepare_access() argument
169 if (bank >= FUSE_BANKS || in prepare_access()
[all …]

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