| /OK3568_Linux_fs/kernel/arch/arm64/ |
| H A D | Kconfig.platforms | 1 # SPDX-License-Identifier: GPL-2.0-only 17 bool "Allwinner sunxi 64-bit SoC Family" 23 This enables support for Allwinner sunxi based SoCs like the A64. 52 This enables support for Broadcom iProc based SoCs 69 bool "Broadcom Set-Top-Box SoCs" 76 This enables support for Broadcom's ARMv8 Set Top Box SoCs 79 bool "ARMv8 based Samsung Exynos SoC family" 90 This enables support for ARMv8 based Samsung Exynos SoC family. 93 bool "ARMv8 based Microchip Sparx5 SoC family" 97 This enables support for the Microchip Sparx5 ARMv8-based [all …]
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 168 if $(cc-option,-fpatchable-function-entry=2) 217 ARM 64-bit (AArch64) Linux support. 249 # VA_BITS - PAGE_SHIFT - 3 342 def_bool !$(as-instr,1:\n.inst 0\n.rept . - 1b\n\nnop\n.endr\n) 369 …bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is acce… 374 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or 377 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors 383 data cache clean-and-invalidate. 391 …bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to th… [all …]
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| /OK3568_Linux_fs/kernel/Documentation/trace/coresight/ |
| H A D | coresight-cpu-debug.rst | 9 ------------ 11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual 13 debug module and it is mainly used for two modes: self-hosted debug and 16 explore debugging method which rely on self-hosted debug mode, this document 19 The debug module provides sample-based profiling extension, which can be used 21 every CPU has one dedicated debug module to be connected. Based on self-hosted 29 -------------- 31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID 32 registers to decide if sample-based profiling is implemented or not. On some 36 - At the time this documentation was written, the debug driver mainly relies on [all …]
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| /OK3568_Linux_fs/buildroot/arch/ |
| H A D | Config.in.arm | 146 bool "arm1136j-s" 152 bool "arm1136jf-s" 159 bool "arm1176jz-s" 165 bool "arm1176jzf-s" 181 bool "cortex-A5" 189 bool "cortex-A7" 197 bool "cortex-A8" 205 bool "cortex-A9" 213 bool "cortex-A12" 221 bool "cortex-A15" [all …]
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| H A D | Config.in | 29 32-bit CPUs that can be used from deeply embedded to high 37 32-bit CPUs that can be used from deeply embedded to high 44 ARM is a 32-bit reduced instruction set computer (RISC) 54 ARM is a 32-bit reduced instruction set computer (RISC) 65 Aarch64 is a 64-bit architecture developed by ARM Holdings. 66 http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php 74 Aarch64 is a 64-bit architecture developed by ARM Holdings. 75 http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php 85 http://www.c-sky.com/ 86 http://www.github.com/c-sky [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/crypto/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 13 tristate "SHA1 digest algorithm (ARM-asm)" 17 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 27 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 37 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 38 using special ARMv8 Crypto Extensions. 41 tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)" 46 SHA-256 secure hash standard (DFIPS 180-2) implemented 47 using special ARMv8 Crypto Extensions. 50 tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)" [all …]
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| /OK3568_Linux_fs/kernel/drivers/perf/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 17 If compiled as a module, it will be called arm-cci. 20 bool "support CCI-400" 25 CCI-400 provides 4 independent event counters counting events related 29 bool "support CCI-500/CCI-550" 33 CCI-500/CCI-550 both provide 8 independent event counters, which can 45 tristate "Arm CMN-600 PMU support" 48 Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh 56 Say y if you want to use CPU performance monitors on ARM-based 70 based on the Stream ID of the corresponding master. [all …]
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| /OK3568_Linux_fs/kernel/drivers/soc/tegra/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 # 32-bit ARM SoCs 21 Support for NVIDIA Tegra AP20 and T20 processors, based on the 35 Support for NVIDIA Tegra T30 processor family, based on the 47 Support for NVIDIA Tegra T114 processor family, based on the 58 Support for NVIDIA Tegra T124 processor family, based on the 63 # 64-bit ARM SoCs 72 Enable support for NVIDIA Tegra132 SoC, based on the Denver 73 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC, 75 Tegra124's "4+1" Cortex-A15 CPU complex. [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-rmobile/ |
| H A D | lowlevel_init_gen3.S | 2 * arch/arm/cpu/armv8/rcar_gen3/lowlevel_init.S 7 * This file is based on the arch/arm/cpu/armv8/start.S 12 * SPDX-License-Identifier: GPL-2.0+ 15 #include <asm-offsets.h> 25 * For single-entry systems the lowlevel init is very simple.
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/ |
| H A D | microchip,sparx5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lars Povlsen <lars.povlsen@microchip.com> 13 The Microchip Sparx5 SoC is a ARMv8-based used in a family of 14 gigabit TSN-capable gigabit switches. 16 The SparX-5 Ethernet switch family provides a rich set of switching 17 features such as advanced TCAM-based VLAN and QoS processing 19 TCAM-based frame processing using versatile content aware processor 27 - description: The Sparx5 pcb125 board is a modular board, [all …]
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| H A D | coresight-cpu-debug.txt | 3 CoreSight CPU debug component are compliant with the ARMv8 architecture 5 external debug module is mainly used for two modes: self-hosted debug and 8 debug module provides sample-based profiling extension, which can be used 14 - compatible : should be "arm,coresight-cpu-debug"; supplemented with 18 - reg : physical base address and length of the register set. 20 - clocks : the clock associated to this component. 22 - clock-names : the name of the clock referenced by the code. Since we are 29 - cpu : the CPU phandle the debug module is affined to. Do not assume it 34 - power-domains: a phandle to the debug power domain. We use "power-domains" 44 compatible = "arm,coresight-cpu-debug","arm,primecell"; [all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/samsung/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 10 bool "Samsung Exynos ARMv8-family clock controller support" if COMPILE_TEST 27 Build the s3c2410 clock driver based on the common clock framework. 34 Temporary symbol to build the dclk driver based on the common clock
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| /OK3568_Linux_fs/yocto/poky/meta/recipes-devtools/valgrind/valgrind/ |
| H A D | 0001-makefiles-Drop-setting-mcpu-to-cortex-a8-on-arm-arch.patch | 3 Date: Thu, 20 Apr 2017 10:11:16 -0700 4 Subject: [PATCH] makefiles: Drop setting -mcpu to cortex-a8 on arm 7 We can not assume that all arches armv7+ are cortex-a8 only 8 it fails to build for rpi which is armv7ve based (cortex-a8) cpu 11 | cc1: warning: switch -mcpu=cortex-a8 conflicts with -march=armv7ve switch 13 Upstream-Status: Submitted [https://bugs.kde.org/show_bug.cgi?id=454346] 15 Signed-off-by: Khem Raj <raj.khem@gmail.com> 16 --- 17 Makefile.all.am | 6 +++--- 18 helgrind/tests/Makefile.am | 6 +++--- [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-bcm283x/ |
| H A D | Kconfig | 17 bool "Broadcom BCM2837 SoC 32-bit support" 24 bool "Broadcom BCM2837 SoC 64-bit support" 39 Support for all ARM1176-/BCM2835-based Raspberry Pi variants, such as 41 support BCM2836/BCM2837-based Raspberry Pis such as the RPi 2 and 50 Support for all BCM2836-based Raspberry Pi variants, such as 53 This option also supports BCM2837-based variants such as the RPi 3 54 Model B, when run in 32-bit mode, provided you have configured the 56 a) config.txt should contain dtoverlay=pi3-miniuart-bt. 58 booting, and copy u-boot.bin.img (rather than u-boot.bin) to the SD 61 path/to/kernel/scripts/mkknlimg --dtok u-boot.bin u-boot.bin.img [all …]
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| /OK3568_Linux_fs/kernel/drivers/soc/samsung/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 15 # There is no need to enable these drivers for ARMv8 17 bool "Exynos ASV ARMv7-specific driver extensions" if COMPILE_TEST 31 # There is no need to enable these drivers for ARMv8 33 bool "Exynos PMU ARMv7-specific driver extensions" if COMPILE_TEST 48 Resume code. See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> 58 Note, this currently only works for S3C64XX based SMDK boards. 73 See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> 85 See <file:Documentation/arm/samsung-s3c24xx/suspend.rst>
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| /OK3568_Linux_fs/kernel/Documentation/dev-tools/ |
| H A D | kasan.rst | 5 -------- 8 designed to find out-of-bound and use-after-free bugs. KASAN has three modes: 11 2. software tag-based KASAN (similar to userspace HWASan), 12 3. hardware tag-based KASAN (based on hardware memory tagging). 14 Software KASAN modes (1 and 2) use compile-time instrumentation to insert 20 out-of-bounds accesses for global variables is only supported since Clang 11. 22 Tag-based KASAN is only supported in Clang. 25 and riscv architectures, and tag-based KASAN modes are supported only for arm64. 28 ----- 35 CONFIG_KASAN_SW_TAGS (to enable software tag-based KASAN), and [all …]
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| /OK3568_Linux_fs/buildroot/package/openblas/ |
| H A D | Config.in | 36 # Cortex-A15 always have a VFPv4 38 # Cortex-A9 have an optional VFPv3, so we need to make sure it 52 default "ARMV8" if BR2_aarch64 || BR2_aarch64_be 56 automatically based on your Target Architecture Variant. 66 An optimized BLAS library based on GotoBLAS2 1.13 BSD version. 93 single-threaded mode) but an application makes OpenBLAS
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| /OK3568_Linux_fs/kernel/lib/ |
| H A D | Kconfig.kasan | 1 # SPDX-License-Identifier: GPL-2.0-only 16 def_bool $(cc-option, -fsanitize=kernel-address) 19 def_bool $(cc-option, -fsanitize=kernel-hwaddress) 36 Enables KASAN (KernelAddressSANitizer) - runtime memory debugger, 37 designed to find out-of-bounds accesses and use-after-free bugs. 38 See Documentation/dev-tools/kasan.rst for details. 49 2. software tag-based KASAN (arm64 only, based on software 52 3. hardware tag-based KASAN (arm64 only, based on hardware 70 but detection of out-of-bounds accesses for global variables is 81 bool "Software tag-based mode" [all …]
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| /OK3568_Linux_fs/kernel/Documentation/arm64/ |
| H A D | memory-tagging-extension.rst | 8 Date: 2020-02-25 16 ARMv8.5 based processors introduce the Memory Tagging Extension (MTE) 17 feature. MTE is built on top of the ARMv8.0 virtual address tagging TBI 18 (Top Byte Ignore) feature and allows software to access a 4-bit 19 allocation tag for each 16-byte granule in the physical address space. 20 Such memory range must be mapped with the Normal-Tagged memory 21 attribute. A logical tag is derived from bits 59-56 of the virtual 34 -------- 40 ``PROT_MTE`` - Pages allow access to the MTE allocation tags. 43 user address space and preserved on copy-on-write. ``MAP_SHARED`` is [all …]
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| H A D | pointer-authentication.rst | 7 Date: 2017-07-19 14 --------------------- 16 The ARMv8.3 Pointer Authentication extension adds primitives that can be 27 of high-order bits of the pointer, which varies dependent on the 36 The extension provides five separate keys to generate PACs - two for 42 ------------- 56 Recent versions of GCC can compile code with APIAKey-based return 57 address protection when passed the -msign-return-address option. This 58 uses instructions in the HINT space (unless -march=armv8.3-a or higher 70 --------- [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/ |
| H A D | Kconfig | 14 bool "Generate position-independent pre-relocation code" 16 U-Boot expects to be linked to a specific hard-coded address, and to 20 information that is embedded into the binary to support U-Boot 21 relocating itself to the top-of-RAM later during execution. 47 # If set, the workarounds for these ARM errata are applied early during U-Boot 49 # applied; no CPU-type/version detection exists, unlike the similar options in 184 default "armv8" if ARM64 221 This should be enabled if U-Boot needs to communicate with system 239 bool "Build U-Boot using the Thumb instruction set" 242 Use this flag to build U-Boot using the Thumb instruction set for [all …]
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| /OK3568_Linux_fs/u-boot/board/qualcomm/dragonboard410c/ |
| H A D | u-boot.lds | 2 * Override linker script for fastboot-readable images 6 * Based on arch/arm/cpu/armv8/u-boot.lds (Just add header) 8 * SPDX-License-Identifier: GPL-2.0+ 11 OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
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| /OK3568_Linux_fs/u-boot/drivers/serial/ |
| H A D | arm_dcc.c | 2 * Copyright (C) 2004-2007 ARM Limited. 3 * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 4 * Copyright (C) 2015 - 2016 Xilinx, Inc, Michal Simek 6 * SPDX-License-Identifier: GPL-2.0 10 * with other works to produce a work based on this file, this file does not 15 * This exception does not invalidate any other reasons why a work based on 57 * ARMV8 117 while (--timeout_count) { in arm_dcc_putc() 123 return -EAGAIN; in arm_dcc_putc()
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| /OK3568_Linux_fs/kernel/arch/arm64/kvm/hyp/ |
| H A D | exception.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012,2013 - ARM Ltd 8 * Based on arch/arm/kvm/emulate.c 9 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 52 vcpu->arch.ctxt.spsr_abt = val; in __vcpu_write_spsr_abt() 60 vcpu->arch.ctxt.spsr_und = val; in __vcpu_write_spsr_und() 66 * The EL passed to this function *must* be a non-secure, privileged mode with 74 * For the SPSR_ELx layout for AArch64, see ARM DDI 0487E.a page C5-429. 75 * For the SPSR_ELx layout for AArch32, see ARM DDI 0487E.a page C5-426. 118 // TODO: TCO (if/when ARMv8.5-MemTag is exposed to guests) in enter_exception64() [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | sun50i-a64.dtsi | 3 * based on the Allwinner H3 dtsi: 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/clock/sun50i-a64-ccu.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/reset/sun50i-a64-ccu.h> 50 interrupt-parent = <&gic>; 51 #address-cells = <1>; 52 #size-cells = <1>; 55 #address-cells = <1>; 56 #size-cells = <0>; [all …]
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