xref: /OK3568_Linux_fs/kernel/drivers/perf/Kconfig (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun#
3*4882a593Smuzhiyun# Performance Monitor Drivers
4*4882a593Smuzhiyun#
5*4882a593Smuzhiyun
6*4882a593Smuzhiyunmenu "Performance monitor support"
7*4882a593Smuzhiyun	depends on PERF_EVENTS
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunconfig ARM_CCI_PMU
10*4882a593Smuzhiyun	tristate "ARM CCI PMU driver"
11*4882a593Smuzhiyun	depends on (ARM && CPU_V7) || ARM64
12*4882a593Smuzhiyun	select ARM_CCI
13*4882a593Smuzhiyun	help
14*4882a593Smuzhiyun	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
15*4882a593Smuzhiyun	  Interconnect) family of products.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	  If compiled as a module, it will be called arm-cci.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyunconfig ARM_CCI400_PMU
20*4882a593Smuzhiyun	bool "support CCI-400"
21*4882a593Smuzhiyun	default y
22*4882a593Smuzhiyun	depends on ARM_CCI_PMU
23*4882a593Smuzhiyun	select ARM_CCI400_COMMON
24*4882a593Smuzhiyun	help
25*4882a593Smuzhiyun	  CCI-400 provides 4 independent event counters counting events related
26*4882a593Smuzhiyun	  to the connected slave/master interfaces, plus a cycle counter.
27*4882a593Smuzhiyun
28*4882a593Smuzhiyunconfig ARM_CCI5xx_PMU
29*4882a593Smuzhiyun	bool "support CCI-500/CCI-550"
30*4882a593Smuzhiyun	default y
31*4882a593Smuzhiyun	depends on ARM_CCI_PMU
32*4882a593Smuzhiyun	help
33*4882a593Smuzhiyun	  CCI-500/CCI-550 both provide 8 independent event counters, which can
34*4882a593Smuzhiyun	  count events pertaining to the slave/master interfaces as well as the
35*4882a593Smuzhiyun	  internal events to the CCI.
36*4882a593Smuzhiyun
37*4882a593Smuzhiyunconfig ARM_CCN
38*4882a593Smuzhiyun	tristate "ARM CCN driver support"
39*4882a593Smuzhiyun	depends on ARM || ARM64
40*4882a593Smuzhiyun	help
41*4882a593Smuzhiyun	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
42*4882a593Smuzhiyun	  interconnect.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyunconfig ARM_CMN
45*4882a593Smuzhiyun	tristate "Arm CMN-600 PMU support"
46*4882a593Smuzhiyun	depends on ARM64 || (COMPILE_TEST && 64BIT)
47*4882a593Smuzhiyun	help
48*4882a593Smuzhiyun	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
49*4882a593Smuzhiyun	  Network interconnect.
50*4882a593Smuzhiyun
51*4882a593Smuzhiyunconfig ARM_PMU
52*4882a593Smuzhiyun	depends on ARM || ARM64
53*4882a593Smuzhiyun	bool "ARM PMU framework"
54*4882a593Smuzhiyun	default y
55*4882a593Smuzhiyun	help
56*4882a593Smuzhiyun	  Say y if you want to use CPU performance monitors on ARM-based
57*4882a593Smuzhiyun	  systems.
58*4882a593Smuzhiyun
59*4882a593Smuzhiyunconfig ARM_PMU_ACPI
60*4882a593Smuzhiyun	depends on ARM_PMU && ACPI
61*4882a593Smuzhiyun	def_bool y
62*4882a593Smuzhiyun
63*4882a593Smuzhiyunconfig ARM_SMMU_V3_PMU
64*4882a593Smuzhiyun	 tristate "ARM SMMUv3 Performance Monitors Extension"
65*4882a593Smuzhiyun	 depends on ARM64 && ACPI && ARM_SMMU_V3
66*4882a593Smuzhiyun	   help
67*4882a593Smuzhiyun	   Provides support for the ARM SMMUv3 Performance Monitor Counter
68*4882a593Smuzhiyun	   Groups (PMCG), which provide monitoring of transactions passing
69*4882a593Smuzhiyun	   through the SMMU and allow the resulting information to be filtered
70*4882a593Smuzhiyun	   based on the Stream ID of the corresponding master.
71*4882a593Smuzhiyun
72*4882a593Smuzhiyunconfig ARM_DSU_PMU
73*4882a593Smuzhiyun	tristate "ARM DynamIQ Shared Unit (DSU) PMU"
74*4882a593Smuzhiyun	depends on ARM64
75*4882a593Smuzhiyun	  help
76*4882a593Smuzhiyun	  Provides support for performance monitor unit in ARM DynamIQ Shared
77*4882a593Smuzhiyun	  Unit (DSU). The DSU integrates one or more cores with an L3 memory
78*4882a593Smuzhiyun	  system, control logic. The PMU allows counting various events related
79*4882a593Smuzhiyun	  to DSU.
80*4882a593Smuzhiyun
81*4882a593Smuzhiyunconfig FSL_IMX8_DDR_PMU
82*4882a593Smuzhiyun	tristate "Freescale i.MX8 DDR perf monitor"
83*4882a593Smuzhiyun	depends on ARCH_MXC
84*4882a593Smuzhiyun	  help
85*4882a593Smuzhiyun	  Provides support for the DDR performance monitor in i.MX8, which
86*4882a593Smuzhiyun	  can give information about memory throughput and other related
87*4882a593Smuzhiyun	  events.
88*4882a593Smuzhiyun
89*4882a593Smuzhiyunconfig QCOM_L2_PMU
90*4882a593Smuzhiyun	bool "Qualcomm Technologies L2-cache PMU"
91*4882a593Smuzhiyun	depends on ARCH_QCOM && ARM64 && ACPI
92*4882a593Smuzhiyun	select QCOM_KRYO_L2_ACCESSORS
93*4882a593Smuzhiyun	  help
94*4882a593Smuzhiyun	  Provides support for the L2 cache performance monitor unit (PMU)
95*4882a593Smuzhiyun	  in Qualcomm Technologies processors.
96*4882a593Smuzhiyun	  Adds the L2 cache PMU into the perf events subsystem for
97*4882a593Smuzhiyun	  monitoring L2 cache events.
98*4882a593Smuzhiyun
99*4882a593Smuzhiyunconfig QCOM_L3_PMU
100*4882a593Smuzhiyun	bool "Qualcomm Technologies L3-cache PMU"
101*4882a593Smuzhiyun	depends on ARCH_QCOM && ARM64 && ACPI
102*4882a593Smuzhiyun	select QCOM_IRQ_COMBINER
103*4882a593Smuzhiyun	help
104*4882a593Smuzhiyun	   Provides support for the L3 cache performance monitor unit (PMU)
105*4882a593Smuzhiyun	   in Qualcomm Technologies processors.
106*4882a593Smuzhiyun	   Adds the L3 cache PMU into the perf events subsystem for
107*4882a593Smuzhiyun	   monitoring L3 cache events.
108*4882a593Smuzhiyun
109*4882a593Smuzhiyunconfig THUNDERX2_PMU
110*4882a593Smuzhiyun	tristate "Cavium ThunderX2 SoC PMU UNCORE"
111*4882a593Smuzhiyun	depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
112*4882a593Smuzhiyun	default m
113*4882a593Smuzhiyun	help
114*4882a593Smuzhiyun	   Provides support for ThunderX2 UNCORE events.
115*4882a593Smuzhiyun	   The SoC has PMU support in its L3 cache controller (L3C) and
116*4882a593Smuzhiyun	   in the DDR4 Memory Controller (DMC).
117*4882a593Smuzhiyun
118*4882a593Smuzhiyunconfig XGENE_PMU
119*4882a593Smuzhiyun        depends on ARCH_XGENE
120*4882a593Smuzhiyun        bool "APM X-Gene SoC PMU"
121*4882a593Smuzhiyun        default n
122*4882a593Smuzhiyun        help
123*4882a593Smuzhiyun          Say y if you want to use APM X-Gene SoC performance monitors.
124*4882a593Smuzhiyun
125*4882a593Smuzhiyunconfig ARM_SPE_PMU
126*4882a593Smuzhiyun	tristate "Enable support for the ARMv8.2 Statistical Profiling Extension"
127*4882a593Smuzhiyun	depends on ARM64
128*4882a593Smuzhiyun	help
129*4882a593Smuzhiyun	  Enable perf support for the ARMv8.2 Statistical Profiling
130*4882a593Smuzhiyun	  Extension, which provides periodic sampling of operations in
131*4882a593Smuzhiyun	  the CPU pipeline and reports this via the perf AUX interface.
132*4882a593Smuzhiyun
133*4882a593Smuzhiyunsource "drivers/perf/hisilicon/Kconfig"
134*4882a593Smuzhiyun
135*4882a593Smuzhiyunendmenu
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