xref: /OK3568_Linux_fs/kernel/arch/arm64/Kconfig.platforms (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyunmenu "Platform selection"
3*4882a593Smuzhiyun
4*4882a593Smuzhiyunconfig ARCH_ACTIONS
5*4882a593Smuzhiyun	bool "Actions Semi Platforms"
6*4882a593Smuzhiyun	select OWL_TIMER
7*4882a593Smuzhiyun	select PINCTRL
8*4882a593Smuzhiyun	help
9*4882a593Smuzhiyun	  This enables support for the Actions Semiconductor S900 SoC family.
10*4882a593Smuzhiyun
11*4882a593Smuzhiyunconfig ARCH_AGILEX
12*4882a593Smuzhiyun	bool "Intel's Agilex SoCFPGA Family"
13*4882a593Smuzhiyun	help
14*4882a593Smuzhiyun	  This enables support for Intel's Agilex SoCFPGA Family.
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunconfig ARCH_SUNXI
17*4882a593Smuzhiyun	bool "Allwinner sunxi 64-bit SoC Family"
18*4882a593Smuzhiyun	select ARCH_HAS_RESET_CONTROLLER
19*4882a593Smuzhiyun	select GENERIC_IRQ_CHIP
20*4882a593Smuzhiyun	select PINCTRL
21*4882a593Smuzhiyun	select RESET_CONTROLLER
22*4882a593Smuzhiyun	help
23*4882a593Smuzhiyun	  This enables support for Allwinner sunxi based SoCs like the A64.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyunconfig ARCH_ALPINE
26*4882a593Smuzhiyun	bool "Annapurna Labs Alpine platform"
27*4882a593Smuzhiyun	select ALPINE_MSI if PCI
28*4882a593Smuzhiyun	help
29*4882a593Smuzhiyun	  This enables support for the Annapurna Labs Alpine
30*4882a593Smuzhiyun	  Soc family.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyunconfig ARCH_BCM2835
33*4882a593Smuzhiyun	bool "Broadcom BCM2835 family"
34*4882a593Smuzhiyun	select TIMER_OF
35*4882a593Smuzhiyun	select GPIOLIB
36*4882a593Smuzhiyun	select MFD_CORE
37*4882a593Smuzhiyun	select PINCTRL
38*4882a593Smuzhiyun	select PINCTRL_BCM2835
39*4882a593Smuzhiyun	select ARM_AMBA
40*4882a593Smuzhiyun	select ARM_GIC
41*4882a593Smuzhiyun	select ARM_TIMER_SP804
42*4882a593Smuzhiyun	help
43*4882a593Smuzhiyun	  This enables support for the Broadcom BCM2837 and BCM2711 SoC.
44*4882a593Smuzhiyun	  These SoCs are used in the Raspberry Pi 3 and 4 devices.
45*4882a593Smuzhiyun
46*4882a593Smuzhiyunconfig ARCH_BCM_IPROC
47*4882a593Smuzhiyun	bool "Broadcom iProc SoC Family"
48*4882a593Smuzhiyun	select COMMON_CLK_IPROC
49*4882a593Smuzhiyun	select GPIOLIB
50*4882a593Smuzhiyun	select PINCTRL
51*4882a593Smuzhiyun	help
52*4882a593Smuzhiyun	  This enables support for Broadcom iProc based SoCs
53*4882a593Smuzhiyun
54*4882a593Smuzhiyunconfig ARCH_BERLIN
55*4882a593Smuzhiyun	bool "Marvell Berlin SoC Family"
56*4882a593Smuzhiyun	select DW_APB_ICTL
57*4882a593Smuzhiyun	select DW_APB_TIMER_OF
58*4882a593Smuzhiyun	select GPIOLIB
59*4882a593Smuzhiyun	select PINCTRL
60*4882a593Smuzhiyun	help
61*4882a593Smuzhiyun	  This enables support for Marvell Berlin SoC Family
62*4882a593Smuzhiyun
63*4882a593Smuzhiyunconfig ARCH_BITMAIN
64*4882a593Smuzhiyun	bool "Bitmain SoC Platforms"
65*4882a593Smuzhiyun	help
66*4882a593Smuzhiyun	  This enables support for the Bitmain SoC Family.
67*4882a593Smuzhiyun
68*4882a593Smuzhiyunconfig ARCH_BRCMSTB
69*4882a593Smuzhiyun	bool "Broadcom Set-Top-Box SoCs"
70*4882a593Smuzhiyun	select ARCH_HAS_RESET_CONTROLLER
71*4882a593Smuzhiyun	select BCM7038_L1_IRQ
72*4882a593Smuzhiyun	select BRCMSTB_L2_IRQ
73*4882a593Smuzhiyun	select GENERIC_IRQ_CHIP
74*4882a593Smuzhiyun	select PINCTRL
75*4882a593Smuzhiyun	help
76*4882a593Smuzhiyun	  This enables support for Broadcom's ARMv8 Set Top Box SoCs
77*4882a593Smuzhiyun
78*4882a593Smuzhiyunconfig ARCH_EXYNOS
79*4882a593Smuzhiyun	bool "ARMv8 based Samsung Exynos SoC family"
80*4882a593Smuzhiyun	select COMMON_CLK_SAMSUNG
81*4882a593Smuzhiyun	select EXYNOS_CHIPID
82*4882a593Smuzhiyun	select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS
83*4882a593Smuzhiyun	select EXYNOS_PMU
84*4882a593Smuzhiyun	select HAVE_S3C_RTC if RTC_CLASS
85*4882a593Smuzhiyun	select PINCTRL
86*4882a593Smuzhiyun	select PINCTRL_EXYNOS
87*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS if PM
88*4882a593Smuzhiyun	select SOC_SAMSUNG
89*4882a593Smuzhiyun	help
90*4882a593Smuzhiyun	  This enables support for ARMv8 based Samsung Exynos SoC family.
91*4882a593Smuzhiyun
92*4882a593Smuzhiyunconfig ARCH_SPARX5
93*4882a593Smuzhiyun	bool "ARMv8 based Microchip Sparx5 SoC family"
94*4882a593Smuzhiyun	select PINCTRL
95*4882a593Smuzhiyun	select DW_APB_TIMER_OF
96*4882a593Smuzhiyun	help
97*4882a593Smuzhiyun	  This enables support for the Microchip Sparx5 ARMv8-based
98*4882a593Smuzhiyun	  SoC family of TSN-capable gigabit switches.
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	  The SparX-5 Ethernet switch family provides a rich set of
101*4882a593Smuzhiyun	  switching features such as advanced TCAM-based VLAN and QoS
102*4882a593Smuzhiyun	  processing enabling delivery of differentiated services, and
103*4882a593Smuzhiyun	  security through TCAM-based frame processing using versatile
104*4882a593Smuzhiyun	  content aware processor (VCAP).
105*4882a593Smuzhiyun
106*4882a593Smuzhiyunconfig ARCH_K3
107*4882a593Smuzhiyun	bool "Texas Instruments Inc. K3 multicore SoC architecture"
108*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS if PM
109*4882a593Smuzhiyun	select MAILBOX
110*4882a593Smuzhiyun	select SOC_TI
111*4882a593Smuzhiyun	select TI_MESSAGE_MANAGER
112*4882a593Smuzhiyun	select TI_SCI_PROTOCOL
113*4882a593Smuzhiyun	select TI_SCI_INTR_IRQCHIP
114*4882a593Smuzhiyun	select TI_SCI_INTA_IRQCHIP
115*4882a593Smuzhiyun	select TI_K3_SOCINFO
116*4882a593Smuzhiyun	help
117*4882a593Smuzhiyun	  This enables support for Texas Instruments' K3 multicore SoC
118*4882a593Smuzhiyun	  architecture.
119*4882a593Smuzhiyun
120*4882a593Smuzhiyunconfig ARCH_LAYERSCAPE
121*4882a593Smuzhiyun	bool "ARMv8 based Freescale Layerscape SoC family"
122*4882a593Smuzhiyun	select EDAC_SUPPORT
123*4882a593Smuzhiyun	help
124*4882a593Smuzhiyun	  This enables support for the Freescale Layerscape SoC family.
125*4882a593Smuzhiyun
126*4882a593Smuzhiyunconfig ARCH_LG1K
127*4882a593Smuzhiyun	bool "LG Electronics LG1K SoC Family"
128*4882a593Smuzhiyun	help
129*4882a593Smuzhiyun	  This enables support for LG Electronics LG1K SoC Family
130*4882a593Smuzhiyun
131*4882a593Smuzhiyunconfig ARCH_HISI
132*4882a593Smuzhiyun	bool "Hisilicon SoC Family"
133*4882a593Smuzhiyun	select ARM_TIMER_SP804
134*4882a593Smuzhiyun	select HISILICON_IRQ_MBIGEN if PCI
135*4882a593Smuzhiyun	select PINCTRL
136*4882a593Smuzhiyun	help
137*4882a593Smuzhiyun	  This enables support for Hisilicon ARMv8 SoC family
138*4882a593Smuzhiyun
139*4882a593Smuzhiyunconfig ARCH_KEEMBAY
140*4882a593Smuzhiyun	bool "Keem Bay SoC"
141*4882a593Smuzhiyun	help
142*4882a593Smuzhiyun	  This enables support for Intel Movidius SoC code-named Keem Bay.
143*4882a593Smuzhiyun
144*4882a593Smuzhiyunconfig ARCH_MEDIATEK
145*4882a593Smuzhiyun	bool "MediaTek SoC Family"
146*4882a593Smuzhiyun	select ARM_GIC
147*4882a593Smuzhiyun	select PINCTRL
148*4882a593Smuzhiyun	select MTK_TIMER
149*4882a593Smuzhiyun	help
150*4882a593Smuzhiyun	  This enables support for MediaTek MT27xx, MT65xx, MT76xx
151*4882a593Smuzhiyun	  & MT81xx ARMv8 SoCs
152*4882a593Smuzhiyun
153*4882a593Smuzhiyunconfig ARCH_MESON
154*4882a593Smuzhiyun	bool "Amlogic Platforms"
155*4882a593Smuzhiyun	select COMMON_CLK
156*4882a593Smuzhiyun	help
157*4882a593Smuzhiyun	  This enables support for the arm64 based Amlogic SoCs
158*4882a593Smuzhiyun	  such as the s905, S905X/D, S912, A113X/D or S905X/D2
159*4882a593Smuzhiyun
160*4882a593Smuzhiyunconfig ARCH_MVEBU
161*4882a593Smuzhiyun	bool "Marvell EBU SoC Family"
162*4882a593Smuzhiyun	select ARMADA_AP806_SYSCON
163*4882a593Smuzhiyun	select ARMADA_CP110_SYSCON
164*4882a593Smuzhiyun	select ARMADA_37XX_CLK
165*4882a593Smuzhiyun	select GPIOLIB
166*4882a593Smuzhiyun	select GPIOLIB_IRQCHIP
167*4882a593Smuzhiyun	select MVEBU_GICP
168*4882a593Smuzhiyun	select MVEBU_ICU
169*4882a593Smuzhiyun	select MVEBU_ODMI
170*4882a593Smuzhiyun	select MVEBU_PIC
171*4882a593Smuzhiyun	select MVEBU_SEI
172*4882a593Smuzhiyun	select OF_GPIO
173*4882a593Smuzhiyun	select PINCTRL
174*4882a593Smuzhiyun	select PINCTRL_ARMADA_37XX
175*4882a593Smuzhiyun	select PINCTRL_ARMADA_AP806
176*4882a593Smuzhiyun	select PINCTRL_ARMADA_CP110
177*4882a593Smuzhiyun	help
178*4882a593Smuzhiyun	  This enables support for Marvell EBU familly, including:
179*4882a593Smuzhiyun	   - Armada 3700 SoC Family
180*4882a593Smuzhiyun	   - Armada 7K SoC Family
181*4882a593Smuzhiyun	   - Armada 8K SoC Family
182*4882a593Smuzhiyun
183*4882a593Smuzhiyunconfig ARCH_MXC
184*4882a593Smuzhiyun	bool "ARMv8 based NXP i.MX SoC family"
185*4882a593Smuzhiyun	select ARM64_ERRATUM_843419
186*4882a593Smuzhiyun	select ARM64_ERRATUM_845719 if COMPAT
187*4882a593Smuzhiyun	select IMX_GPCV2
188*4882a593Smuzhiyun	select IMX_GPCV2_PM_DOMAINS
189*4882a593Smuzhiyun	select PM
190*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS
191*4882a593Smuzhiyun	select SOC_BUS
192*4882a593Smuzhiyun	select TIMER_IMX_SYS_CTR
193*4882a593Smuzhiyun	help
194*4882a593Smuzhiyun	  This enables support for the ARMv8 based SoCs in the
195*4882a593Smuzhiyun	  NXP i.MX family.
196*4882a593Smuzhiyun
197*4882a593Smuzhiyunconfig ARCH_QCOM
198*4882a593Smuzhiyun	bool "Qualcomm Platforms"
199*4882a593Smuzhiyun	select GPIOLIB
200*4882a593Smuzhiyun	select PINCTRL
201*4882a593Smuzhiyun	help
202*4882a593Smuzhiyun	  This enables support for the ARMv8 based Qualcomm chipsets.
203*4882a593Smuzhiyun
204*4882a593Smuzhiyunconfig ARCH_REALTEK
205*4882a593Smuzhiyun	bool "Realtek Platforms"
206*4882a593Smuzhiyun	select RESET_CONTROLLER
207*4882a593Smuzhiyun	help
208*4882a593Smuzhiyun	  This enables support for the ARMv8 based Realtek chipsets,
209*4882a593Smuzhiyun	  like the RTD1295.
210*4882a593Smuzhiyun
211*4882a593Smuzhiyunconfig ARCH_RENESAS
212*4882a593Smuzhiyun	bool "Renesas SoC Platforms"
213*4882a593Smuzhiyun	select GPIOLIB
214*4882a593Smuzhiyun	select PINCTRL
215*4882a593Smuzhiyun	select SOC_BUS
216*4882a593Smuzhiyun	help
217*4882a593Smuzhiyun	  This enables support for the ARMv8 based Renesas SoCs.
218*4882a593Smuzhiyun
219*4882a593Smuzhiyunconfig ARCH_ROCKCHIP
220*4882a593Smuzhiyun	bool "Rockchip Platforms"
221*4882a593Smuzhiyun	select ARCH_HAS_RESET_CONTROLLER
222*4882a593Smuzhiyun	select PINCTRL
223*4882a593Smuzhiyun	select PM
224*4882a593Smuzhiyun	help
225*4882a593Smuzhiyun	  This enables support for the ARMv8 based Rockchip chipsets,
226*4882a593Smuzhiyun	  like the RK3368.
227*4882a593Smuzhiyun
228*4882a593Smuzhiyunconfig ARCH_S32
229*4882a593Smuzhiyun	bool "NXP S32 SoC Family"
230*4882a593Smuzhiyun	help
231*4882a593Smuzhiyun	  This enables support for the NXP S32 family of processors.
232*4882a593Smuzhiyun
233*4882a593Smuzhiyunconfig ARCH_SEATTLE
234*4882a593Smuzhiyun	bool "AMD Seattle SoC Family"
235*4882a593Smuzhiyun	help
236*4882a593Smuzhiyun	  This enables support for AMD Seattle SOC Family
237*4882a593Smuzhiyun
238*4882a593Smuzhiyunconfig ARCH_STRATIX10
239*4882a593Smuzhiyun	bool "Altera's Stratix 10 SoCFPGA Family"
240*4882a593Smuzhiyun	help
241*4882a593Smuzhiyun	  This enables support for Altera's Stratix 10 SoCFPGA Family.
242*4882a593Smuzhiyun
243*4882a593Smuzhiyunconfig ARCH_SYNQUACER
244*4882a593Smuzhiyun	bool "Socionext SynQuacer SoC Family"
245*4882a593Smuzhiyun	select IRQ_FASTEOI_HIERARCHY_HANDLERS
246*4882a593Smuzhiyun
247*4882a593Smuzhiyunconfig ARCH_TEGRA
248*4882a593Smuzhiyun	bool "NVIDIA Tegra SoC Family"
249*4882a593Smuzhiyun	select ARCH_HAS_RESET_CONTROLLER
250*4882a593Smuzhiyun	select ARM_GIC_PM
251*4882a593Smuzhiyun	select CLKSRC_MMIO
252*4882a593Smuzhiyun	select TIMER_OF
253*4882a593Smuzhiyun	select GENERIC_CLOCKEVENTS
254*4882a593Smuzhiyun	select GPIOLIB
255*4882a593Smuzhiyun	select PINCTRL
256*4882a593Smuzhiyun	select PM
257*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS
258*4882a593Smuzhiyun	select RESET_CONTROLLER
259*4882a593Smuzhiyun	help
260*4882a593Smuzhiyun	  This enables support for the NVIDIA Tegra SoC family.
261*4882a593Smuzhiyun
262*4882a593Smuzhiyunconfig ARCH_SPRD
263*4882a593Smuzhiyun	bool "Spreadtrum SoC platform"
264*4882a593Smuzhiyun	help
265*4882a593Smuzhiyun	  Support for Spreadtrum ARM based SoCs
266*4882a593Smuzhiyun
267*4882a593Smuzhiyunconfig ARCH_THUNDER
268*4882a593Smuzhiyun	bool "Cavium Inc. Thunder SoC Family"
269*4882a593Smuzhiyun	help
270*4882a593Smuzhiyun	  This enables support for Cavium's Thunder Family of SoCs.
271*4882a593Smuzhiyun
272*4882a593Smuzhiyunconfig ARCH_THUNDER2
273*4882a593Smuzhiyun	bool "Cavium ThunderX2 Server Processors"
274*4882a593Smuzhiyun	select GPIOLIB
275*4882a593Smuzhiyun	help
276*4882a593Smuzhiyun	  This enables support for Cavium's ThunderX2 CN99XX family of
277*4882a593Smuzhiyun	  server processors.
278*4882a593Smuzhiyun
279*4882a593Smuzhiyunconfig ARCH_UNIPHIER
280*4882a593Smuzhiyun	bool "Socionext UniPhier SoC Family"
281*4882a593Smuzhiyun	select ARCH_HAS_RESET_CONTROLLER
282*4882a593Smuzhiyun	select PINCTRL
283*4882a593Smuzhiyun	select RESET_CONTROLLER
284*4882a593Smuzhiyun	help
285*4882a593Smuzhiyun	  This enables support for Socionext UniPhier SoC family.
286*4882a593Smuzhiyun
287*4882a593Smuzhiyunconfig ARCH_VEXPRESS
288*4882a593Smuzhiyun	bool "ARMv8 software model (Versatile Express)"
289*4882a593Smuzhiyun	select GPIOLIB
290*4882a593Smuzhiyun	select PM
291*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS
292*4882a593Smuzhiyun	help
293*4882a593Smuzhiyun	  This enables support for the ARMv8 software model (Versatile
294*4882a593Smuzhiyun	  Express).
295*4882a593Smuzhiyun
296*4882a593Smuzhiyunconfig ARCH_VISCONTI
297*4882a593Smuzhiyun	bool "Toshiba Visconti SoC Family"
298*4882a593Smuzhiyun	select PINCTRL
299*4882a593Smuzhiyun	select PINCTRL_VISCONTI
300*4882a593Smuzhiyun	help
301*4882a593Smuzhiyun	  This enables support for Toshiba Visconti SoCs Family.
302*4882a593Smuzhiyun
303*4882a593Smuzhiyunconfig ARCH_VULCAN
304*4882a593Smuzhiyun	def_bool n
305*4882a593Smuzhiyun
306*4882a593Smuzhiyunconfig ARCH_XGENE
307*4882a593Smuzhiyun	bool "AppliedMicro X-Gene SOC Family"
308*4882a593Smuzhiyun	help
309*4882a593Smuzhiyun	  This enables support for AppliedMicro X-Gene SOC Family
310*4882a593Smuzhiyun
311*4882a593Smuzhiyunconfig ARCH_ZX
312*4882a593Smuzhiyun	bool "ZTE ZX SoC Family"
313*4882a593Smuzhiyun	select PINCTRL
314*4882a593Smuzhiyun	help
315*4882a593Smuzhiyun	  This enables support for ZTE ZX SoC Family
316*4882a593Smuzhiyun
317*4882a593Smuzhiyunconfig ARCH_ZYNQMP
318*4882a593Smuzhiyun	bool "Xilinx ZynqMP Family"
319*4882a593Smuzhiyun	help
320*4882a593Smuzhiyun	  This enables support for Xilinx ZynqMP Family
321*4882a593Smuzhiyun
322*4882a593Smuzhiyunendmenu
323