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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pwm/
H A Dtegra20-pwm.txt16 reg = <0x7000a000 0x100>;
H A Dpwm.txt36 pwms = <&pwm 0 5000000>;
53 pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED>;
67 reg = <0x7000a000 0x100>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dpwm.yaml14 pattern: "^pwm(@.*|-[0-9a-f])*$"
29 reg = <0x7000a000 0x100>;
H A Dnvidia,tegra20-pwm.txt33 pinctrl-0: phandle for the default/active state of pin configurations.
40 reg = <0x7000a000 0x100>;
75 pinctrl-0 = <&pwm_active_state>;
/OK3568_Linux_fs/u-boot/drivers/bootcount/
H A DKconfig34 default "0:1"
49 default 0x7000A000
/OK3568_Linux_fs/kernel/arch/sparc/include/asm/
H A Dfbio.h10 #define CG6_FBC 0x70000000
11 #define CG6_TEC 0x70001000
12 #define CG6_BTREGS 0x70002000
13 #define CG6_FHC 0x70004000
14 #define CG6_THC 0x70005000
15 #define CG6_ROM 0x70006000
16 #define CG6_RAM 0x70016000
17 #define CG6_DHC 0x80000000
19 #define CG3_MMAP_OFFSET 0x4000000
22 #define TCX_RAM8BIT 0x00000000
[all …]
/OK3568_Linux_fs/kernel/arch/m68k/include/asm/
H A Dfbio.h13 #define FBTYPE_SUN1BW 0 /* mono */
58 #define FBIOGTYPE _IOR('F', 0, struct fbtype)
61 int index; /* first element (0 origin) */
124 #define FB_WID_SHARED_8 0
196 #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
225 #define CG6_FBC 0x70000000
226 #define CG6_TEC 0x70001000
227 #define CG6_BTREGS 0x70002000
228 #define CG6_FHC 0x70004000
229 #define CG6_THC 0x70005000
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dtegra20.dtsi14 reg = <0x50000000 0x00024000>;
24 ranges = <0x54000000 0x54000000 0x04000000>;
28 reg = <0x54040000 0x00040000>;
37 reg = <0x54080000 0x00040000>;
46 reg = <0x540c0000 0x00040000>;
55 reg = <0x54100000 0x00040000>;
64 reg = <0x54140000 0x00040000>;
73 reg = <0x54180000 0x00040000>;
81 reg = <0x54200000 0x00040000>;
89 nvidia,head = <0>;
[all …]
H A Dtegra114.dtsi15 reg = <0x50000000 0x00028000>;
25 ranges = <0x54000000 0x54000000 0x01000000>;
29 reg = <0x54140000 0x00040000>;
38 reg = <0x54180000 0x00040000>;
46 reg = <0x54200000 0x00040000>;
56 nvidia,head = <0>;
65 reg = <0x54240000 0x00040000>;
84 reg = <0x54280000 0x00040000>;
96 reg = <0x54300000 0x00040000>;
103 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
[all …]
H A Dtegra210.dtsi17 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
18 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
19 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
26 interrupt-map-mask = <0 0 0 0>;
27 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
29 bus-range = <0x00 0xff>;
33 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
34 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
35 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
36 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
[all …]
H A Dtegra30.dtsi16 reg = <0x00003000 0x00000800 /* PADS registers */
17 0x00003800 0x00000200 /* AFI registers */
18 0x10000000 0x10000000>; /* configuration space */
25 interrupt-map-mask = <0 0 0 0>;
26 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
28 bus-range = <0x00 0xff>;
32 ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
33 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
34 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
35 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
[all …]
H A Dtegra124.dtsi20 reg = <0x01003000 0x00000800 /* PADS registers */
21 0x01003800 0x00000800 /* AFI registers */
22 0x02000000 0x10000000>; /* configuration space */
29 interrupt-map-mask = <0 0 0 0>;
30 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
32 bus-range = <0x00 0xff>;
36 ranges = <0x82000000 0 0x01000000 0x01000000 0 0x00001000 /* port 0 configuration space */
37 0x82000000 0 0x01001000 0x01001000 0 0x00001000 /* port 1 configuration space */
38 0x81000000 0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
39 0x82000000 0 0x13000000 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dtegra114.dtsi17 reg = <0x80000000 0x0>;
22 reg = <0x50000000 0x00028000>;
35 ranges = <0x54000000 0x54000000 0x01000000>;
39 reg = <0x54140000 0x00040000>;
50 reg = <0x54180000 0x00040000>;
60 reg = <0x54200000 0x00040000>;
70 nvidia,head = <0>;
79 reg = <0x54240000 0x00040000>;
98 reg = <0x54280000 0x00040000>;
110 reg = <0x54300000 0x00040000>;
[all …]
H A Dtegra20.dtsi15 memory@0 {
17 reg = <0 0>;
22 reg = <0x40000000 0x40000>;
25 ranges = <0 0x40000000 0x40000>;
28 reg = <0x400 0x3fc00>;
35 reg = <0x50000000 0x00024000>;
47 ranges = <0x54000000 0x54000000 0x04000000>;
51 reg = <0x54040000 0x00040000>;
60 reg = <0x54080000 0x00040000>;
69 reg = <0x540c0000 0x00040000>;
[all …]
H A Dtegra30.dtsi17 reg = <0x80000000 0x0>;
23 reg = <0x00003000 0x00000800>, /* PADS registers */
24 <0x00003800 0x00000200>, /* AFI registers */
25 <0x10000000 0x10000000>; /* configuration space */
32 interrupt-map-mask = <0 0 0 0>;
33 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
35 bus-range = <0x00 0xff>;
39 ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
40 <0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
41 <0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
[all …]
H A Dtegra124.dtsi19 reg = <0x0 0x80000000 0x0 0x0>;
25 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
26 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
27 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
34 interrupt-map-mask = <0 0 0 0>;
35 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
37 bus-range = <0x00 0xff>;
41 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
42 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
43 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi20 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
21 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
22 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
29 interrupt-map-mask = <0 0 0 0>;
30 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
32 bus-range = <0x00 0xff>;
36 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
37 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
38 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
39 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
[all …]
H A Dtegra210.dtsi21 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
22 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
23 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
30 interrupt-map-mask = <0 0 0 0>;
31 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
33 bus-range = <0x00 0xff>;
37 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
38 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
39 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
40 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
[all …]