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/OK3568_Linux_fs/kernel/drivers/media/usb/stk1160/
H A Dstk1160-reg.h14 #define STK1160_GCTRL 0x000
17 #define STK1160_RMCTL 0x00c
20 #define STK1160_POSVA 0x010
21 #define STK1160_POSV_L 0x010
22 #define STK1160_POSV_M 0x011
23 #define STK1160_POSV_H 0x012
30 * with bit #7 (0x?? OR 0x80 to activate).
32 #define STK1160_DCTRL 0x100
39 * Bit 0 - Horizontal Decimation Control
40 * 0 Horizontal decimation is disabled.
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-orion5x/
H A Dlowlevel_init.S18 #define SDRAM_CONFIG 0x3148400
19 #define SDRAM_MODE 0x62
20 #define SDRAM_CONTROL 0x4041000
21 #define SDRAM_TIME_CTRL_LOW 0x11602220
22 #define SDRAM_TIME_CTRL_HI 0x40c
23 #define SDRAM_OPEN_PAGE_EN 0x0
25 #define SDRAM_BANK0_SIZE 0x3ff0001
26 #define SDRAM_ADDR_CTRL 0x10
28 #define SDRAM_OP_NOP 0x05
29 #define SDRAM_OP_SETMODE 0x03
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dusb_mac.c11 s8 offset = 0; in mt76x2u_mac_fixup_xtal()
16 offset = eep_val & 0x7f; in mt76x2u_mac_fixup_xtal()
17 if ((eep_val & 0xff) == 0xff) in mt76x2u_mac_fixup_xtal()
18 offset = 0; in mt76x2u_mac_fixup_xtal()
19 else if (eep_val & 0x80) in mt76x2u_mac_fixup_xtal()
20 offset = 0 - offset; in mt76x2u_mac_fixup_xtal()
23 if (eep_val == 0x00 || eep_val == 0xff) { in mt76x2u_mac_fixup_xtal()
25 eep_val &= 0xff; in mt76x2u_mac_fixup_xtal()
27 if (eep_val == 0x00 || eep_val == 0xff) in mt76x2u_mac_fixup_xtal()
28 eep_val = 0x14; in mt76x2u_mac_fixup_xtal()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mn-pinfunc.h14 …ne MX8MN_IOMUXC_BOOT_MODE2_CCMSRCGPCMIX_BOOT_MODE2 0x020 0x25C 0x000 0x0 0x0
15 …ne MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3
16 …ne MX8MN_IOMUXC_BOOT_MODE3_CCMSRCGPCMIX_BOOT_MODE3 0x024 0x260 0x000 0x0 0x0
17 …ne MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3
18 …ne MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0x0
19 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x000 0x1 0x0
20 …ne MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0x0
21 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0x0
22 …ne MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0x0
23 …ne MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0x0
[all …]
H A Dimx8mq-pinfunc.h15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0…
16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0…
17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0…
18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0…
19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0…
20 #define MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0…
21 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0…
22 #define MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0…
23 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0…
24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0…
[all …]
/OK3568_Linux_fs/u-boot/drivers/pinctrl/rockchip/
H A Dpinctrl-rk3562.c28 reg += 0x4; in rk3562_set_mux()
30 mask = 0xf; in rk3562_set_mux()
39 regmap_write(regmap, 0x504, 0x10001); in rk3562_set_mux()
41 regmap_write(regmap, 0x504, 0x10000); in rk3562_set_mux()
55 #define RK3562_DRV_GPIO0_OFFSET 0x20070
56 #define RK3562_DRV_GPIO1_OFFSET 0x200
57 #define RK3562_DRV_GPIO2_OFFSET 0x240
58 #define RK3562_DRV_GPIO3_OFFSET 0x10280
59 #define RK3562_DRV_GPIO4_OFFSET 0x102C0
69 case 0: in rk3562_calc_drv_reg_and_bit()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx51-pinfunc.h13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0
14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0
15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0
16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0
17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0
18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0
19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0
20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0
21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0
22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0
[all …]
H A Dimx6dl-pinfunc.h13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
H A Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8188eu/include/
H A Dphydm_reg.h17 #define ODM_EDCA_VO_PARAM 0x500
18 #define ODM_EDCA_VI_PARAM 0x504
19 #define ODM_EDCA_BE_PARAM 0x508
20 #define ODM_EDCA_BK_PARAM 0x50C
/OK3568_Linux_fs/kernel/include/dt-bindings/reset/
H A Dhisi,hi6220-resets.h9 #define PERIPH_RSTDIS0_MMC0 0x000
10 #define PERIPH_RSTDIS0_MMC1 0x001
11 #define PERIPH_RSTDIS0_MMC2 0x002
12 #define PERIPH_RSTDIS0_NANDC 0x003
13 #define PERIPH_RSTDIS0_USBOTG_BUS 0x004
14 #define PERIPH_RSTDIS0_POR_PICOPHY 0x005
15 #define PERIPH_RSTDIS0_USBOTG 0x006
16 #define PERIPH_RSTDIS0_USBOTG_32K 0x007
17 #define PERIPH_RSTDIS1_HIFI 0x100
18 #define PERIPH_RSTDIS1_DIGACODEC 0x105
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap4-sar-layout.h14 #define SAR_BANK1_OFFSET 0x0000
15 #define SAR_BANK2_OFFSET 0x1000
16 #define SAR_BANK3_OFFSET 0x2000
17 #define SAR_BANK4_OFFSET 0x3000
20 #define SCU_OFFSET0 0xfe4
21 #define SCU_OFFSET1 0xfe8
22 #define OMAP_TYPE_OFFSET 0xfec
23 #define L2X0_SAVE_OFFSET0 0xff0
24 #define L2X0_SAVE_OFFSET1 0xff4
25 #define L2X0_AUXCTRL_OFFSET 0xff8
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6dl-pinfunc.h17 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
20 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
21 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
22 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
23 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
24 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
25 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
26 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
H A Dimx6sl-pinfunc.h17 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
18 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
19 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
20 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
21 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
22 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
23 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
24 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
25 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
26 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8723bs/hal/
H A Dodm_reg.h16 #define ODM_BB_RESET 0x002
17 #define ODM_DUMMY 0x4fe
18 #define RF_T_METER_OLD 0x24
19 #define RF_T_METER_NEW 0x42
21 #define ODM_EDCA_VO_PARAM 0x500
22 #define ODM_EDCA_VI_PARAM 0x504
23 #define ODM_EDCA_BE_PARAM 0x508
24 #define ODM_EDCA_BK_PARAM 0x50C
25 #define ODM_TXPAUSE 0x522
28 #define ODM_FPGA_PHY0_PAGE8 0x800
[all …]
H A Dodm_RegDefine11N.h13 #define ODM_REG_RF_MODE_11N 0x00
14 #define ODM_REG_RF_0B_11N 0x0B
15 #define ODM_REG_CHNBW_11N 0x18
16 #define ODM_REG_T_METER_11N 0x24
17 #define ODM_REG_RF_25_11N 0x25
18 #define ODM_REG_RF_26_11N 0x26
19 #define ODM_REG_RF_27_11N 0x27
20 #define ODM_REG_RF_2B_11N 0x2B
21 #define ODM_REG_RF_2C_11N 0x2C
22 #define ODM_REG_RXRF_A3_11N 0x3C
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_pf.h15 FM10K_PF_MSG_ID_TEST = 0x000, /* msg ID reserved */
16 FM10K_PF_MSG_ID_XCAST_MODES = 0x001,
17 FM10K_PF_MSG_ID_UPDATE_MAC_FWD_RULE = 0x002,
18 FM10K_PF_MSG_ID_LPORT_MAP = 0x100,
19 FM10K_PF_MSG_ID_LPORT_CREATE = 0x200,
20 FM10K_PF_MSG_ID_LPORT_DELETE = 0x201,
21 FM10K_PF_MSG_ID_CONFIG = 0x300,
22 FM10K_PF_MSG_ID_UPDATE_PVID = 0x400,
23 FM10K_PF_MSG_ID_CREATE_FLOW_TABLE = 0x501,
24 FM10K_PF_MSG_ID_DELETE_FLOW_TABLE = 0x502,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/
H A Dnvmem.yaml24 pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$"
42 when it's driven low (logical '0') to allow writing.
46 "^.*@[0-9a-f]+$":
59 - minimum: 0
79 reg = <0x00700000 0x100000>;
87 reg = <0x404 0x10>;
91 reg = <0x504 0x11>;
96 reg = <0x6 0x2>;
101 reg = <0xc 0x1>;
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dsumod.h30 #define RCU_FW_VERSION 0x30c
32 #define RCU_PWR_GATING_SEQ0 0x408
33 #define RCU_PWR_GATING_SEQ1 0x40c
34 #define RCU_PWR_GATING_CNTL 0x410
35 # define PWR_GATING_EN (1 << 0)
36 # define RSVD_MASK (0x3 << 1)
38 # define PCV_MASK (0x1f << 3)
41 # define PCP_MASK (0xf << 8)
44 # define RPW_MASK (0xf << 16)
47 # define ID_MASK (0xf << 24)
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8188eu/hal/
H A Dmac_cfg.c14 0x026, 0x00000041,
15 0x027, 0x00000035,
16 0x428, 0x0000000A,
17 0x429, 0x00000010,
18 0x430, 0x00000000,
19 0x431, 0x00000001,
20 0x432, 0x00000002,
21 0x433, 0x00000004,
22 0x434, 0x00000005,
23 0x435, 0x00000006,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddisplay.h13 u32 enable; /* 0x000 */
14 u32 frame_ctrl; /* 0x004 */
15 u32 bypass; /* 0x008 */
16 u32 algorithm_sel; /* 0x00c */
17 u32 line_int_ctrl; /* 0x010 */
18 u8 res0[0x0c]; /* 0x014 */
19 u32 ch0_addr; /* 0x020 */
20 u32 ch1_addr; /* 0x024 */
21 u32 ch2_addr; /* 0x028 */
22 u32 field_sequence; /* 0x02c */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/
H A Dphydm_regdefine11n.h26 #define ODM_REG_RF_MODE_11N 0x00
27 #define ODM_REG_RF_0B_11N 0x0B
28 #define ODM_REG_CHNBW_11N 0x18
29 #define ODM_REG_T_METER_11N 0x24
30 #define ODM_REG_RF_25_11N 0x25
31 #define ODM_REG_RF_26_11N 0x26
32 #define ODM_REG_RF_27_11N 0x27
33 #define ODM_REG_RF_2B_11N 0x2B
34 #define ODM_REG_RF_2C_11N 0x2C
35 #define ODM_REG_RXRF_A3_11N 0x3C
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Ddm.h11 #define MF_USC_LSC 0
14 #define MAIN_ANT 0
17 #define AUX_ANT_CG_TRX 0
18 #define MAIN_ANT_CGCS_RX 0
22 #define DM_REG_RF_MODE_11N 0x00
23 #define DM_REG_RF_0B_11N 0x0B
24 #define DM_REG_CHNBW_11N 0x18
25 #define DM_REG_T_METER_11N 0x24
26 #define DM_REG_RF_25_11N 0x25
27 #define DM_REG_RF_26_11N 0x26
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/phydm/
H A Dphydm_regdefine11n.h26 #define ODM_REG_RF_MODE_11N 0x00
27 #define ODM_REG_RF_0B_11N 0x0B
28 #define ODM_REG_CHNBW_11N 0x18
29 #define ODM_REG_T_METER_11N 0x24
30 #define ODM_REG_RF_25_11N 0x25
31 #define ODM_REG_RF_26_11N 0x26
32 #define ODM_REG_RF_27_11N 0x27
33 #define ODM_REG_RF_2B_11N 0x2B
34 #define ODM_REG_RF_2C_11N 0x2C
35 #define ODM_REG_RXRF_A3_11N 0x3C
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
15 #define DM_REG_RF_MODE_11N 0x00
16 #define DM_REG_RF_0B_11N 0x0B
17 #define DM_REG_CHNBW_11N 0x18
18 #define DM_REG_T_METER_11N 0x24
19 #define DM_REG_RF_25_11N 0x25
20 #define DM_REG_RF_26_11N 0x26
21 #define DM_REG_RF_27_11N 0x27
[all …]

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