1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/nvmem/nvmem.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: NVMEM (Non Volatile Memory) Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun This binding is intended to represent the location of hardware 14*4882a593Smuzhiyun configuration data stored in NVMEMs like eeprom, efuses and so on. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun On a significant proportion of boards, the manufacturer has stored 17*4882a593Smuzhiyun some data on NVMEM, for the OS to be able to retrieve these 18*4882a593Smuzhiyun information and act upon it. Obviously, the OS has to know about 19*4882a593Smuzhiyun where to retrieve these data from, and where they are stored on the 20*4882a593Smuzhiyun storage device. 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunproperties: 23*4882a593Smuzhiyun $nodename: 24*4882a593Smuzhiyun pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$" 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun "#address-cells": 27*4882a593Smuzhiyun const: 1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun "#size-cells": 30*4882a593Smuzhiyun const: 1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun read-only: 33*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 34*4882a593Smuzhiyun description: 35*4882a593Smuzhiyun Mark the provider as read only. 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun wp-gpios: 38*4882a593Smuzhiyun description: 39*4882a593Smuzhiyun GPIO to which the write-protect pin of the chip is connected. 40*4882a593Smuzhiyun The write-protect GPIO is asserted, when it's driven high 41*4882a593Smuzhiyun (logical '1') to block the write operation. It's deasserted, 42*4882a593Smuzhiyun when it's driven low (logical '0') to allow writing. 43*4882a593Smuzhiyun maxItems: 1 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunpatternProperties: 46*4882a593Smuzhiyun "^.*@[0-9a-f]+$": 47*4882a593Smuzhiyun type: object 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun properties: 50*4882a593Smuzhiyun reg: 51*4882a593Smuzhiyun maxItems: 1 52*4882a593Smuzhiyun description: 53*4882a593Smuzhiyun Offset and size in bytes within the storage device. 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun bits: 56*4882a593Smuzhiyun maxItems: 1 57*4882a593Smuzhiyun items: 58*4882a593Smuzhiyun items: 59*4882a593Smuzhiyun - minimum: 0 60*4882a593Smuzhiyun maximum: 7 61*4882a593Smuzhiyun description: 62*4882a593Smuzhiyun Offset in bit within the address range specified by reg. 63*4882a593Smuzhiyun - minimum: 1 64*4882a593Smuzhiyun description: 65*4882a593Smuzhiyun Size in bit within the address range specified by reg. 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun required: 68*4882a593Smuzhiyun - reg 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunadditionalProperties: true 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunexamples: 73*4882a593Smuzhiyun - | 74*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun qfprom: eeprom@700000 { 77*4882a593Smuzhiyun #address-cells = <1>; 78*4882a593Smuzhiyun #size-cells = <1>; 79*4882a593Smuzhiyun reg = <0x00700000 0x100000>; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* ... */ 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* Data cells */ 86*4882a593Smuzhiyun tsens_calibration: calib@404 { 87*4882a593Smuzhiyun reg = <0x404 0x10>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun tsens_calibration_bckp: calib_bckp@504 { 91*4882a593Smuzhiyun reg = <0x504 0x11>; 92*4882a593Smuzhiyun bits = <6 128>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun pvs_version: pvs-version@6 { 96*4882a593Smuzhiyun reg = <0x6 0x2>; 97*4882a593Smuzhiyun bits = <7 2>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun speed_bin: speed-bin@c{ 101*4882a593Smuzhiyun reg = <0xc 0x1>; 102*4882a593Smuzhiyun bits = <2 3>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun... 107