Lines Matching +full:0 +full:x504
28 reg += 0x4; in rk3562_set_mux()
30 mask = 0xf; in rk3562_set_mux()
39 regmap_write(regmap, 0x504, 0x10001); in rk3562_set_mux()
41 regmap_write(regmap, 0x504, 0x10000); in rk3562_set_mux()
55 #define RK3562_DRV_GPIO0_OFFSET 0x20070
56 #define RK3562_DRV_GPIO1_OFFSET 0x200
57 #define RK3562_DRV_GPIO2_OFFSET 0x240
58 #define RK3562_DRV_GPIO3_OFFSET 0x10280
59 #define RK3562_DRV_GPIO4_OFFSET 0x102C0
69 case 0: in rk3562_calc_drv_reg_and_bit()
90 *reg = 0; in rk3562_calc_drv_reg_and_bit()
121 #define RK3562_PULL_GPIO0_OFFSET 0x20020
122 #define RK3562_PULL_GPIO1_OFFSET 0x80
123 #define RK3562_PULL_GPIO2_OFFSET 0x90
124 #define RK3562_PULL_GPIO3_OFFSET 0x100A0
125 #define RK3562_PULL_GPIO4_OFFSET 0x100B0
135 case 0: in rk3562_calc_pull_reg_and_bit()
156 *reg = 0; in rk3562_calc_pull_reg_and_bit()
180 if (ret < 0) { in rk3562_set_pull()
196 #define RK3562_SMT_GPIO0_OFFSET 0x20030
197 #define RK3562_SMT_GPIO1_OFFSET 0xC0
198 #define RK3562_SMT_GPIO2_OFFSET 0xD0
199 #define RK3562_SMT_GPIO3_OFFSET 0x100E0
200 #define RK3562_SMT_GPIO4_OFFSET 0x100F0
211 case 0: in rk3562_calc_schmitt_reg_and_bit()
232 *reg = 0; in rk3562_calc_schmitt_reg_and_bit()
241 return 0; in rk3562_calc_schmitt_reg_and_bit()
263 PIN_BANK_IOMUX_FLAGS_OFFSET(0, 32, "gpio0",
268 0x20000, 0x20008, 0x20010, 0x20018),
274 0, 0x08, 0x10, 0x18),
280 0x20, 0, 0, 0),
286 0x10040, 0x10048, 0x10050, 0x10058),
290 0,
291 0,
292 0x10060, 0x10068, 0, 0),
299 .grf_mux_offset = 0x0,