1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _FM10K_PF_H_ 5*4882a593Smuzhiyun #define _FM10K_PF_H_ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include "fm10k_type.h" 8*4882a593Smuzhiyun #include "fm10k_common.h" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun bool fm10k_glort_valid_pf(struct fm10k_hw *hw, u16 glort); 11*4882a593Smuzhiyun u16 fm10k_queues_per_pool(struct fm10k_hw *hw); 12*4882a593Smuzhiyun u16 fm10k_vf_queue_index(struct fm10k_hw *hw, u16 vf_idx); 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun enum fm10k_pf_tlv_msg_id_v1 { 15*4882a593Smuzhiyun FM10K_PF_MSG_ID_TEST = 0x000, /* msg ID reserved */ 16*4882a593Smuzhiyun FM10K_PF_MSG_ID_XCAST_MODES = 0x001, 17*4882a593Smuzhiyun FM10K_PF_MSG_ID_UPDATE_MAC_FWD_RULE = 0x002, 18*4882a593Smuzhiyun FM10K_PF_MSG_ID_LPORT_MAP = 0x100, 19*4882a593Smuzhiyun FM10K_PF_MSG_ID_LPORT_CREATE = 0x200, 20*4882a593Smuzhiyun FM10K_PF_MSG_ID_LPORT_DELETE = 0x201, 21*4882a593Smuzhiyun FM10K_PF_MSG_ID_CONFIG = 0x300, 22*4882a593Smuzhiyun FM10K_PF_MSG_ID_UPDATE_PVID = 0x400, 23*4882a593Smuzhiyun FM10K_PF_MSG_ID_CREATE_FLOW_TABLE = 0x501, 24*4882a593Smuzhiyun FM10K_PF_MSG_ID_DELETE_FLOW_TABLE = 0x502, 25*4882a593Smuzhiyun FM10K_PF_MSG_ID_UPDATE_FLOW = 0x503, 26*4882a593Smuzhiyun FM10K_PF_MSG_ID_DELETE_FLOW = 0x504, 27*4882a593Smuzhiyun FM10K_PF_MSG_ID_SET_FLOW_STATE = 0x505, 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun enum fm10k_pf_tlv_attr_id_v1 { 31*4882a593Smuzhiyun FM10K_PF_ATTR_ID_ERR = 0x00, 32*4882a593Smuzhiyun FM10K_PF_ATTR_ID_LPORT_MAP = 0x01, 33*4882a593Smuzhiyun FM10K_PF_ATTR_ID_XCAST_MODE = 0x02, 34*4882a593Smuzhiyun FM10K_PF_ATTR_ID_MAC_UPDATE = 0x03, 35*4882a593Smuzhiyun FM10K_PF_ATTR_ID_VLAN_UPDATE = 0x04, 36*4882a593Smuzhiyun FM10K_PF_ATTR_ID_CONFIG = 0x05, 37*4882a593Smuzhiyun FM10K_PF_ATTR_ID_CREATE_FLOW_TABLE = 0x06, 38*4882a593Smuzhiyun FM10K_PF_ATTR_ID_DELETE_FLOW_TABLE = 0x07, 39*4882a593Smuzhiyun FM10K_PF_ATTR_ID_UPDATE_FLOW = 0x08, 40*4882a593Smuzhiyun FM10K_PF_ATTR_ID_FLOW_STATE = 0x09, 41*4882a593Smuzhiyun FM10K_PF_ATTR_ID_FLOW_HANDLE = 0x0A, 42*4882a593Smuzhiyun FM10K_PF_ATTR_ID_DELETE_FLOW = 0x0B, 43*4882a593Smuzhiyun FM10K_PF_ATTR_ID_PORT = 0x0C, 44*4882a593Smuzhiyun FM10K_PF_ATTR_ID_UPDATE_PVID = 0x0D, 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define FM10K_MSG_LPORT_MAP_GLORT_SHIFT 0 48*4882a593Smuzhiyun #define FM10K_MSG_LPORT_MAP_GLORT_SIZE 16 49*4882a593Smuzhiyun #define FM10K_MSG_LPORT_MAP_MASK_SHIFT 16 50*4882a593Smuzhiyun #define FM10K_MSG_LPORT_MAP_MASK_SIZE 16 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define FM10K_MSG_UPDATE_PVID_GLORT_SHIFT 0 53*4882a593Smuzhiyun #define FM10K_MSG_UPDATE_PVID_GLORT_SIZE 16 54*4882a593Smuzhiyun #define FM10K_MSG_UPDATE_PVID_PVID_SHIFT 16 55*4882a593Smuzhiyun #define FM10K_MSG_UPDATE_PVID_PVID_SIZE 16 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define FM10K_MSG_ERR_PEP_NOT_SCHEDULED 280 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* The following data structures are overlayed directly onto TLV mailbox 60*4882a593Smuzhiyun * messages, and must not break 4 byte alignment. Ensure the structures line 61*4882a593Smuzhiyun * up correctly as per their TLV definition. 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct fm10k_mac_update { 65*4882a593Smuzhiyun __le32 mac_lower; 66*4882a593Smuzhiyun __le16 mac_upper; 67*4882a593Smuzhiyun __le16 vlan; 68*4882a593Smuzhiyun __le16 glort; 69*4882a593Smuzhiyun u8 flags; 70*4882a593Smuzhiyun u8 action; 71*4882a593Smuzhiyun } __aligned(4) __packed; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun struct fm10k_global_table_data { 74*4882a593Smuzhiyun __le32 used; 75*4882a593Smuzhiyun __le32 avail; 76*4882a593Smuzhiyun } __aligned(4) __packed; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun struct fm10k_swapi_error { 79*4882a593Smuzhiyun __le32 status; 80*4882a593Smuzhiyun struct fm10k_global_table_data mac; 81*4882a593Smuzhiyun struct fm10k_global_table_data nexthop; 82*4882a593Smuzhiyun struct fm10k_global_table_data ffu; 83*4882a593Smuzhiyun } __aligned(4) __packed; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun s32 fm10k_msg_lport_map_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *); 86*4882a593Smuzhiyun extern const struct fm10k_tlv_attr fm10k_lport_map_msg_attr[]; 87*4882a593Smuzhiyun #define FM10K_PF_MSG_LPORT_MAP_HANDLER(func) \ 88*4882a593Smuzhiyun FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_LPORT_MAP, \ 89*4882a593Smuzhiyun fm10k_lport_map_msg_attr, func) 90*4882a593Smuzhiyun extern const struct fm10k_tlv_attr fm10k_update_pvid_msg_attr[]; 91*4882a593Smuzhiyun #define FM10K_PF_MSG_UPDATE_PVID_HANDLER(func) \ 92*4882a593Smuzhiyun FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_UPDATE_PVID, \ 93*4882a593Smuzhiyun fm10k_update_pvid_msg_attr, func) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun s32 fm10k_msg_err_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *); 96*4882a593Smuzhiyun extern const struct fm10k_tlv_attr fm10k_err_msg_attr[]; 97*4882a593Smuzhiyun #define FM10K_PF_MSG_ERR_HANDLER(msg, func) \ 98*4882a593Smuzhiyun FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_##msg, fm10k_err_msg_attr, func) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun s32 fm10k_iov_select_vid(struct fm10k_vf_info *vf_info, u16 vid); 101*4882a593Smuzhiyun s32 fm10k_iov_msg_msix_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *); 102*4882a593Smuzhiyun s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *, u32 **, 103*4882a593Smuzhiyun struct fm10k_mbx_info *); 104*4882a593Smuzhiyun s32 fm10k_iov_msg_lport_state_pf(struct fm10k_hw *, u32 **, 105*4882a593Smuzhiyun struct fm10k_mbx_info *); 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun extern const struct fm10k_info fm10k_pf_info; 108*4882a593Smuzhiyun #endif /* _FM10K_PF_H */ 109