| /OK3568_Linux_fs/kernel/drivers/soc/rockchip/ |
| H A D | rk_camera_sensor_info.h | 119 #define ov7675_FULL_RESOLUTION 0x30000 /* 0.3 megapixel */ 120 #define ov9650_FULL_RESOLUTION 0x130000 /* 1.3 megapixel */ 121 #define ov2640_FULL_RESOLUTION 0x200000 /* 2 megapixel */ 122 #define ov2655_FULL_RESOLUTION 0x200000 123 #define ov2659_FULL_RESOLUTION 0x200000 124 #define gc2145_FULL_RESOLUTION 0x200000 125 #define gc2155_FULL_RESOLUTION 0x200000 127 #define ov2660_FULL_RESOLUTION 0x200000 129 #define ov7690_FULL_RESOLUTION 0x300000 130 #define ov3640_FULL_RESOLUTION 0x300000 [all …]
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| /OK3568_Linux_fs/kernel/drivers/soc/qcom/ |
| H A D | qcom_gsbi.c | 17 #define GSBI_CTRL_REG 0x0000 21 #define TCSR_ADM_CRCI_BASE 0x70 30 0x000003, 0x00000c, 0x000030, 0x0000c0, 31 0x000300, 0x000c00, 0x003000, 0x00c000, 32 0x030000, 0x0c0000, 0x300000, 0xc00000 35 0x000003, 0x00000c, 0x000030, 0x0000c0, 36 0x000300, 0x000c00, 0x003000, 0x00c000, 37 0x030000, 0x0c0000, 0x300000, 0xc00000 48 0x001800, 0x006000, 0x000030, 0x0000c0, 49 0x000300, 0x000400, 0x000000, 0x000000, [all …]
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| /OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/goya/asic_reg/ |
| H A D | cpu_ca53_cfg_masks.h | 23 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_SHIFT 0 24 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK 0x3 26 #define CPU_CA53_CFG_ARM_CFG_END_MASK 0x30 28 #define CPU_CA53_CFG_ARM_CFG_TE_MASK 0x300 30 #define CPU_CA53_CFG_ARM_CFG_VINITHI_MASK 0x3000 33 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_SHIFT 0 34 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_MASK 0xFFFFFFFF 37 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_SHIFT 0 38 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_MASK 0xFF 41 #define CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_SHIFT 0 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | qcom,sm8150-pinctrl.txt | 178 reg = <0x03100000 0x300000>, 179 <0x03500000 0x300000>, 180 <0x03900000 0x300000>, 181 <0x03D00000 0x300000>; 186 gpio-ranges = <&tlmm 0 0 175>; 187 gpio-reserved-ranges = <0 4>, <126 4>;
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| H A D | qcom,sm8250-pinctrl.yaml | 68 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$" 136 reg = <0x0f100000 0x300000>, 137 <0x0f500000 0x300000>, 138 <0x0f900000 0x300000>; 145 gpio-ranges = <&tlmm 0 0 180>;
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| H A D | qcom,sc7180-pinctrl.txt | 176 reg = <0x3500000 0x300000>, 177 <0x3900000 0x300000>, 178 <0x3D00000 0x300000>; 183 gpio-ranges = <&tlmm 0 0 119>; 184 gpio-reserved-ranges = <0 4>, <106 4>;
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| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | at91sam9x5ek.h | 14 #define CONFIG_SYS_TEXT_BASE 0x26f00000 55 #define CONFIG_SYS_SDRAM_BASE 0x20000000 56 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 69 #define CONFIG_SYS_NAND_BASE 0x40000000 92 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 95 #define CONFIG_SYS_MEMTEST_END 0x26e00000 99 #define CONFIG_ENV_OFFSET 0x120000 100 #define CONFIG_ENV_OFFSET_REDUND 0x100000 101 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 103 "0x22000000 0x200000 0x300000; " \ [all …]
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| H A D | smdkc100.h | 32 #define CONFIG_SYS_SDRAM_BASE 0x30000000 35 #define CONFIG_SYS_TEXT_BASE 0x34800000 44 * 1MB = 0x100000, 0x100000 = 1024 * 1024 51 #define CONFIG_SERIAL0 1 /* use SERIAL 0 on SMDKC100 */ 69 #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \ 70 " onenand write 0x32008000 0x0 0x40000\0" 76 "onenand erase 0x60000 0x300000;" \ 77 "onenand write 0x31008000 0x60000 0x300000\0" \ 80 "onenand write 0x32000000 0x1260000 0x8C0000\0" \ 82 "onenand read 0x30007FC0 0x60000 0x300000;" \ [all …]
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| H A D | at91sam9m10g45ek.h | 16 #define CONFIG_SYS_TEXT_BASE 0x73f00000 43 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 56 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 79 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 82 #define CONFIG_SYS_MEMTEST_END 0x23e00000 86 #define CONFIG_ENV_OFFSET 0x120000 87 #define CONFIG_ENV_OFFSET_REDUND 0x100000 88 #define CONFIG_ENV_SIZE 0x20000 91 "nand read 0x70000000 0x200000 0x300000;" \ 92 "bootm 0x70000000" [all …]
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| H A D | corvus.h | 27 #define CONFIG_SYS_TEXT_BASE 0x72000000 66 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 97 #define CONFIG_ENV_OFFSET 0x100000 98 #define CONFIG_ENV_OFFSET_REDUND 0x180000 102 "nand read 0x70000000 0x200000 0x300000;" \ 103 "bootm 0x70000000" 113 SZ_4M, 0x1000) 117 #define CONFIG_SPL_TEXT_BASE 0x300000 129 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 130 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 [all …]
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| H A D | at91sam9n12ek.h | 19 #define CONFIG_SYS_TEXT_BASE 0x26f00000 49 #define CONFIG_SYS_SDRAM_BASE 0x20000000 50 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 68 #define CONFIG_SYS_NAND_BASE 0x40000000 76 "console=console=ttyS0,115200\0" \ 77 "mtdparts="MTDPARTS_DEFAULT"\0" \ 78 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 79 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 83 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */ 85 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/ |
| H A D | qoriq-sec4.0-0.dtsi | 2 * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ] 36 compatible = "fsl,sec-v4.0"; 40 reg = <0x300000 0x10000>; 41 ranges = <0 0x300000 0x10000>; 42 interrupts = <92 2 0 0>; 45 compatible = "fsl,sec-v4.0-job-ring"; 46 reg = <0x1000 0x1000>; 47 interrupts = <88 2 0 0>; 51 compatible = "fsl,sec-v4.0-job-ring"; 52 reg = <0x2000 0x1000>; [all …]
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| H A D | qoriq-sec5.0-0.dtsi | 2 * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ] 36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; 40 reg = <0x300000 0x10000>; 41 ranges = <0 0x300000 0x10000>; 42 interrupts = <92 2 0 0>; 45 compatible = "fsl,sec-v5.0-job-ring", 46 "fsl,sec-v4.0-job-ring"; 47 reg = <0x1000 0x1000>; 48 interrupts = <88 2 0 0>; 52 compatible = "fsl,sec-v5.0-job-ring", [all …]
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| H A D | qoriq-sec4.2-0.dtsi | 2 * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ] 36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 40 reg = <0x300000 0x10000>; 41 ranges = <0 0x300000 0x10000>; 42 interrupts = <92 2 0 0>; 46 "fsl,sec-v4.0-job-ring"; 47 reg = <0x1000 0x1000>; 48 interrupts = <88 2 0 0>; 53 "fsl,sec-v4.0-job-ring"; 54 reg = <0x2000 0x1000>; [all …]
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| H A D | qoriq-sec5.3-0.dtsi | 2 * QorIQ Sec/Crypto 5.3 device tree stub [ controller @ offset 0x300000 ] 36 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0"; 40 reg = <0x300000 0x10000>; 41 ranges = <0 0x300000 0x10000>; 42 interrupts = <92 2 0 0>; 46 "fsl,sec-v5.0-job-ring", 47 "fsl,sec-v4.0-job-ring"; 48 reg = <0x1000 0x1000>; 49 interrupts = <88 2 0 0>; 54 "fsl,sec-v5.0-job-ring", [all …]
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| H A D | qoriq-sec5.2-0.dtsi | 2 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ] 36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0"; 40 reg = <0x300000 0x10000>; 41 ranges = <0 0x300000 0x10000>; 42 interrupts = <92 2 0 0>; 46 "fsl,sec-v5.0-job-ring", 47 "fsl,sec-v4.0-job-ring"; 48 reg = <0x1000 0x1000>; 49 interrupts = <88 2 0 0>; 54 "fsl,sec-v5.0-job-ring", [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/ralink/ |
| H A D | rt2880.dtsi | 8 cpu@0 { 14 #address-cells = <0>; 22 reg = <0x300000 0x200000>; 23 ranges = <0x0 0x300000 0x1FFFFF>; 28 sysc@0 { 30 reg = <0x0 0x100>; 35 reg = <0x200 0x100>; 46 reg = <0x300 0x100>; 51 reg = <0xc00 0x100>;
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | imx28-apf28.dts | 15 reg = <0x40000000 0x08000000>; 22 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; 25 partition@0 { 27 reg = <0x0 0x300000>; 32 reg = <0x300000 0x80000>; 37 reg = <0x380000 0x80000>; 42 reg = <0x400000 0x80000>; 47 reg = <0x480000 0x80000>; 52 reg = <0x500000 0x800000>; 57 reg = <0xd00000 0xf300000>; [all …]
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| H A D | picoxcell-pc7302-pc3x2.dts | 14 reg = <0x0 0x08000000>; 31 nand: gpio-nand@2,0 { 35 reg = <2 0x0000 0x1000>; 38 <0x00000000 0x80220000>; 40 gpios = <&banka 1 0 /* rdy */ 41 &banka 2 0 /* nce */ 42 &banka 3 0 /* ale */ 43 &banka 4 0 /* cle */ 44 0 /* nwp */>; 48 reg = <0x100000 0x80000>; [all …]
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| H A D | picoxcell-pc7302-pc3x3.dts | 14 reg = <0x0 0x08000000>; 37 nand: gpio-nand@2,0 { 41 reg = <2 0x0000 0x1000>; 44 <0x00000000 0x80220000>; 46 gpios = <&banka 1 0 /* rdy */ 47 &banka 2 0 /* nce */ 48 &banka 3 0 /* ale */ 49 &banka 4 0 /* cle */ 50 0 /* nwp */>; 54 reg = <0x100000 0x80000>; [all …]
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| H A D | kirkwood-pogoplug-series-4.dts | 23 reg = <0x00000000 0x08000000>; 33 #size-cells = <0>; 34 pinctrl-0 = <&pmx_button_eject>; 48 pinctrl-0 = <&pmx_led_green &pmx_led_red>; 105 * This PCIE controller has a USB 3.0 XHCI controller at 1,0 117 pinctrl-0 = <&pmx_sata0 &pmx_sata1>; 124 pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>; 139 partition@0 { 141 reg = <0x00000000 0x200000>; 147 reg = <0x00200000 0x300000>; [all …]
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| H A D | kirkwood-iconnect.dts | 13 reg = <0x00000000 0x10000000>; 19 linux,initrd-start = <0x4500040>; 20 linux,initrd-end = <0x4800000>; 71 reg = <0x4c>; 81 pinctrl-0 = < &pmx_led_level &pmx_led_power_blue 126 #size-cells = <0>; 127 pinctrl-0 = < &pmx_button_reset &pmx_button_otb >; 148 partition@0 { 150 reg = <0x0000000 0xc0000>; 155 reg = <0xa0000 0x20000>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/ |
| H A D | hip05-d02.dts | 17 memory@0 { 19 reg = <0x0 0x00000000 0x0 0x80000000>; 33 #size-cells = <0>; 39 debounce-interval = <0>; 56 ranges = <0 0 0x0 0x90000000 0x08000000>, 57 <1 0 0x0 0x98000000 0x08000000>; 59 nor-flash@0,0 { 63 reg = <0 0x0 0x08000000>; 66 partition@0 { 68 reg = <0x0 0x300000>; [all …]
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| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.sha1 | 29 a) cp the new Image on a position in RAM (here 0x300000) 30 (for this example we use the Image from Flash, stored at 0xfffa0000 and 31 0x60000 Bytes long) 35 b) Initialize the SHA1 sum in the Image with 0x00 38 for the pcs440ep Flash: 0xfffa0000 + 0x60000 + -0x20 39 = 0xffffffe0 40 for the example in RAM: 0x300000 + 0x60000 + -0x20 41 = 0x35ffe0 45 "mw.b 35ffe0 0 14"
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| /OK3568_Linux_fs/kernel/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8192E_phyreg.h | 11 #define RF_DATA 0x1d4 13 #define rPMAC_Reset 0x100 14 #define rPMAC_TxStart 0x104 15 #define rPMAC_TxLegacySIG 0x108 16 #define rPMAC_TxHTSIG1 0x10c 17 #define rPMAC_TxHTSIG2 0x110 18 #define rPMAC_PHYDebug 0x114 19 #define rPMAC_TxPacketNum 0x118 20 #define rPMAC_TxIdle 0x11c 21 #define rPMAC_TxMACHeader0 0x120 [all …]
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