1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ] 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 8*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 9*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 10*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 12*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 13*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 14*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 15*4882a593Smuzhiyun * derived from this software without specific prior written permission. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 21*4882a593Smuzhiyun * later version. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyuncrypto: crypto@300000 { 36*4882a593Smuzhiyun compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; 37*4882a593Smuzhiyun fsl,sec-era = <5>; 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <1>; 40*4882a593Smuzhiyun reg = <0x300000 0x10000>; 41*4882a593Smuzhiyun ranges = <0 0x300000 0x10000>; 42*4882a593Smuzhiyun interrupts = <92 2 0 0>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun sec_jr0: jr@1000 { 45*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-job-ring", 46*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 47*4882a593Smuzhiyun reg = <0x1000 0x1000>; 48*4882a593Smuzhiyun interrupts = <88 2 0 0>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun sec_jr1: jr@2000 { 52*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-job-ring", 53*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 54*4882a593Smuzhiyun reg = <0x2000 0x1000>; 55*4882a593Smuzhiyun interrupts = <89 2 0 0>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun sec_jr2: jr@3000 { 59*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-job-ring", 60*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 61*4882a593Smuzhiyun reg = <0x3000 0x1000>; 62*4882a593Smuzhiyun interrupts = <90 2 0 0>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun sec_jr3: jr@4000 { 66*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-job-ring", 67*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 68*4882a593Smuzhiyun reg = <0x4000 0x1000>; 69*4882a593Smuzhiyun interrupts = <91 2 0 0>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun rtic@6000 { 73*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-rtic", 74*4882a593Smuzhiyun "fsl,sec-v4.0-rtic"; 75*4882a593Smuzhiyun #address-cells = <1>; 76*4882a593Smuzhiyun #size-cells = <1>; 77*4882a593Smuzhiyun reg = <0x6000 0x100>; 78*4882a593Smuzhiyun ranges = <0x0 0x6100 0xe00>; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun rtic_a: rtic-a@0 { 81*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-rtic-memory", 82*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 83*4882a593Smuzhiyun reg = <0x00 0x20 0x100 0x80>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun rtic_b: rtic-b@20 { 87*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-rtic-memory", 88*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 89*4882a593Smuzhiyun reg = <0x20 0x20 0x200 0x80>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun rtic_c: rtic-c@40 { 93*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-rtic-memory", 94*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 95*4882a593Smuzhiyun reg = <0x40 0x20 0x300 0x80>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun rtic_d: rtic-d@60 { 99*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-rtic-memory", 100*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 101*4882a593Smuzhiyun reg = <0x60 0x20 0x500 0x80>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun}; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyunsec_mon: sec_mon@314000 { 107*4882a593Smuzhiyun compatible = "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon"; 108*4882a593Smuzhiyun reg = <0x314000 0x1000>; 109*4882a593Smuzhiyun interrupts = <93 2 0 0>; 110*4882a593Smuzhiyun}; 111