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/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h16 #define CCM_GPR0_OFFSET 0x0
17 #define CCM_OBSERVE0_OFFSET 0x0400
18 #define CCM_SCTRL0_OFFSET 0x0800
19 #define CCM_CCGR0_OFFSET 0x4000
20 #define CCM_ROOT0_TARGET_OFFSET 0x8000
59 struct mxc_ccm_ccgr ccgr_array[191]; /* offset 0x4000 */
61 struct mxc_ccm_root_slice root[121]; /* offset 0x8000 */
66 uint32_t ctrl_24m; /* offset 0x0000 */
70 uint32_t rcosc_config0; /* offset 0x0010 */
74 uint32_t rcosc_config1; /* offset 0x0020 */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dsorg94.c33 nvkm_mask(device, 0x61c128 + loff, 0x0000003f, watermark); in g94_sor_dp_watermark()
42 nvkm_mask(device, 0x61c10c + loff, 0x000001fc, TU << 2); in g94_sor_dp_activesym()
43 nvkm_mask(device, 0x61c128 + loff, 0x010f7f00, VTUa << 24 | in g94_sor_dp_activesym()
53 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym()
54 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym()
65 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
66 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
67 data[2] = nvkm_rd32(device, 0x61c130 + loff); in g94_sor_dp_drive()
68 if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0) in g94_sor_dp_drive()
69 data[2] = (data[2] & ~0x0000ff00) | (pu << 8); in g94_sor_dp_drive()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-rpc/include/mach/
H A Dhardware.h25 #define RPC_RAM_SIZE 0x10000000
26 #define RPC_RAM_START 0x10000000
28 #define EASI_SIZE 0x08000000 /* EASI I/O */
29 #define EASI_START 0x08000000
30 #define EASI_BASE IOMEM(0xe5000000)
32 #define IO_START 0x03000000 /* I/O */
33 #define IO_SIZE 0x01000000
34 #define IO_BASE IOMEM(0xe0000000)
36 #define SCREEN_START 0x02000000 /* VRAM */
37 #define SCREEN_END 0xdfc00000
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dmpc83xx.h24 #define EXC_OFF_SYS_RESET 0x0100
32 #define CONFIG_DEFAULT_IMMR 0xFF400000
35 #define IMMRBAR 0x0000
36 #define IMMRBAR_BASE_ADDR 0xFFF00000 /* Base addr. mask */
43 #define LBLAWBAR0 0x0020
44 #define LBLAWAR0 0x0024
45 #define LBLAWBAR1 0x0028
46 #define LBLAWAR1 0x002C
47 #define LBLAWBAR2 0x0030
48 #define LBLAWAR2 0x0034
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dcavium-mdio.txt15 - #size-cells: Must be <0>. MDIO addresses have no size component.
23 #size-cells = <0>;
24 reg = <0x11800 0x00001800 0x0 0x40>;
26 ethernet-phy@0 {
28 reg = <0>;
58 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
59 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
60 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
65 #size-cells = <0>;
66 reg = <0x87e0 0x05003800 0x0 0x30>;
[all …]
/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/ar934x/
H A Dclk.c34 /* Index 0 is for XTAL=25MHz , Index 1 is for XTAL=40MHz */
50 { 400, 400, 200, { 0, 1, 1, { 32, 20 } }, { 0, 1, 1, { 32, 20 } } },
51 { 500, 400, 200, { 1, 1, 0, { 20, 12 } }, { 0, 1, 1, { 32, 20 } } },
52 { 533, 400, 200, { 1, 1, 0, { 21, 13 } }, { 0, 1, 1, { 32, 20 } } },
53 { 533, 500, 250, { 1, 1, 0, { 21, 13 } }, { 0, 1, 0, { 20, 12 } } },
54 { 560, 480, 240, { 1, 1, 0, { 22, 14 } }, { 1, 1, 0, { 19, 12 } } },
55 { 566, 400, 200, { 1, 1, 0, { 22, 14 } }, { 1, 1, 0, { 16, 10 } } },
56 { 566, 450, 225, { 1, 1, 0, { 22, 14 } }, { 0, 1, 1, { 36, 22 } } },
57 { 566, 475, 237, { 1, 1, 0, { 22, 14 } }, { 1, 1, 0, { 19, 11 } } },
58 { 566, 500, 250, { 1, 1, 0, { 22, 14 } }, { 1, 1, 0, { 20, 12 } } },
[all …]
/OK3568_Linux_fs/kernel/drivers/video/fbdev/
H A Di740_reg.h37 #define XRX 0x3D6
38 #define MRX 0x3D2
41 #define DACMASK 0x3C6
42 #define DACSTATE 0x3C7
43 #define DACRX 0x3C7
44 #define DACWX 0x3C8
45 #define DACDATA 0x3C9
48 #define START_ADDR_HI 0x0C
49 #define START_ADDR_LO 0x0D
50 #define VERT_SYNC_END 0x11
[all …]
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Dof_device_64.c28 ret = 0; in of_ioremap()
53 return 0; in of_bus_pci_match()
62 return 0; in of_bus_pci_match()
67 return 0; in of_bus_pci_match()
85 return 0; in of_bus_simba_match()
91 return 0; in of_bus_simba_map()
110 if (!((addr[0] ^ range[0]) & 0x03000000)) in of_bus_pci_map()
116 if ((addr[0] & 0x03000000) == 0x03000000 && in of_bus_pci_map()
117 (range[0] & 0x03000000) == 0x02000000) in of_bus_pci_map()
131 for (i = 0; i < na - 1; i++) in of_bus_pci_map()
[all …]
/OK3568_Linux_fs/u-boot/board/altera/arria5-socdk/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x00000000,
19 0x00000000,
20 0x00000000,
21 0x00008000,
22 0x00060180,
23 0x18060000,
24 0x18000060,
25 0x00018060,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgv100.c32 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x730 + (sm * 0x80))); in gv100_gr_trap_sm()
33 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x734 + (sm * 0x80))); in gv100_gr_trap_sm()
38 warp = nvkm_enum_find(gf100_mp_warp_error, werr & 0xffff); in gv100_gr_trap_sm()
44 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x730 + sm * 0x80), 0x00000000); in gv100_gr_trap_sm()
45 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x734 + sm * 0x80), gerr); in gv100_gr_trap_sm()
51 gv100_gr_trap_sm(gr, gpc, tpc, 0); in gv100_gr_trap_mp()
59 nvkm_mask(device, 0x4188a4, 0x03000000, 0x03000000); in gv100_gr_init_4188a4()
67 for (sm = 0; sm < 0x100; sm += 0x80) { in gv100_gr_init_shader_exceptions()
68 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x728 + sm), 0x0085eb64); in gv100_gr_init_shader_exceptions()
69 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x610), 0x00000001); in gv100_gr_init_shader_exceptions()
[all …]
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/
H A Dm5272.h21 #define GPIO_PACNT_PA15MSK (0xC0000000)
22 #define GPIO_PACNT_DGNT1 (0x40000000)
23 #define GPIO_PACNT_PA14MSK (0x30000000)
24 #define GPIO_PACNT_DREQ1 (0x10000000)
25 #define GPIO_PACNT_PA13MSK (0x0C000000)
26 #define GPIO_PACNT_DFSC3 (0x04000000)
27 #define GPIO_PACNT_PA12MSK (0x03000000)
28 #define GPIO_PACNT_DFSC2 (0x01000000)
29 #define GPIO_PACNT_PA11MSK (0x00C00000)
30 #define GPIO_PACNT_QSPI_CS1 (0x00800000)
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dmpc8536ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 partition@0 {
45 reg = <0x0 0x03000000>;
50 reg = <0x03000000 0x00e00000>;
56 reg = <0x03e00000 0x00200000>;
62 reg = <0x04000000 0x00400000>;
67 reg = <0x04400000 0x03b00000>;
72 reg = <0x07f00000 0x00080000>;
77 reg = <0x07f80000 0x00080000>;
[all …]
H A Dp1022ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 partition@0 {
45 reg = <0x0 0x03000000>;
51 reg = <0x03000000 0x00e00000>;
57 reg = <0x03e00000 0x00200000>;
63 reg = <0x04000000 0x00400000>;
69 reg = <0x04400000 0x03b00000>;
74 reg = <0x07f00000 0x00080000>;
80 reg = <0x07f80000 0x00080000>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/include/
H A Dsbhnddma.h81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
85 #define XC_MR_MASK 0x000001C0 /**< Multiple outstanding reads */
90 #define XC_BL_MASK 0x001C0000 /**< BurstLen bits */
92 #define XC_PC_MASK 0x00E00000 /**< Prefetch control */
94 #define XC_PT_MASK 0x03000000 /**< Prefetch threshold */
98 #define DMA_MR_1 0
108 #define DMA_BL_16 0
117 #define DMA_PC_0 0
124 #define DMA_PT_1 0
130 #define DMA_CS_OFF 0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/
H A Dsbhnddma.h73 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
77 #define XC_MR_MASK 0x000001C0 /**< Multiple outstanding reads */
82 #define XC_BL_MASK 0x001C0000 /**< BurstLen bits */
84 #define XC_PC_MASK 0x00E00000 /**< Prefetch control */
86 #define XC_PT_MASK 0x03000000 /**< Prefetch threshold */
90 #define DMA_MR_1 0
100 #define DMA_BL_16 0
107 #define DMA_BL_INVALID 0xFF
110 #define DMA_PC_0 0
118 #define DMA_PT_1 0
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/
H A Dsbhnddma.h73 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
77 #define XC_MR_MASK 0x000001C0 /**< Multiple outstanding reads */
82 #define XC_BL_MASK 0x001C0000 /**< BurstLen bits */
84 #define XC_PC_MASK 0x00E00000 /**< Prefetch control */
86 #define XC_PT_MASK 0x03000000 /**< Prefetch threshold */
90 #define DMA_MR_1 0
100 #define DMA_BL_16 0
107 #define DMA_BL_INVALID 0xFF
110 #define DMA_PC_0 0
118 #define DMA_PT_1 0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/
H A Dsbhnddma.h81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
85 #define XC_MR_MASK 0x000001C0 /**< Multiple outstanding reads */
90 #define XC_BL_MASK 0x001C0000 /**< BurstLen bits */
92 #define XC_PC_MASK 0x00E00000 /**< Prefetch control */
94 #define XC_PT_MASK 0x03000000 /**< Prefetch threshold */
98 #define DMA_MR_1 0
108 #define DMA_BL_16 0
117 #define DMA_PC_0 0
125 #define DMA_PT_1 0
131 #define DMA_CS_OFF 0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/
H A Dsbhnddma.h81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
85 #define XC_MR_MASK 0x000001C0 /**< Multiple outstanding reads */
90 #define XC_BL_MASK 0x001C0000 /**< BurstLen bits */
92 #define XC_PC_MASK 0x00E00000 /**< Prefetch control */
94 #define XC_PT_MASK 0x03000000 /**< Prefetch threshold */
98 #define DMA_MR_1 0
108 #define DMA_BL_16 0
117 #define DMA_PC_0 0
125 #define DMA_PT_1 0
131 #define DMA_CS_OFF 0
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/
H A Dsbhnddma.h81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
85 #define XC_MR_MASK 0x000001C0 /**< Multiple outstanding reads */
90 #define XC_BL_MASK 0x001C0000 /**< BurstLen bits */
92 #define XC_PC_MASK 0x00E00000 /**< Prefetch control */
94 #define XC_PT_MASK 0x03000000 /**< Prefetch threshold */
98 #define DMA_MR_1 0
108 #define DMA_BL_16 0
117 #define DMA_PC_0 0
125 #define DMA_PT_1 0
131 #define DMA_CS_OFF 0
[all …]
/OK3568_Linux_fs/u-boot/board/cadence/xtfpga/
H A DKconfig33 default 0x04000000 if XTFPGA_LX60
34 default 0x03000000 if XTFPGA_LX110
35 default 0x06000000 if XTFPGA_LX200
36 default 0x18000000 if XTFPGA_ML605
37 default 0x38000000 if XTFPGA_KC705
/OK3568_Linux_fs/rkbin/RKTRUST/
H A DRV1106TOS.ini5 ADDR=0x03000000
7 MCU0=bin/rv11/rv1106_hpmcu_wrap_v1.56.bin,0xff6ff000,disabled
H A DRV1126TOS_MINI_MEM.ini3 ADDR=0x03000000
5 MCU=bin/rv11/rv1126_riscv_v1.03.bin,0x208000,disabled
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c45 return nvkm_rd32(device, 0x004600); in read_div()
52 u32 ctrl = nvkm_rd32(device, base + 0); in read_pll()
55 u32 post_div = 0; in read_pll()
56 u32 clock = 0; in read_pll()
60 case 0x4020: in read_pll()
61 post_div = 1 << ((nvkm_rd32(device, 0x4070) & 0x000f0000) >> 16); in read_pll()
63 case 0x4028: in read_pll()
64 post_div = (nvkm_rd32(device, 0x4040) & 0x000f0000) >> 16; in read_pll()
70 N1 = (coef & 0x0000ff00) >> 8; in read_pll()
71 M1 = (coef & 0x000000ff); in read_pll()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/pci/cx18/
H A Dcx18-av-firmware.c13 #define CX18_AUDIO_ENABLE 0xc72014
14 #define CX18_AI1_MUX_MASK 0x30
15 #define CX18_AI1_MUX_I2S1 0x00
16 #define CX18_AI1_MUX_I2S2 0x10
17 #define CX18_AI1_MUX_843_I2S 0x20
18 #define CX18_AI1_MUX_INVALID 0x30
25 int ret = 0; in cx18_av_verifyfw()
34 dl_control &= 0x00ffffff; in cx18_av_verifyfw()
35 dl_control |= 0x0f000000; in cx18_av_verifyfw()
38 } while ((dl_control & 0xff000000) != 0x0f000000); in cx18_av_verifyfw()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/vr41xx/ibm-workpad/
H A Dsetup.c12 #define WORKPAD_ISA_IO_BASE 0x15000000
13 #define WORKPAD_ISA_IO_SIZE 0x03000000
14 #define WORKPAD_ISA_IO_START 0
24 return 0; in ibm_workpad_setup()

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