1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * mcf5272.h -- Definitions for Motorola Coldfire 5272 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Based on mcf5272sim.h of uCLinux distribution: 5*4882a593Smuzhiyun * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com) 6*4882a593Smuzhiyun * (C) Copyright 2000, Lineo Inc. (www.lineo.com) 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef mcf5272_h 12*4882a593Smuzhiyun #define mcf5272_h 13*4882a593Smuzhiyun /****************************************************************************/ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * Size of internal RAM 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define INT_RAM_SIZE 4096 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define GPIO_PACNT_PA15MSK (0xC0000000) 22*4882a593Smuzhiyun #define GPIO_PACNT_DGNT1 (0x40000000) 23*4882a593Smuzhiyun #define GPIO_PACNT_PA14MSK (0x30000000) 24*4882a593Smuzhiyun #define GPIO_PACNT_DREQ1 (0x10000000) 25*4882a593Smuzhiyun #define GPIO_PACNT_PA13MSK (0x0C000000) 26*4882a593Smuzhiyun #define GPIO_PACNT_DFSC3 (0x04000000) 27*4882a593Smuzhiyun #define GPIO_PACNT_PA12MSK (0x03000000) 28*4882a593Smuzhiyun #define GPIO_PACNT_DFSC2 (0x01000000) 29*4882a593Smuzhiyun #define GPIO_PACNT_PA11MSK (0x00C00000) 30*4882a593Smuzhiyun #define GPIO_PACNT_QSPI_CS1 (0x00800000) 31*4882a593Smuzhiyun #define GPIO_PACNT_PA10MSK (0x00300000) 32*4882a593Smuzhiyun #define GPIO_PACNT_DREQ0 (0x00100000) 33*4882a593Smuzhiyun #define GPIO_PACNT_PA9MSK (0x000C0000) 34*4882a593Smuzhiyun #define GPIO_PACNT_DGNT0 (0x00040000) 35*4882a593Smuzhiyun #define GPIO_PACNT_PA8MSK (0x00030000) 36*4882a593Smuzhiyun #define GPIO_PACNT_FSC0 (0x00010000) 37*4882a593Smuzhiyun #define GPIO_PACNT_FSR0 (0x00010000) 38*4882a593Smuzhiyun #define GPIO_PACNT_PA7MSK (0x0000C000) 39*4882a593Smuzhiyun #define GPIO_PACNT_DOUT3 (0x00008000) 40*4882a593Smuzhiyun #define GPIO_PACNT_QSPI_CS3 (0x00004000) 41*4882a593Smuzhiyun #define GPIO_PACNT_PA6MSK (0x00003000) 42*4882a593Smuzhiyun #define GPIO_PACNT_USB_RXD (0x00001000) 43*4882a593Smuzhiyun #define GPIO_PACNT_PA5MSK (0x00000C00) 44*4882a593Smuzhiyun #define GPIO_PACNT_USB_TXEN (0x00000400) 45*4882a593Smuzhiyun #define GPIO_PACNT_PA4MSK (0x00000300) 46*4882a593Smuzhiyun #define GPIO_PACNT_USB_SUSP (0x00000100) 47*4882a593Smuzhiyun #define GPIO_PACNT_PA3MSK (0x000000C0) 48*4882a593Smuzhiyun #define GPIO_PACNT_USB_TN (0x00000040) 49*4882a593Smuzhiyun #define GPIO_PACNT_PA2MSK (0x00000030) 50*4882a593Smuzhiyun #define GPIO_PACNT_USB_RN (0x00000010) 51*4882a593Smuzhiyun #define GPIO_PACNT_PA1MSK (0x0000000C) 52*4882a593Smuzhiyun #define GPIO_PACNT_USB_RP (0x00000004) 53*4882a593Smuzhiyun #define GPIO_PACNT_PA0MSK (0x00000003) 54*4882a593Smuzhiyun #define GPIO_PACNT_USB_TP (0x00000001) 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define GPIO_PBCNT_PB15MSK (0xC0000000) 57*4882a593Smuzhiyun #define GPIO_PBCNT_E_MDC (0x40000000) 58*4882a593Smuzhiyun #define GPIO_PBCNT_PB14MSK (0x30000000) 59*4882a593Smuzhiyun #define GPIO_PBCNT_E_RXER (0x10000000) 60*4882a593Smuzhiyun #define GPIO_PBCNT_PB13MSK (0x0C000000) 61*4882a593Smuzhiyun #define GPIO_PBCNT_E_RXD1 (0x04000000) 62*4882a593Smuzhiyun #define GPIO_PBCNT_PB12MSK (0x03000000) 63*4882a593Smuzhiyun #define GPIO_PBCNT_E_RXD2 (0x01000000) 64*4882a593Smuzhiyun #define GPIO_PBCNT_PB11MSK (0x00C00000) 65*4882a593Smuzhiyun #define GPIO_PBCNT_E_RXD3 (0x00400000) 66*4882a593Smuzhiyun #define GPIO_PBCNT_PB10MSK (0x00300000) 67*4882a593Smuzhiyun #define GPIO_PBCNT_E_TXD1 (0x00100000) 68*4882a593Smuzhiyun #define GPIO_PBCNT_PB9MSK (0x000C0000) 69*4882a593Smuzhiyun #define GPIO_PBCNT_E_TXD2 (0x00040000) 70*4882a593Smuzhiyun #define GPIO_PBCNT_PB8MSK (0x00030000) 71*4882a593Smuzhiyun #define GPIO_PBCNT_E_TXD3 (0x00010000) 72*4882a593Smuzhiyun #define GPIO_PBCNT_PB7MSK (0x0000C000) 73*4882a593Smuzhiyun #define GPIO_PBCNT_TOUT0 (0x00004000) 74*4882a593Smuzhiyun #define GPIO_PBCNT_PB6MSK (0x00003000) 75*4882a593Smuzhiyun #define GPIO_PBCNT_TA (0x00001000) 76*4882a593Smuzhiyun #define GPIO_PBCNT_PB4MSK (0x00000300) 77*4882a593Smuzhiyun #define GPIO_PBCNT_URT0_CLK (0x00000100) 78*4882a593Smuzhiyun #define GPIO_PBCNT_PB3MSK (0x000000C0) 79*4882a593Smuzhiyun #define GPIO_PBCNT_URT0_RTS (0x00000040) 80*4882a593Smuzhiyun #define GPIO_PBCNT_PB2MSK (0x00000030) 81*4882a593Smuzhiyun #define GPIO_PBCNT_URT0_CTS (0x00000010) 82*4882a593Smuzhiyun #define GPIO_PBCNT_PB1MSK (0x0000000C) 83*4882a593Smuzhiyun #define GPIO_PBCNT_URT0_RXD (0x00000004) 84*4882a593Smuzhiyun #define GPIO_PBCNT_URT0_TIN2 (0x00000004) 85*4882a593Smuzhiyun #define GPIO_PBCNT_PB0MSK (0x00000003) 86*4882a593Smuzhiyun #define GPIO_PBCNT_URT0_TXD (0x00000001) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define GPIO_PDCNT_PD7MSK (0x0000C000) 89*4882a593Smuzhiyun #define GPIO_PDCNT_TIN1 (0x00008000) 90*4882a593Smuzhiyun #define GPIO_PDCNT_PWM_OUT2 (0x00004000) 91*4882a593Smuzhiyun #define GPIO_PDCNT_PD6MSK (0x00003000) 92*4882a593Smuzhiyun #define GPIO_PDCNT_TOUT1 (0x00002000) 93*4882a593Smuzhiyun #define GPIO_PDCNT_PWM_OUT1 (0x00001000) 94*4882a593Smuzhiyun #define GPIO_PDCNT_PD5MSK (0x00000C00) 95*4882a593Smuzhiyun #define GPIO_PDCNT_INT4 (0x00000C00) 96*4882a593Smuzhiyun #define GPIO_PDCNT_DIN3 (0x00000800) 97*4882a593Smuzhiyun #define GPIO_PDCNT_PD4MSK (0x00000300) 98*4882a593Smuzhiyun #define GPIO_PDCNT_URT1_TXD (0x00000200) 99*4882a593Smuzhiyun #define GPIO_PDCNT_DOUT0 (0x00000100) 100*4882a593Smuzhiyun #define GPIO_PDCNT_PD3MSK (0x000000C0) 101*4882a593Smuzhiyun #define GPIO_PDCNT_INT5 (0x000000C0) 102*4882a593Smuzhiyun #define GPIO_PDCNT_URT1_RTS (0x00000080) 103*4882a593Smuzhiyun #define GPIO_PDCNT_PD2MSK (0x00000030) 104*4882a593Smuzhiyun #define GPIO_PDCNT_QSPI_CS2 (0x00000030) 105*4882a593Smuzhiyun #define GPIO_PDCNT_URT1_CTS (0x00000020) 106*4882a593Smuzhiyun #define GPIO_PDCNT_PD1MSK (0x0000000C) 107*4882a593Smuzhiyun #define GPIO_PDCNT_URT1_RXD (0x00000008) 108*4882a593Smuzhiyun #define GPIO_PDCNT_URT1_TIN3 (0x00000008) 109*4882a593Smuzhiyun #define GPIO_PDCNT_DIN0 (0x00000004) 110*4882a593Smuzhiyun #define GPIO_PDCNT_PD0MSK (0x00000003) 111*4882a593Smuzhiyun #define GPIO_PDCNT_URT1_CLK (0x00000002) 112*4882a593Smuzhiyun #define GPIO_PDCNT_DCL0 (0x00000001) 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define INT_RSVD0 (0) 115*4882a593Smuzhiyun #define INT_INT1 (1) 116*4882a593Smuzhiyun #define INT_INT2 (2) 117*4882a593Smuzhiyun #define INT_INT3 (3) 118*4882a593Smuzhiyun #define INT_INT4 (4) 119*4882a593Smuzhiyun #define INT_TMR0 (5) 120*4882a593Smuzhiyun #define INT_TMR1 (6) 121*4882a593Smuzhiyun #define INT_TMR2 (7) 122*4882a593Smuzhiyun #define INT_TMR3 (8) 123*4882a593Smuzhiyun #define INT_UART1 (9) 124*4882a593Smuzhiyun #define INT_UART2 (10) 125*4882a593Smuzhiyun #define INT_PLIP (11) 126*4882a593Smuzhiyun #define INT_PLIA (12) 127*4882a593Smuzhiyun #define INT_USB0 (13) 128*4882a593Smuzhiyun #define INT_USB1 (14) 129*4882a593Smuzhiyun #define INT_USB2 (15) 130*4882a593Smuzhiyun #define INT_USB3 (16) 131*4882a593Smuzhiyun #define INT_USB4 (17) 132*4882a593Smuzhiyun #define INT_USB5 (18) 133*4882a593Smuzhiyun #define INT_USB6 (19) 134*4882a593Smuzhiyun #define INT_USB7 (20) 135*4882a593Smuzhiyun #define INT_DMA (21) 136*4882a593Smuzhiyun #define INT_ERX (22) 137*4882a593Smuzhiyun #define INT_ETX (23) 138*4882a593Smuzhiyun #define INT_ENTC (24) 139*4882a593Smuzhiyun #define INT_QSPI (25) 140*4882a593Smuzhiyun #define INT_INT5 (26) 141*4882a593Smuzhiyun #define INT_INT6 (27) 142*4882a593Smuzhiyun #define INT_SWTO (28) 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #define INT_ICR1_TMR0MASK (0x000F000) 145*4882a593Smuzhiyun #define INT_ICR1_TMR0PI (0x0008000) 146*4882a593Smuzhiyun #define INT_ICR1_TMR0IPL(x) (((x)&0x7)<<12) 147*4882a593Smuzhiyun #define INT_ICR1_TMR1MASK (0x0000F00) 148*4882a593Smuzhiyun #define INT_ICR1_TMR1PI (0x0000800) 149*4882a593Smuzhiyun #define INT_ICR1_TMR1IPL(x) (((x)&0x7)<<8) 150*4882a593Smuzhiyun #define INT_ICR1_TMR2MASK (0x00000F0) 151*4882a593Smuzhiyun #define INT_ICR1_TMR2PI (0x0000080) 152*4882a593Smuzhiyun #define INT_ICR1_TMR2IPL(x) (((x)&0x7)<<4) 153*4882a593Smuzhiyun #define INT_ICR1_TMR3MASK (0x000000F) 154*4882a593Smuzhiyun #define INT_ICR1_TMR3PI (0x0000008) 155*4882a593Smuzhiyun #define INT_ICR1_TMR3IPL(x) (((x)&0x7)) 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #define INT_ISR_INT31 (0x80000000) 158*4882a593Smuzhiyun #define INT_ISR_INT30 (0x40000000) 159*4882a593Smuzhiyun #define INT_ISR_INT29 (0x20000000) 160*4882a593Smuzhiyun #define INT_ISR_INT28 (0x10000000) 161*4882a593Smuzhiyun #define INT_ISR_INT27 (0x08000000) 162*4882a593Smuzhiyun #define INT_ISR_INT26 (0x04000000) 163*4882a593Smuzhiyun #define INT_ISR_INT25 (0x02000000) 164*4882a593Smuzhiyun #define INT_ISR_INT24 (0x01000000) 165*4882a593Smuzhiyun #define INT_ISR_INT23 (0x00800000) 166*4882a593Smuzhiyun #define INT_ISR_INT22 (0x00400000) 167*4882a593Smuzhiyun #define INT_ISR_INT21 (0x00200000) 168*4882a593Smuzhiyun #define INT_ISR_INT20 (0x00100000) 169*4882a593Smuzhiyun #define INT_ISR_INT19 (0x00080000) 170*4882a593Smuzhiyun #define INT_ISR_INT18 (0x00040000) 171*4882a593Smuzhiyun #define INT_ISR_INT17 (0x00020000) 172*4882a593Smuzhiyun #define INT_ISR_INT16 (0x00010000) 173*4882a593Smuzhiyun #define INT_ISR_INT15 (0x00008000) 174*4882a593Smuzhiyun #define INT_ISR_INT14 (0x00004000) 175*4882a593Smuzhiyun #define INT_ISR_INT13 (0x00002000) 176*4882a593Smuzhiyun #define INT_ISR_INT12 (0x00001000) 177*4882a593Smuzhiyun #define INT_ISR_INT11 (0x00000800) 178*4882a593Smuzhiyun #define INT_ISR_INT10 (0x00000400) 179*4882a593Smuzhiyun #define INT_ISR_INT9 (0x00000200) 180*4882a593Smuzhiyun #define INT_ISR_INT8 (0x00000100) 181*4882a593Smuzhiyun #define INT_ISR_INT7 (0x00000080) 182*4882a593Smuzhiyun #define INT_ISR_INT6 (0x00000040) 183*4882a593Smuzhiyun #define INT_ISR_INT5 (0x00000020) 184*4882a593Smuzhiyun #define INT_ISR_INT4 (0x00000010) 185*4882a593Smuzhiyun #define INT_ISR_INT3 (0x00000008) 186*4882a593Smuzhiyun #define INT_ISR_INT2 (0x00000004) 187*4882a593Smuzhiyun #define INT_ISR_INT1 (0x00000002) 188*4882a593Smuzhiyun #define INT_ISR_INT0 (0x00000001) 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun #endif /* mcf5272_h */ 191