Home
last modified time | relevance | path

Searched +full:0 +full:x01c20e00 (Results 1 – 12 of 12) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dallwinner,sun4i-a10-pwm.yaml90 reg = <0x01c20e00 0xc>;
101 reg = <0x0300a000 0x400>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun5i-a13.dtsi90 reg = <0x01c20e00 0xc>;
H A Dsun5i-gr8.dtsi60 reg = <0x01c20e00 0xc>;
67 #sound-dai-cells = <0>;
69 reg = <0x01c21000 0x400>;
80 #sound-dai-cells = <0>;
82 reg = <0x01c22400 0x400>;
H A Dsun5i-a10s.dtsi78 reg = <0x01c16000 0x1000>;
83 clock-names = "ahb", "mod", "pll-0", "pll-1";
92 #size-cells = <0>;
94 hdmi_in: port@0 {
95 reg = <0>;
110 reg = <0x01c20e00 0xc>;
124 pinctrl-0 = <&mmc1_pins>;
H A Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
167 #clock-cells = <0>;
174 #clock-cells = <0>;
200 size = <0x6000000>;
201 alloc-ranges = <0x40000000 0x10000000>;
215 reg = <0x01c00000 0x30>;
220 sram_a: sram@0 {
222 reg = <0x00000000 0xc000>;
[all …]
H A Dsun7i-a20.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
183 size = <0x6000000>;
184 alloc-ranges = <0x40000000 0x10000000>;
210 #clock-cells = <0>;
217 #clock-cells = <0>;
233 #clock-cells = <0>;
240 #clock-cells = <0>;
247 #clock-cells = <0>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dcpu_sun4i.h12 #define SUNXI_SRAM_A1_BASE 0x00000000
15 #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
16 #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
17 #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
18 #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
19 #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */
21 #define SUNXI_DE2_BASE 0x01000000
24 #define SUNXI_CPUCFG_BASE 0x01700000
27 #define SUNXI_SRAMC_BASE 0x01c00000
28 #define SUNXI_DRAMC_BASE 0x01c01000
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun5i-a10s.dtsi64 framebuffer@0 {
96 reg = <0x01c20060 0x8>;
98 clock-indices = <0>, <1>,
125 reg = <0x01c20068 0x4>;
127 clock-indices = <0>, <3>,
138 reg = <0x01c2006c 0x4>;
140 clock-indices = <0>, <1>,
154 reg = <0x01c0b000 0x1000>;
163 reg = <0x01c0b080 0x14>;
166 #size-cells = <0>;
[all …]
H A Dsun5i-a13.dtsi60 framebuffer@0 {
106 reg = <0x01c20060 0x8>;
108 clock-indices = <0>, <1>,
133 reg = <0x01c20068 0x4>;
135 clock-indices = <0>, <5>,
144 reg = <0x01c2006c 0x4>;
146 clock-indices = <0>, <1>,
158 reg = <0x01c20100 0x4>;
159 clocks = <&pll5 0>;
160 clock-indices = <0>,
[all …]
H A Dsun5i-gr8.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0>;
78 #clock-cells = <0>;
80 clock-frequency = <0>;
84 #clock-cells = <0>;
86 reg = <0x01c20050 0x4>;
93 #clock-cells = <0>;
100 osc32k: clk@0 {
101 #clock-cells = <0>;
[all …]
H A Dsun4i-a10.dtsi64 framebuffer@0 {
110 #size-cells = <0>;
111 cpu0: cpu@0 {
114 reg = <0x0>;
125 cooling-min-level = <0>;
163 reg = <0x40000000 0x80000000>;
178 #clock-cells = <0>;
180 clock-frequency = <0>;
184 #clock-cells = <0>;
186 reg = <0x01c20050 0x4>;
[all …]
H A Dsun7i-a20.dtsi66 framebuffer@0 {
100 #size-cells = <0>;
102 cpu0: cpu@0 {
105 reg = <0>;
119 cooling-min-level = <0>;
163 reg = <0x40000000 0x80000000>;
186 #clock-cells = <0>;
188 reg = <0x01c20050 0x4>;
194 #clock-cells = <0>;
202 osc32k: clk@0 {
[all …]