Lines Matching +full:0 +full:x01c20e00

60 		framebuffer@0 {
106 			reg = <0x01c20060 0x8>;
108 			clock-indices = <0>, <1>,
133 			reg = <0x01c20068 0x4>;
135 			clock-indices = <0>, <5>,
144 			reg = <0x01c2006c 0x4>;
146 			clock-indices = <0>, <1>,
158 			reg = <0x01c20100 0x4>;
159 			clocks = <&pll5 0>;
160 			clock-indices = <0>,
175 			#clock-cells = <0>;
176 			#reset-cells = <0>;
178 			reg = <0x01c20104 0x4>;
184 			#clock-cells = <0>;
185 			#reset-cells = <0>;
187 			reg = <0x01c2010c 0x4>;
193 			#clock-cells = <0>;
196 			reg = <0x01c20118 0x4>;
202 			#clock-cells = <0>;
204 			reg = <0x01c2012c 0x4>;
218 			reg = <0x01c0c000 0x1000>;
233 				#size-cells = <0>;
235 				tcon0_in: port@0 {
237 					#size-cells = <0>;
238 					reg = <0>;
240 					tcon0_in_be0: endpoint@0 {
241 						reg = <0>;
248 					#size-cells = <0>;
256 			reg = <0x01c20e00 0xc>;
264 			reg = <0x01e00000 0x20000>;
275 				#size-cells = <0>;
279 					#size-cells = <0>;
282 					fe0_out_be0: endpoint@0 {
283 						reg = <0>;
292 			reg = <0x01e60000 0x10000>;
305 				#size-cells = <0>;
307 				be0_in: port@0 {
309 					#size-cells = <0>;
310 					reg = <0>;
312 					be0_in_fe0: endpoint@0 {
313 						reg = <0>;
320 					#size-cells = <0>;
323 					be0_out_tcon0: endpoint@0 {
324 						reg = <0>;
345 	cooling-min-level = <0>;
352 	lcd_rgb666_pins: lcd_rgb666@0 {
362 	uart1_pins_a: uart1@0 {