| fbafd477 | 08-Jan-2025 |
Shawn Lin <shawn.lin@rock-chips.com> |
driver: pci: rockchip: Add rockchip_pcie_err_dump()
Add rockchip_pcie_err_dump() to vendor_aer_dump callback.
=> pci aer 00.00.0
AER Capability found at offset 0x100
UESta: DLP-- SDES-- TLP-- FCP-
driver: pci: rockchip: Add rockchip_pcie_err_dump()
Add rockchip_pcie_err_dump() to vendor_aer_dump callback.
=> pci aer 00.00.0
AER Capability found at offset 0x100
UESta: DLP-- SDES-- TLP-- FCP-- CmpltTO-- CmpltAbrt-- UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UEMsk: DLP-- SDES-- TLP-- FCP-- CmpltTO-+ CmpltAbrt-+ UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr-- BadTLP-- BadDLLP-- Rollover-- Timeout-- NonFatalErr--
CEMsk: RxErr-- BadTLP-+ BadDLLP-- Rollover-- Timeout-- NonFatalErr-+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Common event signal status: 0xL0
EBUF Overflow: 0x0
EBUF Under-run: 0x0
Decode Error: 0x0
Running Disparity Error: 0x0
SKP OS Parity Error: 0x0
SYNC Header Error: 0x0
CTL SKP OS Parity Error: 0x0
Detect EI Infer: 0x0
Receiver Error: 0x0
Rx Recovery Request: 0x0
N_FTS Timeout: 0x0
Framing Error: 0x0
Deskew Error: 0x0
BAD TLP: 0x0
LCRC Error: 0x0
BAD DLLP: 0x0
Replay Number Rollover: 0x0
Replay Timeout: 0x0
Rx Nak DLLP: 0x0
Tx Nak DLLP: 0x0
Retry TLP: 0x0
FC Timeout: 0x0
Poisoned TLP: 0x0
ECRC Error: 0x0
Unsupported Request: 0x0
Completer Abort: 0x0
Completion Timeout: 0x0
Then we plug out the PCIe card, we get:
=> pci aer 00.00.0
AER Capability found at offset 0x100
UESta: DLP-- SDES-- TLP-- FCP-- CmpltTO-- CmpltAbrt-- UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UEMsk: DLP-- SDES-- TLP-- FCP-- CmpltTO-+ CmpltAbrt-+ UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr-- BadTLP-- BadDLLP-- Rollover-- Timeout-- NonFatalErr--
CEMsk: RxErr-- BadTLP-+ BadDLLP-- Rollover-- Timeout-- NonFatalErr-+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Common event signal status: Invalid
EBUF Overflow: 0x0
EBUF Under-run: 0x0
Decode Error: 0xf
Running Disparity Error: 0xf
SKP OS Parity Error: 0x0
SYNC Header Error: 0x0
CTL SKP OS Parity Error: 0x3
Detect EI Infer: 0x1
Receiver Error: 0xff
Rx Recovery Request: 0x0
N_FTS Timeout: 0x0
Framing Error: 0x0
Deskew Error: 0x1
BAD TLP: 0x0
LCRC Error: 0x0
BAD DLLP: 0x0
Replay Number Rollover: 0x0
Replay Timeout: 0x0
Rx Nak DLLP: 0x0
Tx Nak DLLP: 0x0
Retry TLP: 0x0
FC Timeout: 0x0
Poisoned TLP: 0x0
ECRC Error: 0x0
Unsupported Request: 0x0
Completer Abort: 0x0
Completion Timeout: 0x0
Change-Id: I7c19464b36afa1a94d239317108e2b951697cc1d
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
show more ...
|
| 10dd02ab | 08-Jan-2025 |
Shawn Lin <shawn.lin@rock-chips.com> |
PCI: add FLR support
Functional Level Reset is used for device drivers to reset their
internal functions if recovery is needed.
=> pci flr 01.00.0
FLR completed and state restored for device 01:00.
PCI: add FLR support
Functional Level Reset is used for device drivers to reset their
internal functions if recovery is needed.
=> pci flr 01.00.0
FLR completed and state restored for device 01:00.0
Change-Id: Ifc6eb8e6f980d1b450e14b28fb8248e45f586316
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
show more ...
|
| 21c9fbd8 | 07-Jan-2025 |
Shawn Lin <shawn.lin@rock-chips.com> |
PCI: add AER dump support
=> pci e
unable to get syscon device for rockchip,pipe-grf
snps pcie3phy FW update! size 8192
pcie@fe280000: PCIe Linking... LTSSM is 0x0
pcie@fe280000: PCIe Link up, LTSSM
PCI: add AER dump support
=> pci e
unable to get syscon device for rockchip,pipe-grf
snps pcie3phy FW update! size 8192
pcie@fe280000: PCIe Linking... LTSSM is 0x0
pcie@fe280000: PCIe Link up, LTSSM is 0x30011
pcie@fe280000: PCIE-0: Link up (Gen1-x2, Bus0)
=> nvme scan
=> pci aer 01.00.0
AER Capability found at offset 0x40
UESta: DLP-- SDES-- TLP-- FCP-- CmpltTO-- CmpltAbrt-- UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UEMsk: DLP-- SDES-- TLP-- FCP-- CmpltTO-- CmpltAbrt-- UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UESvrt: DLP+ SDES- TLP+ FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr-- BadTLP-- BadDLLP-- Rollover-- Timeout-- NonFatalErr--
CEMsk: RxErr-- BadTLP-- BadDLLP-- Rollover-- Timeout-- NonFatalErr--
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Change-Id: Ie861fc0f1e9b70468cb27f40fa00458339cd2b4e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
show more ...
|
| 0f141368 | 15-Oct-2018 |
Bin Meng <bmeng.cn@gmail.com> |
UPSTREAM: dm: pci: Add APIs to find next capability and extended capability
This introduces two new APIs dm_pci_find_next_capability() and
dm_pci_find_next_ext_capability() to get PCI capability add
UPSTREAM: dm: pci: Add APIs to find next capability and extended capability
This introduces two new APIs dm_pci_find_next_capability() and
dm_pci_find_next_ext_capability() to get PCI capability address
and PCI express extended capability address for a given PCI device
starting from a given offset.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[cherry-picked from a8c5f8d3d02807f72d048950d72b0c73d55bd7fb]
Change-Id: Idf9867b415b066984757bf021f4e441fe3c5d787
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
show more ...
|
| fdb7e29c | 28-Aug-2024 |
Shawn Lin <shawn.lin@rock-chips.com> |
dm: pci: Fix PCI 64bit address support
Don't overwrite memory between 32bit and 64bit. And properly
map them and let host drivers to get proper regions.
Change-Id: I4176f4536aef22f5fae87de732194734
dm: pci: Fix PCI 64bit address support
Don't overwrite memory between 32bit and 64bit. And properly
map them and let host drivers to get proper regions.
Change-Id: I4176f4536aef22f5fae87de7321947348aa4f308
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
show more ...
|