1== Introduction == 2 3Hardware modules that control pin multiplexing or configuration parameters 4such as pull-up/down, tri-state, drive-strength etc are designated as pin 5controllers. Each pin controller must be represented as a node in device tree, 6just like any other hardware module. 7 8Hardware modules whose signals are affected by pin configuration are 9designated client devices. Again, each client device must be represented as a 10node in device tree, just like any other hardware module. 11 12For a client device to operate correctly, certain pin controllers must 13set up certain specific pin configurations. Some client devices need a 14single static pin configuration, e.g. set up during initialization. Others 15need to reconfigure pins at run-time, for example to tri-state pins when the 16device is inactive. Hence, each client device can define a set of named 17states. The number and names of those states is defined by the client device's 18own binding. 19 20The common pinctrl bindings defined in this file provide an infrastructure 21for client device device tree nodes to map those state names to the pin 22configuration used by those states. 23 24Note that pin controllers themselves may also be client devices of themselves. 25For example, a pin controller may set up its own "active" state when the 26driver loads. This would allow representing a board's static pin configuration 27in a single place, rather than splitting it across multiple client device 28nodes. The decision to do this or not somewhat rests with the author of 29individual board device tree files, and any requirements imposed by the 30bindings for the individual client devices in use by that board, i.e. whether 31they require certain specific named states for dynamic pin configuration. 32 33== Pinctrl client devices == 34 35For each client device individually, every pin state is assigned an integer 36ID. These numbers start at 0, and are contiguous. For each state ID, a unique 37property exists to define the pin configuration. Each state may also be 38assigned a name. When names are used, another property exists to map from 39those names to the integer IDs. 40 41Each client device's own binding determines the set of states that must be 42defined in its device tree node, and whether to define the set of state 43IDs that must be provided, or whether to define the set of state names that 44must be provided. 45 46Required properties: 47pinctrl-0: List of phandles, each pointing at a pin configuration 48 node. These referenced pin configuration nodes must be child 49 nodes of the pin controller that they configure. Multiple 50 entries may exist in this list so that multiple pin 51 controllers may be configured, or so that a state may be built 52 from multiple nodes for a single pin controller, each 53 contributing part of the overall configuration. See the next 54 section of this document for details of the format of these 55 pin configuration nodes. 56 57 In some cases, it may be useful to define a state, but for it 58 to be empty. This may be required when a common IP block is 59 used in an SoC either without a pin controller, or where the 60 pin controller does not affect the HW module in question. If 61 the binding for that IP block requires certain pin states to 62 exist, they must still be defined, but may be left empty. 63 64Optional properties: 65pinctrl-1: List of phandles, each pointing at a pin configuration 66 node within a pin controller. 67... 68pinctrl-n: List of phandles, each pointing at a pin configuration 69 node within a pin controller. 70pinctrl-names: The list of names to assign states. List entry 0 defines the 71 name for integer state ID 0, list entry 1 for state ID 1, and 72 so on. 73 74For example: 75 76 /* For a client device requiring named states */ 77 device { 78 pinctrl-names = "active", "idle"; 79 pinctrl-0 = <&state_0_node_a>; 80 pinctrl-1 = <&state_1_node_a &state_1_node_b>; 81 }; 82 83 /* For the same device if using state IDs */ 84 device { 85 pinctrl-0 = <&state_0_node_a>; 86 pinctrl-1 = <&state_1_node_a &state_1_node_b>; 87 }; 88 89 /* 90 * For an IP block whose binding supports pin configuration, 91 * but in use on an SoC that doesn't have any pin control hardware 92 */ 93 device { 94 pinctrl-names = "active", "idle"; 95 pinctrl-0 = <>; 96 pinctrl-1 = <>; 97 }; 98 99== Pin controller devices == 100 101Pin controller devices should contain the pin configuration nodes that client 102devices reference. 103 104For example: 105 106 pincontroller { 107 ... /* Standard DT properties for the device itself elided */ 108 109 state_0_node_a { 110 ... 111 }; 112 state_1_node_a { 113 ... 114 }; 115 state_1_node_b { 116 ... 117 }; 118 } 119 120The contents of each of those pin configuration child nodes is defined 121entirely by the binding for the individual pin controller device. There 122exists no common standard for this content. The pinctrl framework only 123provides generic helper bindings that the pin controller driver can use. 124 125The pin configuration nodes need not be direct children of the pin controller 126device; they may be grandchildren, for example. Whether this is legal, and 127whether there is any interaction between the child and intermediate parent 128nodes, is again defined entirely by the binding for the individual pin 129controller device. 130 131== Generic pin multiplexing node content == 132 133pin multiplexing nodes: 134 135function - the mux function to select 136groups - the list of groups to select with this function 137 (either this or "pins" must be specified) 138pins - the list of pins to select with this function (either 139 this or "groups" must be specified) 140 141Example: 142 143state_0_node_a { 144 uart0 { 145 function = "uart0"; 146 groups = "u0rxtx", "u0rtscts"; 147 }; 148}; 149state_1_node_a { 150 spi0 { 151 function = "spi0"; 152 groups = "spi0pins"; 153 }; 154}; 155state_2_node_a { 156 function = "i2c0"; 157 pins = "mfio29", "mfio30"; 158}; 159 160For hardware where pin multiplexing configurations have to be specified for 161each single pin the number of required sub-nodes containing "pin" and 162"function" properties can quickly escalate and become hard to write and 163maintain. 164 165For cases like this, the pin controller driver may use the pinmux helper 166property, where the pin identifier is provided with mux configuration settings 167in a pinmux group. A pinmux group consists of the pin identifier and mux 168settings represented as a single integer or an array of integers. 169 170The pinmux property accepts an array of pinmux groups, each of them describing 171a single pin multiplexing configuration. 172 173pincontroller { 174 state_0_node_a { 175 pinmux = <PINMUX_GROUP>, <PINMUX_GROUP>, ...; 176 }; 177}; 178 179Each individual pin controller driver bindings documentation shall specify 180how pin IDs and pin multiplexing configuration are defined and assembled 181together in a pinmux group. 182 183== Generic pin configuration node content == 184 185Many data items that are represented in a pin configuration node are common 186and generic. Pin control bindings should use the properties defined below 187where they are applicable; not all of these properties are relevant or useful 188for all hardware or binding structures. Each individual binding document 189should state which of these generic properties, if any, are used, and the 190structure of the DT nodes that contain these properties. 191 192Supported generic properties are: 193 194pins - the list of pins that properties in the node 195 apply to (either this, "group" or "pinmux" has to be 196 specified) 197group - the group to apply the properties to, if the driver 198 supports configuration of whole groups rather than 199 individual pins (either this, "pins" or "pinmux" has 200 to be specified) 201pinmux - the list of numeric pin ids and their mux settings 202 that properties in the node apply to (either this, 203 "pins" or "groups" have to be specified) 204bias-disable - disable any pin bias 205bias-high-impedance - high impedance mode ("third-state", "floating") 206bias-bus-hold - latch weakly 207bias-pull-up - pull up the pin 208bias-pull-down - pull down the pin 209bias-pull-pin-default - use pin-default pull state 210drive-push-pull - drive actively high and low 211drive-open-drain - drive with open drain 212drive-open-source - drive with open source 213drive-strength - sink or source at most X mA 214drive-strength-microamp - sink or source at most X uA 215input-enable - enable input on pin (no effect on output, such as 216 enabling an input buffer) 217input-disable - disable input on pin (no effect on output, such as 218 disabling an input buffer) 219input-schmitt-enable - enable schmitt-trigger mode 220input-schmitt-disable - disable schmitt-trigger mode 221input-debounce - debounce mode with debound time X 222power-source - select between different power supplies 223low-power-enable - enable low power mode 224low-power-disable - disable low power mode 225output-disable - disable output on a pin (such as disable an output 226 buffer) 227output-enable - enable output on a pin without actively driving it 228 (such as enabling an output buffer) 229output-low - set the pin to output mode with low level 230output-high - set the pin to output mode with high level 231sleep-hardware-state - indicate this is sleep related state which will be programmed 232 into the registers for the sleep state. 233slew-rate - set the slew rate 234skew-delay - this affects the expected clock skew on input pins 235 and the delay before latching a value to an output 236 pin. Typically indicates how many double-inverters are 237 used to delay the signal. 238 239For example: 240 241state_0_node_a { 242 cts_rxd { 243 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ 244 bias-pull-up; 245 }; 246}; 247state_1_node_a { 248 rts_txd { 249 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */ 250 output-high; 251 }; 252}; 253state_2_node_a { 254 foo { 255 group = "foo-group"; 256 bias-pull-up; 257 }; 258}; 259state_3_node_a { 260 mux { 261 pinmux = <GPIOx_PINm_MUXn>, <GPIOx_PINj_MUXk)>; 262 input-enable; 263 }; 264}; 265 266Some of the generic properties take arguments. For those that do, the 267arguments are described below. 268 269- pins takes a list of pin names or IDs as a required argument. The specific 270 binding for the hardware defines: 271 - Whether the entries are integers or strings, and their meaning. 272 273- pinmux takes a list of pin IDs and mux settings as required argument. The 274 specific bindings for the hardware defines: 275 - How pin IDs and mux settings are defined and assembled together in a single 276 integer or an array of integers. 277 278- bias-pull-up, -down and -pin-default take as optional argument on hardware 279 supporting it the pull strength in Ohm. bias-disable will disable the pull. 280 281- drive-strength takes as argument the target strength in mA. 282 283- drive-strength-microamp takes as argument the target strength in uA. 284 285- input-debounce takes the debounce time in usec as argument 286 or 0 to disable debouncing 287 288More in-depth documentation on these parameters can be found in 289<include/linux/pinctrl/pinconf-generic.h> 290