1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2020 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3568_COMMON_H 8 #define __CONFIG_RK3568_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00040000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 #ifdef CONFIG_SPL_LOAD_FIT_ADDRESS 19 #undef CONFIG_SPL_LOAD_FIT_ADDRESS 20 #endif 21 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000 22 23 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 24 #define CONFIG_SYS_CBSIZE 1024 25 #define CONFIG_SKIP_LOWLEVEL_INIT 26 27 #ifdef CONFIG_SUPPORT_USBPLUG 28 #define CONFIG_SYS_TEXT_BASE 0x00000000 29 #else 30 #define CONFIG_SYS_TEXT_BASE 0x00a00000 31 #endif 32 33 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 34 #define CONFIG_SYS_LOAD_ADDR 0x00c00800 35 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 36 #define COUNTER_FREQUENCY 24000000 37 38 #define GICD_BASE 0xfd400000 39 #define GICR_BASE 0xfd460000 40 #define GICC_BASE 0xfd800000 41 42 /* secure otp */ 43 #define OTP_UBOOT_ROLLBACK_OFFSET 0xe0 44 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 45 #define OTP_ALL_ONES_NUM_BITS 32 46 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x80 47 #define OTP_SECURE_BOOT_ENABLE_SIZE 2 48 #define OTP_RSA_HASH_ADDR 0x90 49 #define OTP_RSA_HASH_SIZE 32 50 51 /* MMC/SD IP block */ 52 #define CONFIG_BOUNCE_BUFFER 53 #ifdef CONFIG_AHCI 54 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 55 #define CONFIG_SYS_SCSI_MAX_LUN 1 56 /*#define CONFIG_SCSI_AHCI_PLAT */ 57 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 58 CONFIG_SYS_SCSI_MAX_LUN) 59 #endif 60 /* Nand */ 61 #define CONFIG_SYS_MAX_NAND_DEVICE 1 62 #define CONFIG_SYS_NAND_ONFI_DETECTION 63 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 64 #define CONFIG_SYS_NAND_PAGE_COUNT 64 65 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 66 67 #define CONFIG_SYS_SDRAM_BASE 0 68 #define SDRAM_MAX_SIZE 0xf0000000 69 #define CONFIG_PREBOOT 70 71 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 72 73 #ifndef CONFIG_SPL_BUILD 74 /* usb mass storage */ 75 #define CONFIG_USB_FUNCTION_MASS_STORAGE 76 #define CONFIG_ROCKUSB_G_DNL_PID 0x350a 77 78 #define ENV_MEM_LAYOUT_SETTINGS \ 79 "scriptaddr=0x00c00000\0" \ 80 "pxefile_addr_r=0x00e00000\0" \ 81 "fdt_addr_r=0x08300000\0" \ 82 "kernel_addr_r=0x00280000\0" \ 83 "kernel_addr_c=0x04080000\0" \ 84 "ramdisk_addr_r=0x0a200000\0" 85 86 #include <config_distro_bootcmd.h> 87 88 #define CONFIG_EXTRA_ENV_SETTINGS \ 89 ENV_MEM_LAYOUT_SETTINGS \ 90 "partitions=" PARTS_RKIMG \ 91 ROCKCHIP_DEVICE_SETTINGS \ 92 RKIMG_DET_BOOTDEV \ 93 BOOTENV 94 #endif 95 96 /* rockchip ohci host driver */ 97 #define CONFIG_USB_OHCI_NEW 98 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 99 100 #define CONFIG_LIB_HW_RAND 101 102 #endif 103