Merge changes from topic "mbedtls-config-cleanup" into integration

* changes:
chore(qemu): remove duplicate define
chore(imx): remove duplicate define
chore(arm): remove duplicate defines
ch

Merge changes from topic "mbedtls-config-cleanup" into integration

* changes:
chore(qemu): remove duplicate define
chore(imx): remove duplicate define
chore(arm): remove duplicate defines
chore(mbedtls): remove hash configs

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chore(qemu): remove duplicate define

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: Id18abe80ab56fd51a9c2c1206b22d87f1e3871eb

chore(imx): remove duplicate define

Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
Change-Id: If55d4e2777ca2cdcf55da3b2a60d99f694a2c94d

chore(arm): remove duplicate defines

Change-Id: I9eea1610660bfa92f7781deab60e29eae11c4ba6
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

chore(mbedtls): remove hash configs

After the upgrade to mbedtls 3.6.0, some of these configuation limitations
are no longer present.

Size chages:
build config | executable | Delta
-------------|--

chore(mbedtls): remove hash configs

After the upgrade to mbedtls 3.6.0, some of these configuation limitations
are no longer present.

Size chages:
build config | executable | Delta
-------------|------------|-------
tbb ecdsa | bl1 | -176
-------------|------------|-------
tbb rsa | bl1 | -192
| bl2 | -4096
-------------|------------|-------
drtm | romlib | -576
-------------|------------|-------
spm | romlib | -576
-------------|------------|-------
mb384 | romlib | -1016

Change-Id: I019bc59adc93cf95f6f28ace9579e7bf1e785b62
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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fix(spmd): remove spmd_handle_spmc_message

The function `spmd_handle_spmc_message` was added into SPMD for
potential cases of SPMC sending a message (through SMC conduit)
to the SPMD. There is no lo

fix(spmd): remove spmd_handle_spmc_message

The function `spmd_handle_spmc_message` was added into SPMD for
potential cases of SPMC sending a message (through SMC conduit)
to the SPMD. There is no longer a use case for this scenario.

Instead, if such a message is received by SPMD, return FFA_ERROR.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I74eda4cc0edf99c83a96d10981cf6d9e727207f8

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Merge "fix(stm32mp2): remove mapping of BL2 DT area" into integration

fix(stm32mp2): remove mapping of BL2 DT area

To prevent from coding issues that could overwrite DT area, we were
mapping this area as read-only on STM32MP1. But on STM32MP2, we need
this area to put

fix(stm32mp2): remove mapping of BL2 DT area

To prevent from coding issues that could overwrite DT area, we were
mapping this area as read-only on STM32MP1. But on STM32MP2, we need
this area to put BL31 binary. We were then using dynamic mapping. But
the area is included in the whole SYSRAM memory mapping. This is not
allowed with dynamic mapping. As no other code is running at this step,
and we know what code is running in BL2, just remove this extra
read-only protection for STM32MP2. A message is added after the post
load process of FW-CONFIG file, as BL2 DT area will be overwritten
after that.
And remove the now useless macros DTB_BASE & DTB_LIMIT.
This corrects Coverity issue: CID 443168.

Change-Id: Ic01d6a443ecf7721380ef39dc570e2d1627008d0
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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Merge "fix(fdt): reserved memory: detect existing region" into integration

Merge changes from topic "mb/misc-fixes" into integration

* changes:
docs: fix typos in cot binding
fix(drtm): return proper values for DRTM get and set error SMCs
fix(tools): update the fipto

Merge changes from topic "mb/misc-fixes" into integration

* changes:
docs: fix typos in cot binding
fix(drtm): return proper values for DRTM get and set error SMCs
fix(tools): update the fiptool and certtool to fix POSIX build

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Merge "feat(build): add ctags recipes for indexing assembly files" into integration

fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass

fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass by reference in function.

Change-Id: I45ebaeacc932a11bbfd4b7d9b9c43b4ee8ee7df2
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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Merge "fix(intel): update memcpy to memcpy_s" into integration

Merge "feat(rdv3): set CTX_INCLUDE_SVE_REGS build flag for RD-V3 variants" into integration

fix(fdt): reserved memory: detect existing region

When fdt_add_reserved_memory() is called to add a memory region, we
unconditionally add a node for that region. However there might be an
existing r

fix(fdt): reserved memory: detect existing region

When fdt_add_reserved_memory() is called to add a memory region, we
unconditionally add a node for that region. However there might be an
existing region node in the DT already, or there might be an overlapping
region. The Linux kernel will complain in those cases.

Cover the simple case of the region already existing in the DT, as this
is what we actually see on the Allwinner H616: The mainline DT contains
a node reserving the memory for TF-A, in case the DT changed by TF-A
itself is not given to the kernel. Our code always adds a region, making
the kernel complain - albeit without further consequences.

Covering all cases of overlapping regions would blow up the generic DT
code too much, so just add a simple check for an existing region
completely containing the to-be-added region, simply bailing out in this
case.

This prevents the kernel warning for the Allwinner H616.

This code requires a function from fdt_wrappers.c, so we have to include
that file for platforms that use the fdt_add_reserved_memory() function
(rpi4 and versal2).

Change-Id: I98404889163316addbb42130d7177f1a21c8be06
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(rdv3): set CTX_INCLUDE_SVE_REGS build flag for RD-V3 variants

Commit 4242262(feat(simd):add sve state to simd ctxt struct)
introduced the CTX_INCLUDE_SVE_REGS build flag that needs to be set
if

feat(rdv3): set CTX_INCLUDE_SVE_REGS build flag for RD-V3 variants

Commit 4242262(feat(simd):add sve state to simd ctxt struct)
introduced the CTX_INCLUDE_SVE_REGS build flag that needs to be set
if SVE is enabled for more than one world, which is the case for
RD-V3. This build flag enables SVE registers to be included when
saving and restoring the CPU context.

Change-Id: Ic491939061e42e8c87a805ded99e271308f90352
Signed-off-by: Gautham Ravichandran <gautham.ravichandran@arm.com>

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docs: fix typos in cot binding

Fixed a few typos in the cot binding document.

Change-Id: I043187b3f4b516db944e82569307834df2c3c72a
Signed-off-by: sah01 <sahil@arm.com>
Signed-off-by: Manish V Badar

docs: fix typos in cot binding

Fixed a few typos in the cot binding document.

Change-Id: I043187b3f4b516db944e82569307834df2c3c72a
Signed-off-by: sah01 <sahil@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(drtm): return proper values for DRTM get and set error SMCs

The DRTM get and set error previously returned SMC_UNK when these
SMCs were issued. This has been corrected to return an appropriate
e

fix(drtm): return proper values for DRTM get and set error SMCs

The DRTM get and set error previously returned SMC_UNK when these
SMCs were issued. This has been corrected to return an appropriate
error code on failure, and success otherwise.
Also,align the error code values with the specification.

Change-Id: I8f11f94f1ab097245003dbde97365fa54e0097ba
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(tools): update the fiptool and certtool to fix POSIX build

This patch fixes below issue raised:

https://github.com/TrustedFirmware-A/trusted-firmware-a/issues/8
https://github.com/TrustedFirmwa

fix(tools): update the fiptool and certtool to fix POSIX build

This patch fixes below issue raised:

https://github.com/TrustedFirmware-A/trusted-firmware-a/issues/8
https://github.com/TrustedFirmware-A/trusted-firmware-a/issues/9
https://github.com/TrustedFirmware-A/trusted-firmware-a/issues/10

Change-Id: I521bf7410535ffe49198789ba183cc401b3b88a0
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(build): add ctags recipes for indexing assembly files

The "ctags" code referencing tool creates an index for all identifiers
used in a project. The builtin recipes handle our C files just fine,

feat(build): add ctags recipes for indexing assembly files

The "ctags" code referencing tool creates an index for all identifiers
used in a project. The builtin recipes handle our C files just fine, but
due to a lack of a standard for marking functions and variables in assembly
files, will fail including the assembly code.

Provide the regular expressions that match the function tags used in our
assembly files, alongside the syntax we use for macros and "equ"
defines.

This will include assembly code in a ctags cross reference session.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I47d531bfc6fafe9aeef9f4b66b7fdc4490b2e161

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Merge changes from topic "us_tc4_rebase_v2" into integration

* changes:
feat(tc): bind DPU SMMU on TC4
feat(tc): bind GPU SMMU on TC4
feat(tc): update DT for Drage GPU
feat(tc): enable SME a

Merge changes from topic "us_tc4_rebase_v2" into integration

* changes:
feat(tc): bind DPU SMMU on TC4
feat(tc): bind GPU SMMU on TC4
feat(tc): update DT for Drage GPU
feat(tc): enable SME and SME2 options for TC4
feat(tc): add new TC4 RoS definitions
feat(tc): add system generic timer register definition for TC4
feat(tc): allow TARGET_VERSION=4
feat(tc): add MHUv3 register addresses for TC4
feat(tc): add device tree binding for TC4

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feat(tc): bind DPU SMMU on TC4

TC4 adds a new SMMU-700 specifically for the DPU (in the RoS). This is
used as the DPU SMMU instead of the existing SMMU used for both the GPU
and DPU. Update the devi

feat(tc): bind DPU SMMU on TC4

TC4 adds a new SMMU-700 specifically for the DPU (in the RoS). This is
used as the DPU SMMU instead of the existing SMMU used for both the GPU
and DPU. Update the devicetree to reflect this.

Note that the streamID values have also changes for this new SMMU. This
is because TC4 also updates the new SMMU to use a different streamID for
each DPU port - these must all be added to the device tree.

Change-Id: If2ce9749e40937fd1291346d071b691cfb662f2e
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): bind GPU SMMU on TC4

A SMMU-700 is used on TC4 for only GPU, on both FVP and FPGA. Add DT
binding for it.

Change-Id: I1b840676fd02c3961d4efdd769f12a4b01d459fb
Signed-off-by: Leo Yan <leo.

feat(tc): bind GPU SMMU on TC4

A SMMU-700 is used on TC4 for only GPU, on both FVP and FPGA. Add DT
binding for it.

Change-Id: I1b840676fd02c3961d4efdd769f12a4b01d459fb
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): update DT for Drage GPU

This patch incorporates the changes for Drage GPU to uses new access
window interface "IRQ_AW". As the interrupt properties are different
between TC4 and other TC p

feat(tc): update DT for Drage GPU

This patch incorporates the changes for Drage GPU to uses new access
window interface "IRQ_AW". As the interrupt properties are different
between TC4 and other TC platforms, this patch appends the interrupt
properties in platform specific DT binding file.

Change-Id: I2ca505846f03ce64b8e5f02fd202962dbfe39f25
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): enable SME and SME2 options for TC4

Set the Make flags for TF-A to be able to enable SME and SME2 features.
Note that we enable these architectural features for both the secure and
non-sec

feat(tc): enable SME and SME2 options for TC4

Set the Make flags for TF-A to be able to enable SME and SME2 features.
Note that we enable these architectural features for both the secure and
non-secure worlds, which is required on TC4.

In the case of the non-secure world, we specify a value of 2 for the
flag which specifies that TF-A should check the feature register to
ensure that the feature is present before enabling it. This allows these
flags to be compatible with all platforms and stops TF-A doing anything
different if it does not detect that the feature is present.

Change-Id: I51f8c7e3eb1cf06767f4b155c93269e1f129f730
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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