| 7d111d99 | 08-Apr-2021 |
David Horstmann <david.horstmann@arm.com> |
refactor(plat/arm): store UUID as a string, rather than ints
NOTE: Breaking change to the way UUIDs are stored in the DT
Currently, UUIDs are stored in the device tree as
sequences of 4 integers. T
refactor(plat/arm): store UUID as a string, rather than ints
NOTE: Breaking change to the way UUIDs are stored in the DT
Currently, UUIDs are stored in the device tree as
sequences of 4 integers. There is a mismatch in endianness
between the way UUIDs are represented in memory and the way
they are parsed from the device tree. As a result, we must either
store the UUIDs in little-endian format in the DT (which means
that they do not match up with their string representations)
or perform endianness conversion after parsing them.
Currently, TF-A chooses the second option, with unwieldy
endianness-conversion taking place after reading a UUID.
To fix this problem, and to make it convenient to copy and
paste UUIDs from other tools, change to store UUIDs in string
format, using a new wrapper function to parse them from the
device tree.
Change-Id: I38bd63c907be14e412f03ef0aab9dcabfba0eaa0
Signed-off-by: David Horstmann <david.horstmann@arm.com>
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| 49e9ac28 | 22-Apr-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(plat/arm): replace FIP base and size macro with a generic name
Replaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with a
generic name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IM
refactor(plat/arm): replace FIP base and size macro with a generic name
Replaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with a
generic name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IMAGE_MAX_SIZE
so that these macros can be reused in the subsequent GPT based support
changes.
Change-Id: I88fdbd53e1966578af4f1e8e9d5fef42c27b1173
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| f2800a47 | 06-Apr-2021 |
Pali Rohár <pali@kernel.org> |
plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC
This new compile option is only for Armada 3720 Development Board. When
it is set to 1 then TF-A will setup PM wake up src c
plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC
This new compile option is only for Armada 3720 Development Board. When
it is set to 1 then TF-A will setup PM wake up src configuration.
By default this new option is disabled as it is board specific and no
other A37xx board has PM wake up src configuration.
Currently neither upstream U-Boot nor upstream Linux kernel has wakeup
support for A37xx platforms, so having it disabled does not cause any
issue.
Prior this commit PM wake up src configuration specific for Armada 3720
Development Board was enabled for every A37xx board. After this change it
is enabled only when compiling with build flag A3720_DB_PM_WAKEUP_SRC=1
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I09fea1172c532df639acb3bb009cfde32d3c5766
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| d3555651 | 27-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "rd_plat_variants" into integration
* changes:
feat(board/rdn2): add support for variant 1 of rd-n2 platform
feat(plat/sgi): introduce platform variant build option |
| fe5d5bbf | 20-Mar-2021 |
Aditya Angadi <aditya.angadi@arm.com> |
feat(board/rdn2): add support for variant 1 of rd-n2 platform
Add board support for RD-N2 Cfg1 variant of RD-N2 platform. It is a
variant of RD-N2 platform with a reduced interconnect mesh size (3x3
feat(board/rdn2): add support for variant 1 of rd-n2 platform
Add board support for RD-N2 Cfg1 variant of RD-N2 platform. It is a
variant of RD-N2 platform with a reduced interconnect mesh size (3x3)
and core count (8-cores). Its platform variant id is 1.
Change-Id: I34ad35c5a5c1e9b69a658fb92ed00e5bc5fe72f3
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| cfe1506e | 20-Mar-2021 |
Aditya Angadi <aditya.angadi@arm.com> |
feat(plat/sgi): introduce platform variant build option
A Neoverse reference design platform can have two or more variants that
differ in core count, cluster count or other peripherals. To allow reu
feat(plat/sgi): introduce platform variant build option
A Neoverse reference design platform can have two or more variants that
differ in core count, cluster count or other peripherals. To allow reuse
of platform code across all the variants of a platform, introduce build
option CSS_SGI_PLATFORM_VARIANT for Arm Neoverse reference design
platforms. The range of allowed values for the build option is platform
specific. The recommended range is an interval of non negative integers.
An example usage of the build option is
make PLAT=rdn2 CSS_SGI_PLATFORM_VARIANT=1
Change-Id: Iaae79c0b4d0dc700521bf6e9b4979339eafe0359
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 81579422 | 27-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I36e45c0a,I69c21293 into integration
* changes:
plat/qemu: add "max" cpu support
Add support for QEMU "max" CPU |
| 303f543e | 26-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sgm775_deprecation" into integration
* changes:
build: deprecate Arm sgm775 FVP platform
docs: introduce process for platform deprecation |
| 461e0d3e | 26-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "plat/arm: move compile time switch from source to dt file" into integration |
| a92b0256 | 26-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
mediatek: mt8195: add rtc power off sequence
mediatek: mt8195: add power-off support
mediatek:
Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
mediatek: mt8195: add rtc power off sequence
mediatek: mt8195: add power-off support
mediatek: mt8195: Add reboot function for PSCI
mediatek: mt8195: Add gpio driver
mediatek: mt8195: Add SiP service
mediatek: mt8195: Add CPU hotplug and MCDI support
mediatek: mt8195: Add MCDI drivers
mediatek: mt8195: Add SPMC driver
mediatek: mt8195: Initialize delay_timer
mediatek: mt8195: initialize systimer
mediatek: mt8192: move timer driver to common folder
mediatek: mt8195: add sys_cirq support
mediatek: mt8195: initialize GIC
Initialize platform for MediaTek MT8195
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| c404794a | 14-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
plat/arm: move compile time switch from source to dt file
This will help in keeping source file generic and conditional
compilation can be contained in platform provided dt files.
Signed-off-by: Ma
plat/arm: move compile time switch from source to dt file
This will help in keeping source file generic and conditional
compilation can be contained in platform provided dt files.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I3c6e0a429073f0afb412b9ba521ce43f880b57fe
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| 7bcb8ad2 | 26-Apr-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "Arm: Fix error message printing in board makefile" into integration |
| 37ee58d1 | 22-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
build: deprecate Arm sgm775 FVP platform
sgm775 is an old platform and is no longer maintained by Arm and its
fast model FVP_CSS_SGM-775 is no longer available for download.
This platform is now sup
build: deprecate Arm sgm775 FVP platform
sgm775 is an old platform and is no longer maintained by Arm and its
fast model FVP_CSS_SGM-775 is no longer available for download.
This platform is now superseded by Total Compute(tc) platforms.
This platform is now deprecated but the source will be kept for cooling
off period of 2 release cycle before removing it completely.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I8fe1fc3da0c508dba62ed4fc60cbc1642e0f7f2a
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| c52a10a2 | 08-Apr-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8195: add rtc power off sequence
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the
driver with mt8195.
Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db
Signed-off-by: Yi
mediatek: mt8195: add rtc power off sequence
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the
driver with mt8195.
Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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| 0909819a | 08-Apr-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8195: add power-off support
mt8195 also uses PMIC mt6359p. The only difference is the
pwrap register definition.
Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0
Signed-off-by: Yidi
mediatek: mt8195: add power-off support
mt8195 also uses PMIC mt6359p. The only difference is the
pwrap register definition.
Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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| fcc66173 | 07-Apr-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8195: Add reboot function for PSCI
Add system_reset function in PSCI ops
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I177796e30198b0a53402093ee0917dda43074385 |
| aebd4dc8 | 31-Mar-2021 |
mtk20895 <zhiqiang.ma@mediatek.com> |
mediatek: mt8195: Add gpio driver
Add gpio driver.
Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com>
Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211 |
| 938fd425 | 29-Mar-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8195: Add SiP service
Add the basic SiP service
Change-Id: I21fe9d85eac4be9101b12c4b6c28294c5b93cb5f
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> |
| fe985428 | 16-Jun-2020 |
James Liao <jamesjj.liao@mediatek.com> |
mediatek: mt8195: Add CPU hotplug and MCDI support
Implement PSCI platform OPs to support CPU hotplug and MCDI.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I1321f7989c8a3d116d6
mediatek: mt8195: Add CPU hotplug and MCDI support
Implement PSCI platform OPs to support CPU hotplug and MCDI.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I1321f7989c8a3d116d698768a7146e8f180ee9c0
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| acc85548 | 15-Jun-2020 |
James Liao <jamesjj.liao@mediatek.com> |
mediatek: mt8195: Add MCDI drivers
Add MCDI related drivers to handle CPU powered on/off in CPU suspend.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I6a6f9bf5d1d8bda1ee603d8bf3
mediatek: mt8195: Add MCDI drivers
Add MCDI related drivers to handle CPU powered on/off in CPU suspend.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I6a6f9bf5d1d8bda1ee603d8bf3fc206437de7ad8
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| 0d82eff6 | 16-Jun-2020 |
James Liao <jamesjj.liao@mediatek.com> |
mediatek: mt8195: Add SPMC driver
Add SPMC driver for CPU power on/off.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: If47d7f3f3b9965f3c0402ea6cdb917ad1d16bb32 |
| 65f0dd13 | 26-Mar-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8195: Initialize delay_timer
Initialize delay_timer for delay functions.
Change-Id: Ib554135151f8b5c642b5a6511c942bb9efc0a47f
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> |
| 91550777 | 22-Apr-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8195: initialize systimer
Change-Id: I7e0fbd04b0cdf5da92b8ef39737342f2d66f5f10
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> |
| 46946036 | 26-Mar-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
mediatek: mt8192: move timer driver to common folder
The timer driver can be shared with mt8195. Move the the timer
driver to common/.
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I84
mediatek: mt8192: move timer driver to common folder
The timer driver can be shared with mt8195. Move the the timer
driver to common/.
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I84c97ab9cc9b469f35e0f44dd8e7b2b95f1b3926
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| e5490f95 | 25-Mar-2021 |
gtk_pangao <gtk_pangao@mediatek.com> |
mediatek: mt8195: add sys_cirq support
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common
common folder.
Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com>
Change-Id: Iba5cdc
mediatek: mt8195: add sys_cirq support
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common
common folder.
Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com>
Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
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