| 7475815f | 13-May-2024 |
levi.yun <yeoreum.yun@arm.com> |
feat(handoff): fix register convention r1/x1 value on transfer list
According to recently firmware handsoff spec [1]'s "Register usage at handoff boundary", Transfer List's signature value was chang
feat(handoff): fix register convention r1/x1 value on transfer list
According to recently firmware handsoff spec [1]'s "Register usage at handoff boundary", Transfer List's signature value was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes).
As updating of TL's signature, register value of x1/r1 should be:
In aarch32's r1 value should be R1[23:0]: set to the TL signature (4a0f_b10b -> masked range value: 0f_b10b) R1[31:24]: version of the register convention == 1 and In aarch64's x1 value should be X1[31:0]: set to the TL signature (4a0f_b10b) X1[39:32]: version of the register convention == 1 X1[63:40]: MBZ (See the [2] and [3]).
Therefore, it requires to separate mask and shift value for register convention version field when sets each r1/x1.
This patch fix two problems: 1. breaking X1 value with updated specification in aarch64 - change of length of signature field.
2. previous error value set in R1 in arm32. - length of signature should be 24, but it uses 32bit signature.
This change is breaking change. It requires some patch for other softwares (u-boot[4], optee[5]).
Link: https://github.com/FirmwareHandoff/firmware_handoff [1] Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2] Link: https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027 [3] Link: https://lists.denx.de/pipermail/u-boot/2024-July/558628.html [4] Link: https://github.com/OP-TEE/optee_os/pull/6933 [5] Signed-off-by: Levi Yun <yeoreum.yun@arm.com> Change-Id: Ie417e054a7a4c192024a2679419e99efeded1705
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| f4dd18c2 | 04-Jun-2024 |
Chris Kay <chris.kay@arm.com> |
build: consolidate directory creation rules
This commit streamlines directory creation by introducing a single pattern rule to automatically make directories for which there is a dependency.
We cur
build: consolidate directory creation rules
This commit streamlines directory creation by introducing a single pattern rule to automatically make directories for which there is a dependency.
We currently use several macros to generate rules to create directories upon dependence, which is a significant amount of code and a lot of redundancy. The rule introduced by this change represents a catch-all: any rule dependency on a path ending in a forward slash is automatically created.
Now, rules can rely on an unordered dependency (`|`) on `$$(@D)/` which, when secondary expansion is enabled, expands to the directory of the target being built, e.g.:
build/main.o: main.c | $$(@D)/ # automatically creates `build/`
Change-Id: I7e554efa2ac850e779bb302fd9c7fbb239886c9f Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 3eb5640a | 19-Jul-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
feat(intel): enable VAB support for Intel products
This patch is to implement Vendor Authorize Bootloader support for Intel Agilex, Agilex5 and N5X.
Change-Id: I23bdbbe15b3732775cea028665e2efcbd04b
feat(intel): enable VAB support for Intel products
This patch is to implement Vendor Authorize Bootloader support for Intel Agilex, Agilex5 and N5X.
Change-Id: I23bdbbe15b3732775cea028665e2efcbd04b3aff Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| cab83c34 | 26-Oct-2023 |
Jit Loon Lim <jit.loon.lim@intel.com> |
feat(intel): add in SHA384 authentication
Add VAB SHA384 authentication implementation.
Change-Id: Ic22ab7416ffd0c514328d2815b136aa71ba96a84 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Sig
feat(intel): add in SHA384 authentication
Add VAB SHA384 authentication implementation.
Change-Id: Ic22ab7416ffd0c514328d2815b136aa71ba96a84 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| 7c72dfac | 04-Apr-2024 |
Jit Loon Lim <jit.loon.lim@intel.com> |
fix(intel): update sip smc config addr for agilex5
Agilex5 DDR base address started from 0x8000 0000. Thus the SIP_SMC_FPGA_CONFIG_ADDR shall be offset to 0x8040 0000.
Change-Id: I33a840cb8ebbe02bc
fix(intel): update sip smc config addr for agilex5
Agilex5 DDR base address started from 0x8000 0000. Thus the SIP_SMC_FPGA_CONFIG_ADDR shall be offset to 0x8040 0000.
Change-Id: I33a840cb8ebbe02bc7ff9b1f5d452641af11e576 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| 9877b6ef | 19-Jul-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes If8547b5a,I6826a56d,Idb40907a,Ia51cbe1a,I9b55f6c5, ... into integration
* changes: feat(fvp): add SPM manifest for OP-TEE at S-EL1 without S-EL2/Hafnium fix(fvp): update the memory
Merge changes If8547b5a,I6826a56d,Idb40907a,Ia51cbe1a,I9b55f6c5, ... into integration
* changes: feat(fvp): add SPM manifest for OP-TEE at S-EL1 without S-EL2/Hafnium fix(fvp): update the memory size allocated to optee at EL1 fix(fvp): add DRAM memory regions that linux kernel can share feat(fvp): update FF-A version to v1.1 supported by optee feat(fvp): replace managed-exit with ns-interrupts-action fix(fvp): add optee specific mem-size attribute fix(fvp): fix the FF-A optee manifest by adding the boot info node
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| e08039d0 | 15-Apr-2024 |
Jit Loon Lim <jit.loon.lim@intel.com> |
fix(intel): software workaround for bridge timeout
Hardware hdskack register does not return a correct value after fence and drain of the bridge is done. Thus creates software workaround.
Change-Id
fix(intel): software workaround for bridge timeout
Hardware hdskack register does not return a correct value after fence and drain of the bridge is done. Thus creates software workaround.
Change-Id: I78d8ee0596c3e7bd4883bfd6e92c883b8e369c10 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
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| 63d6331e | 19-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(intel): f2sdram bridge quick write thru failed" into integration |
| 0cdf5199 | 19-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(intel): add QSPI get devinfo mailbox cmd" into integration |
| 207c4470 | 11-Jul-2024 |
Yidi Lin <yidilin@chromium.org> |
fix(mt8188): remove BL32 region protection if SPD sets to none
When SPD is set to none, it means we don't run any secure OS on the system. We should make this memory region available to kernel.
Cha
fix(mt8188): remove BL32 region protection if SPD sets to none
When SPD is set to none, it means we don't run any secure OS on the system. We should make this memory region available to kernel.
Change-Id: Ia83ff4a7d25de38a5d845b7ee1367bafed43bbdd Signed-off-by: Yidi Lin <yidilin@chromium.org>
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| 33e6aaac | 06-Jun-2024 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(fgt2): add support for FEAT_FGT2
This patch disables trapping to EL3 when the FEAT_FGT2 specific trap registers are accessed by setting the SCR_EL3.FGTEn2 bit
Signed-off-by: Arvind Ram Prakash
feat(fgt2): add support for FEAT_FGT2
This patch disables trapping to EL3 when the FEAT_FGT2 specific trap registers are accessed by setting the SCR_EL3.FGTEn2 bit
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I6d2b614affb9067b2bc3d7bf0ae7d169d031592a
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| 83271d5a | 22-May-2024 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(debugv8p9): add support for FEAT_Debugv8p9
This patch enables FEAT_Debugv8p9 and prevents EL1/0 from trapping to EL3 when accessing MDSELR_EL1 register by setting the MDCR_EL3.EBWE bit.
Signed
feat(debugv8p9): add support for FEAT_Debugv8p9
This patch enables FEAT_Debugv8p9 and prevents EL1/0 from trapping to EL3 when accessing MDSELR_EL1 register by setting the MDCR_EL3.EBWE bit.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I3613af1dd8cb8c0d3c33dc959f170846c0b9695a
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| 491832fe | 04-Jun-2024 |
Jimmy Brisson <jimmy.brisson@arm.com> |
fix(arm): check the presence of the policy check function
Change-Id: I7bb0dad232eac6c8084873713af22562853a4c21 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com> |
| 251d645f | 17-Jul-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(zynqmp): move zynqmp platform to xlat tables v2" into integration |
| 76596333 | 15-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(stm32mp1): skip OP-TEE header check if image base is NULL" into integration |
| abdc1001 | 15-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(mediatek): refactor handling of variables with value 'n'" into integration |
| 41d73bff | 05-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
feat(fvp): add SPM manifest for OP-TEE at S-EL1 without S-EL2/Hafnium
Provide manifest to boot OP-TEE at S-EL1 running SPMC with secure EL2 disabled and TF-A at secure EL3 running SPMD.
Change-Id:
feat(fvp): add SPM manifest for OP-TEE at S-EL1 without S-EL2/Hafnium
Provide manifest to boot OP-TEE at S-EL1 running SPMC with secure EL2 disabled and TF-A at secure EL3 running SPMD.
Change-Id: If8547b5a514fb48eec88a8d56d718f1c1591cf1f Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| 47393722 | 11-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
fix(fvp): update the memory size allocated to optee at EL1
Update the memory size allocated to optee at EL1 to 0xd80000 to match the size specified by mem-size in optee manifest.
Change-Id: I6826a5
fix(fvp): update the memory size allocated to optee at EL1
Update the memory size allocated to optee at EL1 to 0xd80000 to match the size specified by mem-size in optee manifest.
Change-Id: I6826a56d0f68a6a2b5181f849a741a9bf1f0829b Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| 18ec9bdc | 05-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
fix(fvp): add DRAM memory regions that linux kernel can share
The memory regions that Linux kernel can share including TX/RX buffers encompass the entire DRAM. Update it accordingly. Without this, w
fix(fvp): add DRAM memory regions that linux kernel can share
The memory regions that Linux kernel can share including TX/RX buffers encompass the entire DRAM. Update it accordingly. Without this, when the Linux kernel call FFA_RXTX_MAP, it fails sometime and the below error from the secure world appears:
| ERROR: arch_other_world_vm_configure_rxtx_map: send page is invalid | (expected 0x87, got 0x7c)
Change-Id: Idb40907af2e0c1d4e60979b4948db2fc70971145 Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| 4f37e1e8 | 05-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
feat(fvp): update FF-A version to v1.1 supported by optee
OPTEE now supports FF-A v1.1, lets us bump the FF-A version in the OPTEE FF-A manifest.
Change-Id: Ia51cbe1af619895945240004a4163a4c4bda2ee
feat(fvp): update FF-A version to v1.1 supported by optee
OPTEE now supports FF-A v1.1, lets us bump the FF-A version in the OPTEE FF-A manifest.
Change-Id: Ia51cbe1af619895945240004a4163a4c4bda2ee5 Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| 887cec9c | 05-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
feat(fvp): replace managed-exit with ns-interrupts-action
Commit 10b292e64933 ("docs(spm): update FF-A manifest binding") deprecated managed-exit in favor of newly added mandatory ns-interrupts-acti
feat(fvp): replace managed-exit with ns-interrupts-action
Commit 10b292e64933 ("docs(spm): update FF-A manifest binding") deprecated managed-exit in favor of newly added mandatory ns-interrupts-action attribute. Replace managed-exit with ns-interrupts-action before it becomes obsolete.
Change-Id: I9b55f6c55af3510260a9c5a01755a9b66d75823e Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| 75265a16 | 05-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
fix(fvp): add optee specific mem-size attribute
Without the mem-size attribute, the OPTEE boot panics with below error: | get_sec_mem_from_manifest:1594 Can't read "mem-size" from FF-A | man
fix(fvp): add optee specific mem-size attribute
Without the mem-size attribute, the OPTEE boot panics with below error: | get_sec_mem_from_manifest:1594 Can't read "mem-size" from FF-A | manifest at 0x6281000: error -1 | Panic at core/arch/arm/kernel/boot.c:1596 <get_sec_mem_from_manifest> | TEE load address @ 0x6284000 | Call stack: | 0x0628c7fc | 0x06298788 | 0x0628c480
Adding the mem-size attribute fixes the boot. This is OPTEE specific extension.
Change-Id: I2801c8b4a89cffafff14c788319ad106b03ffef0 Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| bf36351a | 05-Jun-2024 |
Sudeep Holla <sudeep.holla@arm.com> |
fix(fvp): fix the FF-A optee manifest by adding the boot info node
Without the FF-A manifest boot info node, the OPTEE boot as S-EL1 VM crashes currently with the below error: | WARNING: Stage-2
fix(fvp): fix the FF-A optee manifest by adding the boot info node
Without the FF-A manifest boot info node, the OPTEE boot as S-EL1 VM crashes currently with the below error: | WARNING: Stage-2 page fault: pc=0x628c41c, vmid=0x8001, vcpu=0, | vaddr=0xd00000, ipaddr=0xd00000, mode=0x1 0x7c | NOTICE: Injecting Data Abort exception into VM 0x8001.
Adding the boot info node fixes the OPTEE boot.
While at it, also update copyright year in the file.
Change-Id: I1fd0bf4e38bb95deedc74fa04d1e6bb057424c04 Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| c16e9198 | 15-Jul-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "chore(rdv3): rename platform RD-Fremont to RD-V3" into integration |
| 137ab5cb | 08-Jul-2024 |
Jerry Wang <Jerry.Wang4@arm.com> |
chore(rdv3): rename platform RD-Fremont to RD-V3
Arm has decided to rename RD-Fremont to RD-V3 to align with its existing product lineup, such as RD-V1, RD-V2, etc. This change replaces all occurenc
chore(rdv3): rename platform RD-Fremont to RD-V3
Arm has decided to rename RD-Fremont to RD-V3 to align with its existing product lineup, such as RD-V1, RD-V2, etc. This change replaces all occurences of "Fremont" with "V3" in file names and contents.
Change-Id: I302103492f962a7ac74854633ad68701b2a7f420 Signed-off-by: Jerry Wang <Jerry.Wang4@arm.com>
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