fix(versal-net): ignore the unused function return value

This correct MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function ca

fix(versal-net): ignore the unused function return value

This correct MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function call to void to discard the return value.

Change-Id: I670b476ba16e791e46aaa00feca991e1a4fff227
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(zynqmp): ignore the unused function return value

This corrects the MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function c

fix(zynqmp): ignore the unused function return value

This corrects the MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function call to void to discard the return value.

Change-Id: I097863843ee125e51c709fa964f0524dc984cebe
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal-net): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-sta

fix(versal-net): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially
boolean type.
Updated controlling expression to explicitly compare with zero.

Change-Id: If5d9e8400e6c41cbe9e9c69d810fa62192f02bf3
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-stateme

fix(versal): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially
boolean type.
Updated controlling expression to explicitly compare with zero.

Change-Id: Ice208ea07ce88f571f8868692c1e92cbfcd35cf4
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-stateme

fix(xilinx): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially
boolean type.
Updated controlling expression to explicitly compare with zero.

Change-Id: I12eb4f4c615131d5ee63425b2ccb4f77f3dffa2e
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(zynqmp): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-stateme

fix(zynqmp): modify conditions to have boolean type

This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially
boolean type.
Updated controlling expression to explicitly compare with zero.

Change-Id: I5bf7070db9bced50f5d37a3d9406301585930b50
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_const_preced" into integration

* changes:
fix(versal2): explicitly check operators precedence
fix(versal-net): explicitly check operators precedence
fix

Merge changes from topic "xlnx_fix_plat_const_preced" into integration

* changes:
fix(versal2): explicitly check operators precedence
fix(versal-net): explicitly check operators precedence
fix(versal): explicitly check operators precedence
fix(xilinx): explicitly check operators precedence
fix(zynqmp): explicitly check operators precedence
fix(versal2): add const qualifier
fix(versal): add const qualifier
fix(zynqmp): add const qualifier

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feat(mt8186): add common and MT8186 TRNG driver

Introduce a common RNG driver along with the specific driver for MT8186
platform.

Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by:

feat(mt8186): add common and MT8186 TRNG driver

Introduce a common RNG driver along with the specific driver for MT8186
platform.

Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge "fix(rockchip): fix "unexpected token" error with clang" into integration

Merge "fix(intel): add in JTAG ID for Linux FCS" into integration

Merge "feat(intel): add build option for boot source" into integration

Merge "fix(intel): refactor SDMMC driver for Altera products" into integration

Merge "feat(d128): add support for FEAT_D128" into integration

Merge changes from topic "fix-imx8m-uart-domain-permission" into integration

* changes:
fix(imx8m): ensure domain permissions for the console
refactor(imx8m): replace UART base magic numbers wit

Merge changes from topic "fix-imx8m-uart-domain-permission" into integration

* changes:
fix(imx8m): ensure domain permissions for the console
refactor(imx8m): replace UART base magic numbers with macros

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Merge "feat(intel): clock manager PLL configuration for Agilex5 platform" into integration

Merge "fix(intel): update Agilex5 warm reset subroutines" into integration

fix(versal2): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression i

fix(versal2): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I33028cf220fa0768f8f266db294c42810f62b61c
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal-net): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpressio

fix(versal-net): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I3c30f5029628f8b297c08443a2c6c8bbf2063d29
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in

fix(versal): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I86bbbd4fe86be131a9e9775095d971d76eb956e3
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in

fix(xilinx): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I7d68bcd0daec1c5fe448ce889bb5a74dc8a5cc91
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(zynqmp): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in

fix(zynqmp): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: Id8b901634580bf64cc5022372ba385626f342246
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): add const qualifier

This correct the MISRA violation C2012-8.13:
A pointer should point to a const-qualified type whenever possible.
Added const qualifier to pointer variables and func

fix(versal2): add const qualifier

This correct the MISRA violation C2012-8.13:
A pointer should point to a const-qualified type whenever possible.
Added const qualifier to pointer variables and function arguments.

Change-Id: I3c1dfa4e5be438df4483a2b5937ee2e7c75e25ab
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(intel): refactor SDMMC driver for Altera products

Refactor to be more robust. Removed duplicated and not used functions.
Add in ADMA read.

Change-Id: I1a5a00397ece6f9ccc5916225ab5317010b01b52
S

fix(intel): refactor SDMMC driver for Altera products

Refactor to be more robust. Removed duplicated and not used functions.
Add in ADMA read.

Change-Id: I1a5a00397ece6f9ccc5916225ab5317010b01b52
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>

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feat(intel): clock manager PLL configuration for Agilex5 platform

Read the hand-off data and configure the clock manager main
and peripheral PLL and few other misc updates.

Change-Id: I3c5cbaf7a677

feat(intel): clock manager PLL configuration for Agilex5 platform

Read the hand-off data and configure the clock manager main
and peripheral PLL and few other misc updates.

Change-Id: I3c5cbaf7a677a022ef24b0e679860e6ee195f16a
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>

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Merge "feat(intel): update BL2 platform specific functions" into integration