History log of /rk3399_ARM-atf/plat/ (Results 1301 – 1325 of 8868)
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9c05fcf616-Oct-2024 Joanna Farley <joanna.farley@arm.com>

Merge "fix(versal2): correct the UFS clock rates" into integration

8ee6534416-Oct-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console t

Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console to platform.mk
feat(versal-net): dedicate console for boot and runtime
feat(versal): add DTB console to platform.mk
feat(versal): dedicate console for boot and runtime
refactor(xilinx): register runtime console directly
refactor(xilinx): console registration through console holder structure
feat(zynqmp): add DTB console to platform.mk
feat(zynqmp): dedicate console for boot and runtime
fix(xilinx): dcc to support runtime console scope
refactor(xilinx): create generic function for DT console
refactor(xilinx): rename setup_runtime_console to generic
chore(xilinx): rename console variables
chore(xilinx): rename runtime console to DT console

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6391265716-Oct-2024 Olivier Deprez <olivier.deprez@arm.com>

Merge "feat(rmmd): el3 token sign during attestation" into integration

6a88ec8b04-Jun-2024 Raghu Krishnamurthy <raghupathyk@nvidia.com>

feat(rmmd): el3 token sign during attestation

Add required SMCs by RMM to push attestation signing requests to EL3
and get responses. EL3 may then choose to push these requests to a HES
as suitable

feat(rmmd): el3 token sign during attestation

Add required SMCs by RMM to push attestation signing requests to EL3
and get responses. EL3 may then choose to push these requests to a HES
as suitable for a platform. This patch also supports the new
RMM_EL3_FEATURES interface, that RMM can use to query for support for
HES based signing. The new interface exposes a feature register with
different bits defining different discoverable features. This new
interface is available starting the 0.4 version of the RMM-EL3
interface, causing the version to bump up. This patch also adds a
platform port for FVP that implements the platform hooks required to
enable the new SMCs, but it does not push to a HES and instead copies a
zeroed buffer in EL3.

Change-Id: I69c110252835122a9533e71bdcce10b5f2a686b2
Signed-off-by: Raghu Krishnamurthy <raghupathyk@nvidia.com>

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742d0e6e14-Oct-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "add-qcbor-dependency" into integration

* changes:
chore(tc): increase stack size with 0x100 bytes
chore(tc): link QCBOR library to the platform test

e3b8e78d14-Oct-2024 Olivier Deprez <olivier.deprez@arm.com>

Merge changes I19503ac3,I0fb128a4,I287ab9c3 into integration

* changes:
feat(tc): move flash device to own node
feat(tc): remove static memory used for fwu
fix(tc): correct NS timer frame ID f

Merge changes I19503ac3,I0fb128a4,I287ab9c3 into integration

* changes:
feat(tc): move flash device to own node
feat(tc): remove static memory used for fwu
fix(tc): correct NS timer frame ID for TC

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3f31ccae14-Oct-2024 Manish Pandey <manish.pandey2@arm.com>

Merge changes Ic79429c3,Ie2d5272e,Iec73f9c5,Ie63f48dc,I951da75a, ... into integration

* changes:
feat(stm32mp2): load FW binaries to DDR
feat(stm32mp2-fdts): update STM32MP257F-EV1 DT
feat(fdt

Merge changes Ic79429c3,Ie2d5272e,Iec73f9c5,Ie63f48dc,I951da75a, ... into integration

* changes:
feat(stm32mp2): load FW binaries to DDR
feat(stm32mp2-fdts): update STM32MP257F-EV1 DT
feat(fdts): add DDR4 files for STM32MP2
feat(stm32mp25-fdts): add DDRCTRL and DDRPHY settings in DDR node
feat(stm32mp25-fdts): add DDR power supplies
feat(stm32mp2-fdts): add memory node
feat(stm32mp2): enable DDR driver

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6d41398310-Sep-2024 Michal Simek <michal.simek@amd.com>

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: M

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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1196474201-Jul-2024 Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

feat(versal2): add dtb & runtime console

Modified platform.mk and bl31_setup to
invoke setup_console and runtime_console
to support dtb console parsing and runtime.

Change-Id: I68c2fffd90e38274cfa

feat(versal2): add dtb & runtime console

Modified platform.mk and bl31_setup to
invoke setup_console and runtime_console
to support dtb console parsing and runtime.

Change-Id: I68c2fffd90e38274cfad4f85dd51c722fae0ee89
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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d61ba95e20-Mar-2024 Prasad Kummari <prasad.kummari@amd.com>

feat(versal-net): add DTB console to platform.mk

In the platform.mk file, new console types named dtb
are to be created a macro, VERSAL_NET_CONSOLE_ID_dtb, will
be introduced to check DT console.Use

feat(versal-net): add DTB console to platform.mk

In the platform.mk file, new console types named dtb
are to be created a macro, VERSAL_NET_CONSOLE_ID_dtb, will
be introduced to check DT console.Users will have the
option to select VERSAL_NET_CONSOLE to dtb, which will run
from the DDR address and OCM. The address XILINX_OF_BOARD_DTB_ADDR
needs to be provided. This configuration will register the
DT console in TF-A

Change-Id: I530492c3f48705387e50895aef4bf229a82d350d
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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28ad0e0220-Mar-2024 Prasad Kummari <prasad.kummari@amd.com>

feat(versal-net): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag

feat(versal-net): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and add a boot/crash flag. Additionally,
introduce an RT_CONSOLE_IS macro to check different UART types.

Implement a common function, console_runtime_init(), to initialize
the runtime console. Ensure that all platforms have access to
this feature.

The current implementation utilizes a single console for boot,
crash, and runtime. Make sure that the dedicated console integrates
into runtime and crash scenarios

Change-Id: I49b8554c0f067c85eb693e039a0cf17c5e6794ce
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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d629db2419-Mar-2024 Prasad Kummari <prasad.kummari@amd.com>

feat(versal): add DTB console to platform.mk

In the platform.mk file, new console types named dtb
are to be created a macro, VERSAL_CONSOLE_ID_dtb, will
be introduced to check DT console.Users will

feat(versal): add DTB console to platform.mk

In the platform.mk file, new console types named dtb
are to be created a macro, VERSAL_CONSOLE_ID_dtb, will
be introduced to check DT console.Users will have the
option to select VERSAL_CONSOLE to dtb, which will run
from the DDR address and OCM. The address XILINX_OF_BOARD_DTB_ADDR
needs to be provided. This configuration will register the
DT console in TF-A.

Change-Id: Iee0ed2d5bb73c833f34809699203622b912cdbd7
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

show more ...

d533f58d19-Mar-2024 Prasad Kummari <prasad.kummari@amd.com>

feat(versal): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and

feat(versal): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and add a boot/crash flag. Additionally,
introduce an RT_CONSOLE_IS macro to check different UART types.

Implement a common function, console_runtime_init(), to initialize
the runtime console. Ensure that all platforms have access to
this feature.

The current implementation utilizes a single console for boot,
crash, and runtime. Make sure that the dedicated console integrates
into runtime and crash scenarios.

Change-Id: I7b71fb4a8cd36e8e91c98ebee09904ba47222e33
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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cca2b86510-Sep-2024 Michal Simek <michal.simek@amd.com>

refactor(xilinx): register runtime console directly

Initialize runtime console early instead of deferred init.

Change-Id: Iae2f69ba4da27b62b69d640e3ccdc1303f549617
Signed-off-by: Michal Simek <mich

refactor(xilinx): register runtime console directly

Initialize runtime console early instead of deferred init.

Change-Id: Iae2f69ba4da27b62b69d640e3ccdc1303f549617
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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d2e00eea19-Mar-2024 Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

refactor(xilinx): console registration through console holder structure

Refactored register_console using console holder structure as
input. Structure holds console scope and console type as additio

refactor(xilinx): console registration through console holder structure

Refactored register_console using console holder structure as
input. Structure holds console scope and console type as additional
members. These modifications enhance code readability and
maintainability, contributing to a clearer and more sustainable
codebase for future development.

Change-Id: I7fcc1accfdecdacc205d427a80031536c456638e
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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09a02ce018-Mar-2024 Prasad Kummari <prasad.kummari@amd.com>

feat(zynqmp): add DTB console to platform.mk

In the platform.mk file, new console types named dtb are to be created
a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console.
Users will

feat(zynqmp): add DTB console to platform.mk

In the platform.mk file, new console types named dtb are to be created
a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console.
Users will have the option to select ZYNQMP_CONSOLE to dtb, which will
run from the DDR address. The address XILINX_OF_BOARD_DTB_ADDR needs
to be provided. This configuration will register the DT console in TF-A.
Flags for the ZynqMP platform and other AMD-Xilinx platforms will be
updated to utilize common code.

Change-Id: If74da4a80196575335c9d5562e6d8cd12d99561c
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

show more ...

4557ab6914-Mar-2024 Prasad Kummari <prasad.kummari@amd.com>

feat(zynqmp): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and

feat(zynqmp): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and add a boot/crash flag. Additionally,
introduce an RT_CONSOLE_IS macro to check different UART types.

Implement a common function, console_runtime_init(), to initialize
the runtime console. Ensure that all platforms have access to
this feature.

The current implementation utilizes a single console for boot,
crash, and runtime. Make sure that the dedicated console integrates
into runtime and crash scenarios.

Change-Id: I32913dede3d87109e54d179e7d99f45c33b9097b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

show more ...

238eb54223-Sep-2024 Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

fix(xilinx): dcc to support runtime console scope

DCC driver to support boot and runtime console scope
switch for dedicated boot and runtime consoles.

Change-Id: I7769dc44860a5fda99ca42ce17a3a60092

fix(xilinx): dcc to support runtime console scope

DCC driver to support boot and runtime console scope
switch for dedicated boot and runtime consoles.

Change-Id: I7769dc44860a5fda99ca42ce17a3a6009288d7e7
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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4ec4e54506-Sep-2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

feat(sctlr2): add support for FEAT_SCTLR2

Arm v8.9 introduces FEAT_SCTLR2, adding SCTLR2_ELx registers.
Support this, context switching the registers and disabling
traps so lower ELs can access the

feat(sctlr2): add support for FEAT_SCTLR2

Arm v8.9 introduces FEAT_SCTLR2, adding SCTLR2_ELx registers.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.

Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.

Change-Id: I0c4cba86917b6b065a7e8dd6af7daf64ee18dcda
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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6d0433f005-Sep-2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

feat(the): add support for FEAT_THE

Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switchin

feat(the): add support for FEAT_THE

Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.

Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.

Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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75b0d57511-Oct-2024 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "feat(s32g274a): add ncore support" into integration

b048601e04-Oct-2024 Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>

fix(versal2): correct the UFS clock rates

Update the UFS clock rates as per the expected range
- Update the clock rates of "ufs_phy_clk" and "ufs_ref_pclk" to 26MHz
as 100MHz is not the valid clock

fix(versal2): correct the UFS clock rates

Update the UFS clock rates as per the expected range
- Update the clock rates of "ufs_phy_clk" and "ufs_ref_pclk" to 26MHz
as 100MHz is not the valid clock rate for these two clocks.
- cpu_clock rate (908KHz) is not valid clock for UFS, hence skip setting
up UFS clocks to cpu_clock for SPP platform.

Change-Id: I31863619ca1bd527df283d1636493dd8fce18809
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

show more ...

9a0cad3929-May-2024 Yann Gautier <yann.gautier@st.com>

feat(stm32mp2): load FW binaries to DDR

Now that DDR is initialized, we can load the different firmware
parts: BL32 (OP-TEE header), BL32 extra1 (OP-TEE), HW_CONFIG (U-Boot
device tree) and BL33 (U

feat(stm32mp2): load FW binaries to DDR

Now that DDR is initialized, we can load the different firmware
parts: BL32 (OP-TEE header), BL32 extra1 (OP-TEE), HW_CONFIG (U-Boot
device tree) and BL33 (U-Boot).

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic79429c3bd4516c339f91a10e0b3f2828bf6c392

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62269d4725-Jun-2024 Davidson K <davidson.kumaresan@arm.com>

feat(tc): move flash device to own node

Move the flash address to its own devicetree node in
tc_spmc_manifest.dtsi. This patch also changes the device-type to
ns-device-memory which is the correct t

feat(tc): move flash device to own node

Move the flash address to its own devicetree node in
tc_spmc_manifest.dtsi. This patch also changes the device-type to
ns-device-memory which is the correct type for a flash device.

Change-Id: I19503ac35c433661faaaa01c0b83a16540d73810
Co-developed-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>

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213a08eb01-Jun-2022 Nicolas Le Bayon <nicolas.le.bayon@st.com>

feat(stm32mp2): enable DDR driver

Call stm32mp2_ddr_probe() function in platform setup.
Move DDR systematic test file in common.mk.

Change-Id: I982abd33635a3222a52c967eac64676bc26b0d6b
Signed-off-b

feat(stm32mp2): enable DDR driver

Call stm32mp2_ddr_probe() function in platform setup.
Move DDR systematic test file in common.mk.

Change-Id: I982abd33635a3222a52c967eac64676bc26b0d6b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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