| d07e9467 | 05-Jul-2021 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp2): introduce DDR type compilation flags
Binary size limitation implies to define DDR type build flags. User must set one single type in the build command line. DDR_TYPE is then deduced,
feat(stm32mp2): introduce DDR type compilation flags
Binary size limitation implies to define DDR type build flags. User must set one single type in the build command line. DDR_TYPE is then deduced, and will help in relative definitions. A check routine is implemented to verify correct configuration.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I87d0a492196efea33831d9c090e6e434cc7c0a1e
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| 03020b66 | 13-Jun-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32mp2): add minimal support for BL31
Add the required files to compile BL31 on STM32MP2. Update BL2 configuration to load BL31. The platform boots until BL31, but stops here as no other bina
feat(stm32mp2): add minimal support for BL31
Add the required files to compile BL31 on STM32MP2. Update BL2 configuration to load BL31. The platform boots until BL31, but stops here as no other binaries are loaded as DDR is not initialized. At runtime, BL31 will use only the first half of the SYSRAM, the upper half will be used for non-secure DMA LLIs. To be sure nothing from this area is still in the cache, invalidate the upper SYSRAM before enabling BL31 cache. BL31 should then map only first half of the SYSRAM. But it must temporarily map the upper half read-only, as this is where we will retrieve BL2 parameters, used to fill registers for next boot stages.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: Ie91527a7a26625624b4b3c65fb6a0ca9dd355dbd
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| aa7f6cd8 | 27-Nov-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(st): manage BL31 FCONF load_info struct
As the file is common with STM32MP1, which is AARCH32, the BL31 entry is put under __aarch64__ flag.
Change-Id: I1efc406717842235264dc6cc3605229659364b0
feat(st): manage BL31 FCONF load_info struct
As the file is common with STM32MP1, which is AARCH32, the BL31 entry is put under __aarch64__ flag.
Change-Id: I1efc406717842235264dc6cc3605229659364b02 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
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| 60d07584 | 02-Sep-2024 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp2): remove mapping of BL2 DT area
To prevent from coding issues that could overwrite DT area, we were mapping this area as read-only on STM32MP1. But on STM32MP2, we need this area to put
fix(stm32mp2): remove mapping of BL2 DT area
To prevent from coding issues that could overwrite DT area, we were mapping this area as read-only on STM32MP1. But on STM32MP2, we need this area to put BL31 binary. We were then using dynamic mapping. But the area is included in the whole SYSRAM memory mapping. This is not allowed with dynamic mapping. As no other code is running at this step, and we know what code is running in BL2, just remove this extra read-only protection for STM32MP2. A message is added after the post load process of FW-CONFIG file, as BL2 DT area will be overwritten after that. And remove the now useless macros DTB_BASE & DTB_LIMIT. This corrects Coverity issue: CID 443168.
Change-Id: Ic01d6a443ecf7721380ef39dc570e2d1627008d0 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| a846a235 | 22-May-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): load fw-config file
Add FW_CONFIG_ID entry in bl2_mem_params_descs to be loaded, and add its parsing in bl2_plat_handle_post_image_load().
Signed-off-by: Yann Gautier <yann.gautier@
feat(stm32mp2): load fw-config file
Add FW_CONFIG_ID entry in bl2_mem_params_descs to be loaded, and add its parsing in bl2_plat_handle_post_image_load().
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I151289474325067204ffae62e17c2e1e00f79b1c
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| 5af9369c | 22-May-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): add fw-config compilation
The DT file will be in the FIP, and loaded at the beginning of SYSRAM. The info for hw-config (U-Boot DT by default) is also added, it will be loaded just a
feat(stm32mp2): add fw-config compilation
The DT file will be in the FIP, and loaded at the beginning of SYSRAM. The info for hw-config (U-Boot DT by default) is also added, it will be loaded just after BL33 (U-Boot binary).
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I9d58428c2d911c5c16cae5164122bf833a847a7d
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| 5e0be8c0 | 21-May-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): enable DDR sub-system clock
Create a DDR helper files, and add a function to enable DDR clocks in RCC_DDRCPCFGR register. Call this ddr_sub_system_clk_init() just before clock driver
feat(stm32mp2): enable DDR sub-system clock
Create a DDR helper files, and add a function to enable DDR clocks in RCC_DDRCPCFGR register. Call this ddr_sub_system_clk_init() just before clock driver init, as it needs to be done before enabling DDR PLL clock (PLL2).
Change-Id: I365d6aa034363d0c036ce2d9f944f077ba86e193 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| c3a75341 | 21-May-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): add fixed regulators support
Call fixed_regulator_register() in bl2_el3_plat_arch_setup() to configure fixed regulators, if any are present in device tree.
Signed-off-by: Yann Gauti
feat(stm32mp2): add fixed regulators support
Call fixed_regulator_register() in bl2_el3_plat_arch_setup() to configure fixed regulators, if any are present in device tree.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Iab2d3a4b6b294727b2b6722a6a13bf3f194ec0f9
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| cdaced36 | 15-Apr-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32mp2): print board info
Call stm32mp_print_boardinfo() during BL2 setup. As for STM32MP1, the board info is taken in the dedicated OTP fuse. This fuse will be taken from device tree.
Signe
feat(stm32mp2): print board info
Call stm32mp_print_boardinfo() during BL2 setup. As for STM32MP1, the board info is taken in the dedicated OTP fuse. This fuse will be taken from device tree.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2de0199378562b459b27427109ce66239316b8d9
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| 381b2a6b | 21-Jun-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): display CPU info
Print information about CPU type, package and revision. SoC revision ID of MP2 family are defined with the OTP 102.
Signed-off-by: Maxime Méré <maxime.mere@foss.st.
feat(stm32mp2): display CPU info
Print information about CPU type, package and revision. SoC revision ID of MP2 family are defined with the OTP 102.
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I14a95c8a7cb9b06ce32c2e592ae69a1741067e8d
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| 154e6e62 | 21-May-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): get chip ID
Add a function to get chip ID from SYSCFG peripheral.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I32b15fca00e52d31f253e02873ab01b804399658 |
| db77f8bf | 21-May-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): add BL2 boot first steps
Configure the first steps for STM32MP2 BL2 platform boot: - Save boot context address for later use - Configure BL2 MMU - Load and use BL2 DT - Reset backup
feat(stm32mp2): add BL2 boot first steps
Configure the first steps for STM32MP2 BL2 platform boot: - Save boot context address for later use - Configure BL2 MMU - Load and use BL2 DT - Reset backup domain - Initialize clocks - Configure UART for console - Print some info about board and reset reason - Setup storage (only SD-card for the moment)
The platform boot stops at BL2 image load, as bl2_mem_params_descs[] is still empty.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: If6127cfbf77825a03afe8d65ba47c8c0661de496
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| f4dd18c2 | 04-Jun-2024 |
Chris Kay <chris.kay@arm.com> |
build: consolidate directory creation rules
This commit streamlines directory creation by introducing a single pattern rule to automatically make directories for which there is a dependency.
We cur
build: consolidate directory creation rules
This commit streamlines directory creation by introducing a single pattern rule to automatically make directories for which there is a dependency.
We currently use several macros to generate rules to create directories upon dependence, which is a significant amount of code and a lot of redundancy. The rule introduced by this change represents a catch-all: any rule dependency on a path ending in a forward slash is automatically created.
Now, rules can rely on an unordered dependency (`|`) on `$$(@D)/` which, when secondary expansion is enabled, expands to the directory of the target being built, e.g.:
build/main.o: main.c | $$(@D)/ # automatically creates `build/`
Change-Id: I7e554efa2ac850e779bb302fd9c7fbb239886c9f Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 76596333 | 15-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(stm32mp1): skip OP-TEE header check if image base is NULL" into integration |
| f3eaa1bb | 11-Jul-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_mp2_clk_reset" into integration
* changes: feat(st-reset): add stm32mp2_reset driver feat(st-clock): add STM32MP2 clock driver fix(dt-bindings): update STM32MP2 cl
Merge changes from topic "st_mp2_clk_reset" into integration
* changes: feat(st-reset): add stm32mp2_reset driver feat(st-clock): add STM32MP2 clock driver fix(dt-bindings): update STM32MP2 clock and reset bindings feat(st-reset): add system reset management
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| 4e9b4980 | 10-Jul-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "refactor(st): change suffix for SYSCFG functions" into integration |
| b452e7a8 | 09-Jul-2024 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): skip OP-TEE header check if image base is NULL
In bl2_plat_handle_post_image_load(), if the image_base of OP-TEE header image is 0, do not call optee_header_is_valid(). This can be th
fix(stm32mp1): skip OP-TEE header check if image base is NULL
In bl2_plat_handle_post_image_load(), if the image_base of OP-TEE header image is 0, do not call optee_header_is_valid(). This can be the case when OP-TEE is not present in the FIP.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ic2d014e59665c9efa33bbce1bf2eb3b66cd6fb26
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| f829d7df | 20-Apr-2022 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(st-reset): add stm32mp2_reset driver
This driver manages the resets of the peripherals embedded in STM32MP2. Like clock driver, it also uses the RCC peripheral.
Change-Id: I8217891bdf1b847925a
feat(st-reset): add stm32mp2_reset driver
This driver manages the resets of the peripherals embedded in STM32MP2. Like clock driver, it also uses the RCC peripheral.
Change-Id: I8217891bdf1b847925aad77f3f6ef542f08d1fba Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 615f31fe | 20-Apr-2022 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(st-clock): add STM32MP2 clock driver
This driver manages the clocks on STM32MP2 platforms. It uses a dedicated RCC (Reset and Clock Control) peripheral.
Change-Id: I6ba2173e73222269a2dfca4c689
feat(st-clock): add STM32MP2 clock driver
This driver manages the clocks on STM32MP2 platforms. It uses a dedicated RCC (Reset and Clock Control) peripheral.
Change-Id: I6ba2173e73222269a2dfca4c6897229276a150c0 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
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| d91d10ab | 12-Nov-2020 |
Lionel Debieve <lionel.debieve@st.com> |
feat(st-reset): add system reset management
Add the system reset management into the stm32mp reset driver.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I748f10de2398e1323160f479
feat(st-reset): add system reset management
Add the system reset management into the stm32mp reset driver.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I748f10de2398e1323160f479f99e92abd2f65dca
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| 4b1826c8 | 16-Jan-2024 |
Maxime Méré <maxime.mere@foss.st.com> |
refactor(st): change suffix for SYSCFG functions
This patch replaces the suffix "stm32mp1_" in the SYSCFG drivers with "stm32mp_". By using a common suffix for function names, we can avoid issues or
refactor(st): change suffix for SYSCFG functions
This patch replaces the suffix "stm32mp1_" in the SYSCFG drivers with "stm32mp_". By using a common suffix for function names, we can avoid issues or platform compilation flags when a driver needs to access SYSCFG across different platforms.
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I24407852c085abd843ef4cdef235c022a5e57a85
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| 372f4592 | 16-May-2023 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st): change method to get GIC base addresses
GIC DT node structure depends on system architecture, notably around "reg" property. A generic way to retrieve base address is needed. Use fdt_n
refactor(st): change method to get GIC base addresses
GIC DT node structure depends on system architecture, notably around "reg" property. A generic way to retrieve base address is needed. Use fdt_node_offset_by_compatible() helper.
Change-Id: Ibb47864bd5e8a76a48b9346fdcf87d31281517ce Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 66b4c5c5 | 05-Jan-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(st): move FWU support to common code
Move PLAT_PARTITION_MAX_ENTRIES and all other definitions linked to it to common.mk. Move drivers/fwu/fwu.mk inclusion there as well.
Signed-off-by: Ya
refactor(st): move FWU support to common code
Move PLAT_PARTITION_MAX_ENTRIES and all other definitions linked to it to common.mk. Move drivers/fwu/fwu.mk inclusion there as well.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I5dde65e41908d706328cb8929582f827ceeff841
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| b91c7f5e | 05-Jan-2024 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): move FWU functions to common code
Move the platforms functions used for Firmware update in plat/st/common directory. The function stm32mp1_fwu_set_boot_idx() is renamed stm32_fwu_set_b
refactor(st): move FWU functions to common code
Move the platforms functions used for Firmware update in plat/st/common directory. The function stm32mp1_fwu_set_boot_idx() is renamed stm32_fwu_set_boot_idx() to align with other ones. A new function stm32_get_bkpr_fwu_info_addr() is created to get the backup register address where to store FWU info (counter and partition index).
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I64916c7992782ceeaaf990026756ca4134d93c88
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| 08fc380a | 17-Jun-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "st-nand-backup-fwu" into integration
* changes: refactor(st): rename plat_set_image_source feat(st): add FWU with boot from NAND feat(st): manage backup partitions fo
Merge changes from topic "st-nand-backup-fwu" into integration
* changes: refactor(st): rename plat_set_image_source feat(st): add FWU with boot from NAND feat(st): manage backup partitions for NAND devices feat(bl): add plat handler for image loading refactor(bl)!: remove unused plat_try_next_boot_source
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