refactor(stm32mp1): use a macro for header size

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-

refactor(stm32mp1): use a macro for header size

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): add helper to enable high speed mode in low voltage

This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id

feat(stm32mp1): add helper to enable high speed mode in low voltage

This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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refactor(stm32mp1): add helpers for IO compensation cells

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae

refactor(stm32mp1): add helpers for IO compensation cells

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): use clk_enable/disable functions

Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-b

feat(stm32mp1): use clk_enable/disable functions

Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): add timeout in IO compensation

Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the

feat(stm32mp1): add timeout in IO compensation

Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the SoC recommendation is not followed.

Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections

Because the BL2 is not relocated, the usage of BL2_IN_XIP_MEM
can be used. It reduces the binary size by removing all relocation
s

feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections

Because the BL2 is not relocated, the usage of BL2_IN_XIP_MEM
can be used. It reduces the binary size by removing all relocation
sections. XIP will not be used when STM32MP_USE_STM32IMAGE is
defined. Introduce new definitions for SEPARATE_CODE_AND_RODATA.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ifd76f14e5bc98990bf84e0bfd4ee0b4e49a9a293

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refactor(stm32mp1): reduce MMU memory regions and split XLAT by context

Simplify the BL2 MMU mapping and reduce the memory regions
number. Split the XLAT define between BL2 and BL32 as binaries
do n

refactor(stm32mp1): reduce MMU memory regions and split XLAT by context

Simplify the BL2 MMU mapping and reduce the memory regions
number. Split the XLAT define between BL2 and BL32 as binaries
do not share the same tables anymore.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iaf09e72b4cc29acbe376f6f1cd2a8116c793ba26

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feat(st): map 2MB for ROM code

This allows reducing MMU tables, and as there is nothing after ROM code
in memory mapping, this has no impact.

Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3
Si

feat(st): map 2MB for ROM code

This allows reducing MMU tables, and as there is nothing after ROM code
in memory mapping, this has no impact.

Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(stm32mp1): restrict DEVICE2 mapping in BL2

Only NAND memory map area can be of interest for BL2 in the
DEVICE2 area. Map DEVICE2 under STM32MP_RAW_NAND flag.

Change-Id: I7e3b39579e4a2525b25cb19

fix(stm32mp1): restrict DEVICE2 mapping in BL2

Only NAND memory map area can be of interest for BL2 in the
DEVICE2 area. Map DEVICE2 under STM32MP_RAW_NAND flag.

Change-Id: I7e3b39579e4a2525b25cb1987d6ec38038d0de2b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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refactor(st-ddr): move basic tests in a dedicated file

These basic tests are generic and should be used independently of the
driver, depending on the plaftorm characteristics.

Change-Id: I38161b659

refactor(st-ddr): move basic tests in a dedicated file

These basic tests are generic and should be used independently of the
driver, depending on the plaftorm characteristics.

Change-Id: I38161b659ef2a23fd30a56e1c9b1bd98461a2fe4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>

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refactor(st-ddr): reorganize generic and specific elements

stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32

refactor(st-ddr): reorganize generic and specific elements

stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32mp_ddr_size moves to the generic side.
stm32mp1_ddr_priv contains platform private data.

stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to
retrieve data from DT. They are located in new generic c/h files in
which stm32mp_ddr_param structure is declared. Platform makefile
is updated.

Adapt driver with this new classification.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I4187376c9fff1a30e7a94407d188391547107997

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feat(stm32mp1): allow configuration of DDR AXI ports number

A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.

Change-Id

feat(stm32mp1): allow configuration of DDR AXI ports number

A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.

Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "st_fixes" into integration

* changes:
fix(stm32mp1): do not reopen debug features
refactor(stm32mp1): improve DGBMCU driver
fix(stm32mp1): set reset pulse duration to

Merge changes from topic "st_fixes" into integration

* changes:
fix(stm32mp1): do not reopen debug features
refactor(stm32mp1): improve DGBMCU driver
fix(stm32mp1): set reset pulse duration to 31ms

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fix(stm32mp1): do not reopen debug features

On closed chips, it is not allowed to open debug. The BSEC debug
register can not be rewritten.
On open chips, the debug is already open, no need to rewri

fix(stm32mp1): do not reopen debug features

On closed chips, it is not allowed to open debug. The BSEC debug
register can not be rewritten.
On open chips, the debug is already open, no need to rewrite this
register. This part of code is just removed.
An INFO message is displayed if debug is disabled.
The freeze of the watchdog during debug is also removed.
In case of debug, this must be managed by the software that enables
the debugger.

Change-Id: I19fbd3c487bb1018db30fd599cfa94fe5090899f
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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refactor(stm32mp1): improve DGBMCU driver

Add function headers to improve readability.
Add asserts when required.
Use RCC_BASE address.

Change-Id: Ia545293f00167b6276331a986ea7aa08c006e004
Signed-o

refactor(stm32mp1): improve DGBMCU driver

Add function headers to improve readability.
Add asserts when required.
Use RCC_BASE address.

Change-Id: Ia545293f00167b6276331a986ea7aa08c006e004
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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fix(stm32mp1): set reset pulse duration to 31ms

According to ST Application note AN5256 [1], the minimum reset pulse
duration should be set to 31ms on boards powered with discrete
regulators.

[1] h

fix(stm32mp1): set reset pulse duration to 31ms

According to ST Application note AN5256 [1], the minimum reset pulse
duration should be set to 31ms on boards powered with discrete
regulators.

[1] https://www.st.com/resource/en/application_note/dm00561921.pdf

Change-Id: Ib6ed029ee8a4b95f75a80948fdd2154b4ebe484f
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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Merge changes from topic "st_regulator" into integration

* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulat

Merge changes from topic "st_regulator" into integration

* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulator driver
refactor(st): update CPU and VDD voltage get
refactor(stm32mp1-fdts): update regulator description
refactor(st-pmic): use regulator framework for DDR init
feat(st-pmic): register the PMIC to regulator framework
refactor(st-pmic): split initialize_pmic()
feat(stm32mp1): add regulator framework compilation
feat(regulator): add a regulator framework
feat(stpmic1): add new services
feat(stpmic1): add USB OTG regulators
refactor(st-pmic): improve driver usage
refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
refactor(stm32mp1): re-order drivers init

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feat(stm32mp1): register fixed regulator

Register fixed regulator in BL2.

Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann G

feat(stm32mp1): register fixed regulator

Register fixed regulator in BL2.

Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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refactor(st-pmic): split initialize_pmic()

print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after init

refactor(st-pmic): split initialize_pmic()

print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after initialize_pmic() in BL2.

Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(stm32mp1): add regulator framework compilation

Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.

Change-Id: I9dc7a0a4c4f5a23d9bedda368d4

feat(stm32mp1): add regulator framework compilation

Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.

Change-Id: I9dc7a0a4c4f5a23d9bedda368d407612c9cd21cd
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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refactor(stm32mp1): re-order drivers init

SYSCFG can be initialized later, after console is up, to display the
warnings or messages it could issue.
PMIC should be initialized earlier, before SYSCFG

refactor(stm32mp1): re-order drivers init

SYSCFG can be initialized later, after console is up, to display the
warnings or messages it could issue.
PMIC should be initialized earlier, before SYSCFG init.

Change-Id: Icc3a1366083a1b1fde7f0e173645449b4c04c49b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id:

feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(clk): add a minimal clock framework

This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compil

feat(clk): add a minimal clock framework

This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compiled for STM32MP1.

Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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fix(stm32mp1): correct include order

Warnings about header files include order were triggered by CI.
Correct the include order to mathc CI requirements.

Change-Id: Iaca959add924e0e1fa2e56fab2348f0e

fix(stm32mp1): correct include order

Warnings about header files include order were triggered by CI.
Correct the include order to mathc CI requirements.

Change-Id: Iaca959add924e0e1fa2e56fab2348f0ee36e5fa7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "fconf_get_index" into integration

* changes:
feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
feat(fconf): add a helper to get image index