1 /* 2 * Copyright (c) 2016-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 10 #include <platform_def.h> 11 12 #include <common/debug.h> 13 #include <drivers/st/bsec.h> 14 #include <drivers/st/stm32mp1_rcc.h> 15 #include <lib/mmio.h> 16 #include <lib/utils_def.h> 17 18 #include <stm32mp1_dbgmcu.h> 19 20 #define DBGMCU_IDC U(0x00) 21 #define DBGMCU_APB4FZ1 U(0x2C) 22 23 #define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0) 24 #define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16) 25 #define DBGMCU_IDC_REV_ID_SHIFT 16 26 27 #define DBGMCU_APB4FZ1_IWDG2 BIT(2) 28 29 static int stm32mp1_dbgmcu_init(void) 30 { 31 uint32_t dbg_conf; 32 33 dbg_conf = bsec_read_debug_conf(); 34 35 if ((dbg_conf & BSEC_DBGSWGEN) == 0U) { 36 uint32_t result = bsec_write_debug_conf(dbg_conf | 37 BSEC_DBGSWGEN); 38 39 if (result != BSEC_OK) { 40 ERROR("Error enabling DBGSWGEN\n"); 41 return -1; 42 } 43 } 44 45 mmio_setbits_32(RCC_BASE + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); 46 47 return 0; 48 } 49 50 /* 51 * @brief Get silicon revision from DBGMCU registers. 52 * @param chip_version: pointer to the read value. 53 * @retval 0 on success, negative value on failure. 54 */ 55 int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version) 56 { 57 assert(chip_version != NULL); 58 59 if (stm32mp1_dbgmcu_init() != 0) { 60 return -EPERM; 61 } 62 63 *chip_version = (mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) & 64 DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; 65 66 return 0; 67 } 68 69 /* 70 * @brief Get device ID from DBGMCU registers. 71 * @param chip_dev_id: pointer to the read value. 72 * @retval 0 on success, negative value on failure. 73 */ 74 int stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id) 75 { 76 assert(chip_dev_id != NULL); 77 78 if (stm32mp1_dbgmcu_init() != 0) { 79 return -EPERM; 80 } 81 82 *chip_dev_id = mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) & 83 DBGMCU_IDC_DEV_ID_MASK; 84 85 return 0; 86 } 87 88 /* 89 * @brief Freeze IWDG2 in debug mode. 90 * @retval None. 91 */ 92 int stm32mp1_dbgmcu_freeze_iwdg2(void) 93 { 94 uint32_t dbg_conf; 95 96 if (stm32mp1_dbgmcu_init() != 0) { 97 return -EPERM; 98 } 99 100 dbg_conf = bsec_read_debug_conf(); 101 102 if ((dbg_conf & (BSEC_SPIDEN | BSEC_SPINDEN)) != 0U) { 103 mmio_setbits_32(DBGMCU_BASE + DBGMCU_APB4FZ1, 104 DBGMCU_APB4FZ1_IWDG2); 105 } 106 107 return 0; 108 } 109