| 3d201787 | 08-Mar-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
The JEDEC information for STMicroelectronics is: JEDEC_ST_MFID U(0x20) JEDEC_ST_BKID U(0x0) And rely on platform functions to get ch
feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
The JEDEC information for STMicroelectronics is: JEDEC_ST_MFID U(0x20) JEDEC_ST_BKID U(0x0) And rely on platform functions to get chip IP and revision.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I4fa4ac8bb5583b1871b768decc9fe08e8966ff54
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| ec8f4212 | 13-May-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: register shared resource per GPIO bank/pin
Introduce helper functions stm32mp_register_secure_gpio() and stm32mp_register_non_secure_gpio() for drivers to register a GPIO pin as secure or
stm32mp1: register shared resource per GPIO bank/pin
Introduce helper functions stm32mp_register_secure_gpio() and stm32mp_register_non_secure_gpio() for drivers to register a GPIO pin as secure or non-secure.
These functions are stubbed when shared resource driver is not embedded in the BL image so that drivers do not bother whether they shall register or not their resources.
Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 0651b5b7 | 13-May-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: register shared resource per IOMEM address
Introduce helper functions stm32mp_register_secure_periph_iomem() and stm32mp_register_non_secure_periph_iomem() for drivers to register a resour
stm32mp1: register shared resource per IOMEM address
Introduce helper functions stm32mp_register_secure_periph_iomem() and stm32mp_register_non_secure_periph_iomem() for drivers to register a resource as secure or non-secure based on its SoC interface registers base address.
These functions are stubbed when shared resources driver is not embedded (!STM32MP_SHARED_RESOURCES) so that drivers embedded in other BL stages do not bother whether they shall register or not their resources.
Change-Id: Icebd05a930afc5964bc4677357da5d1b23666066 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 5f038ac6 | 13-May-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: shared resources: apply registered configuration
BL32/SP_MIN configures platform security hardening from the shared resources driver. At the end of SP_MIN initialization, all shared resou
stm32mp1: shared resources: apply registered configuration
BL32/SP_MIN configures platform security hardening from the shared resources driver. At the end of SP_MIN initialization, all shared resources shall be assigned to secure or non-secure world by drivers. A lock prevent from further change on the resource assignation. By definition, resources not registered are assign to non-secure world since not claimed by any component on the BL.
No functional change as all resources are currently in state SHRES_UNREGISTERED hence assigned to non-secure world as prior this change in stm32mp1_etzpc_early_setup() and sp_min_platform_setup().
Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 7ad6d362 | 26-Mar-2020 |
Andre Przywara <andre.przywara@arm.com> |
plat/stm32: Use generic fdt_get_reg_props_by_name()
The STM32 platform port parse DT nodes to find base address to peripherals. It does this by using its own implementation, even though this functio
plat/stm32: Use generic fdt_get_reg_props_by_name()
The STM32 platform port parse DT nodes to find base address to peripherals. It does this by using its own implementation, even though this functionality is generic and actually widely useful outside of the STM32 code.
Re-implement fdt_get_reg_props_by_name() on top of the newly introduced fdt_get_reg_props_by_index() function, and move it to fdt_wrapper.c. This is removes the assumption that #address-cells and #size-cells are always one.
Change-Id: I6d584930262c732b6e0356d98aea50b2654f789d Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| be858cff | 26-Mar-2020 |
Andre Przywara <andre.przywara@arm.com> |
plat/stm32: Implement fdt_read_uint32_default() as a wrapper
The STM32 platform code uses its own set of FDT helper functions, although some of them are fairly generic.
Remove the implementation of
plat/stm32: Implement fdt_read_uint32_default() as a wrapper
The STM32 platform code uses its own set of FDT helper functions, although some of them are fairly generic.
Remove the implementation of fdt_read_uint32_default() and implement it on top of the newly introduced fdt_read_uint32() function, then convert all users over.
This also fixes two callers, which were slightly abusing the "default" semantic.
Change-Id: I570533362b4846e58dd797a92347de3e0e5abb75 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| e463d3f4 | 22-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: use a common function to check spinlock is available
To use spinlocks, MMU should be enabled, as well as data cache. A common function is created (moved from clock file). It is then used w
stm32mp1: use a common function to check spinlock is available
To use spinlocks, MMU should be enabled, as well as data cache. A common function is created (moved from clock file). It is then used whenever a spinlock has to be taken, in BSEC and clock drivers.
Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| b2182cde | 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: check if the SoC is single core
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM3
stm32mp1: check if the SoC is single core
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM32MP151A or STM32MP151C, then the chip has a single Cortex-A7.
Change-Id: Icac2015c5d03ce0bcb8e99bbaf1ec8ada34be49c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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| 10e7a9e9 | 13-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: print information about board
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb0483436
stm32mp1: print information about board
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb048343680faac8dc577b75c67ac106f5b Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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