1 /* 2 * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved 3 * Copyright (c) 2018-2019, Linaro Limited 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef STM32MP_COMMON_H 9 #define STM32MP_COMMON_H 10 11 #include <stdbool.h> 12 13 #include <arch_helpers.h> 14 15 /* Functions to save and get boot context address given by ROM code */ 16 void stm32mp_save_boot_ctx_address(uintptr_t address); 17 uintptr_t stm32mp_get_boot_ctx_address(void); 18 19 bool stm32mp_is_single_core(void); 20 21 /* Return the base address of the DDR controller */ 22 uintptr_t stm32mp_ddrctrl_base(void); 23 24 /* Return the base address of the DDR PHY */ 25 uintptr_t stm32mp_ddrphyc_base(void); 26 27 /* Return the base address of the PWR peripheral */ 28 uintptr_t stm32mp_pwr_base(void); 29 30 /* Return the base address of the RCC peripheral */ 31 uintptr_t stm32mp_rcc_base(void); 32 33 /* Get IWDG platform instance ID from peripheral IO memory base address */ 34 uint32_t stm32_iwdg_get_instance(uintptr_t base); 35 36 /* Return bitflag mask for expected IWDG configuration from OTP content */ 37 uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst); 38 39 #if defined(IMAGE_BL2) 40 /* Update OTP shadow registers with IWDG configuration from device tree */ 41 uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags); 42 #endif 43 44 /* 45 * Platform util functions for the GPIO driver 46 * @bank: Target GPIO bank ID as per DT bindings 47 * 48 * Platform shall implement these functions to provide to stm32_gpio 49 * driver the resource reference for a target GPIO bank. That are 50 * memory mapped interface base address, interface offset (see below) 51 * and clock identifier. 52 * 53 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 54 * check DT configuration matches platform implementation of the banks 55 * description. 56 */ 57 uintptr_t stm32_get_gpio_bank_base(unsigned int bank); 58 unsigned long stm32_get_gpio_bank_clock(unsigned int bank); 59 uint32_t stm32_get_gpio_bank_offset(unsigned int bank); 60 61 /* Print CPU information */ 62 void stm32mp_print_cpuinfo(void); 63 64 /* Print board information */ 65 void stm32mp_print_boardinfo(void); 66 67 /* 68 * Util for clock gating and to get clock rate for stm32 and platform drivers 69 * @id: Target clock ID, ID used in clock DT bindings 70 */ 71 bool stm32mp_clk_is_enabled(unsigned long id); 72 void stm32mp_clk_enable(unsigned long id); 73 void stm32mp_clk_disable(unsigned long id); 74 unsigned long stm32mp_clk_get_rate(unsigned long id); 75 76 /* Initialise the IO layer and register platform IO devices */ 77 void stm32mp_io_setup(void); 78 79 static inline uint64_t arm_cnt_us2cnt(uint32_t us) 80 { 81 return ((uint64_t)us * (uint64_t)read_cntfrq()) / 1000000ULL; 82 } 83 84 static inline uint64_t timeout_init_us(uint32_t us) 85 { 86 return read_cntpct_el0() + arm_cnt_us2cnt(us); 87 } 88 89 static inline bool timeout_elapsed(uint64_t expire) 90 { 91 return read_cntpct_el0() > expire; 92 } 93 94 #endif /* STM32MP_COMMON_H */ 95