1 /* 2 * Copyright (c) 2020, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <common/debug.h> 9 #include <common/fdt_wrappers.h> 10 #include <fconf_hw_config_getter.h> 11 #include <libfdt.h> 12 #include <plat/common/platform.h> 13 14 struct gicv3_config_t gicv3_config; 15 struct hw_topology_t soc_topology; 16 17 int fconf_populate_gicv3_config(uintptr_t config) 18 { 19 int err; 20 int node; 21 uint32_t addr[20]; 22 23 /* Necessary to work with libfdt APIs */ 24 const void *hw_config_dtb = (const void *)config; 25 26 /* 27 * Find the offset of the node containing "arm,gic-v3" compatible property. 28 * Populating fconf strucutures dynamically is not supported for legacy 29 * systems which use GICv2 IP. Simply skip extracting GIC properties. 30 */ 31 node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,gic-v3"); 32 if (node < 0) { 33 WARN("FCONF: Unable to locate node with arm,gic-v3 compatible property\n"); 34 return 0; 35 } 36 /* Read the reg cell holding base address of GIC controller modules 37 A sample reg cell array is shown here: 38 reg = <0x0 0x2f000000 0 0x10000>, // GICD 39 <0x0 0x2f100000 0 0x200000>, // GICR 40 <0x0 0x2c000000 0 0x2000>, // GICC 41 <0x0 0x2c010000 0 0x2000>, // GICH 42 <0x0 0x2c02f000 0 0x2000>; // GICV 43 */ 44 45 err = fdt_read_uint32_array(hw_config_dtb, node, "reg", 20, addr); 46 if (err < 0) { 47 ERROR("FCONF: Failed to read reg property of GIC node\n"); 48 } 49 return err; 50 } 51 52 int fconf_populate_topology(uintptr_t config) 53 { 54 int err, node, cluster_node, core_node, thread_node; 55 uint32_t cluster_count = 0, max_cpu_per_cluster = 0, total_cpu_count = 0; 56 uint32_t max_pwr_lvl = 0; 57 58 /* Necessary to work with libfdt APIs */ 59 const void *hw_config_dtb = (const void *)config; 60 61 /* Find the offset of the node containing "arm,psci-1.0" compatible property */ 62 node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,psci-1.0"); 63 if (node < 0) { 64 ERROR("FCONF: Unable to locate node with arm,psci-1.0 compatible property\n"); 65 return node; 66 } 67 68 err = fdt_read_uint32(hw_config_dtb, node, "max-pwr-lvl", &max_pwr_lvl); 69 if (err < 0) { 70 /* 71 * Some legacy FVP dts may not have this property. Assign the default 72 * value. 73 */ 74 WARN("FCONF: Could not locate max-pwr-lvl property\n"); 75 max_pwr_lvl = 2; 76 } 77 78 assert(max_pwr_lvl <= MPIDR_AFFLVL2); 79 80 /* Find the offset of the "cpus" node */ 81 node = fdt_path_offset(hw_config_dtb, "/cpus"); 82 if (node < 0) { 83 ERROR("FCONF: Node '%s' not found in hardware configuration dtb\n", "cpus"); 84 return node; 85 } 86 87 /* A typical cpu-map node in a device tree is shown here for reference 88 cpu-map { 89 cluster0 { 90 core0 { 91 cpu = <&CPU0>; 92 }; 93 core1 { 94 cpu = <&CPU1>; 95 }; 96 }; 97 98 cluster1 { 99 core0 { 100 cpu = <&CPU2>; 101 }; 102 core1 { 103 cpu = <&CPU3>; 104 }; 105 }; 106 }; 107 */ 108 109 /* Locate the cpu-map child node */ 110 node = fdt_subnode_offset(hw_config_dtb, node, "cpu-map"); 111 if (node < 0) { 112 ERROR("FCONF: Node '%s' not found in hardware configuration dtb\n", "cpu-map"); 113 return node; 114 } 115 116 uint32_t cpus_per_cluster[PLAT_ARM_CLUSTER_COUNT] = {0}; 117 118 /* Iterate through cluster nodes */ 119 fdt_for_each_subnode(cluster_node, hw_config_dtb, node) { 120 assert(cluster_count < PLAT_ARM_CLUSTER_COUNT); 121 122 /* Iterate through core nodes */ 123 fdt_for_each_subnode(core_node, hw_config_dtb, cluster_node) { 124 /* core nodes may have child nodes i.e., "thread" nodes */ 125 if (fdt_first_subnode(hw_config_dtb, core_node) < 0) { 126 cpus_per_cluster[cluster_count]++; 127 } else { 128 /* Multi-threaded CPU description is found in dtb */ 129 fdt_for_each_subnode(thread_node, hw_config_dtb, core_node) { 130 cpus_per_cluster[cluster_count]++; 131 } 132 133 /* Since in some dtbs, core nodes may not have thread node, 134 * no need to error if even one child node is not found. 135 */ 136 } 137 } 138 139 /* Ensure every cluster node has at least 1 child node */ 140 if (cpus_per_cluster[cluster_count] < 1U) { 141 ERROR("FCONF: Unable to locate the core node in cluster %d\n", cluster_count); 142 return -1; 143 } 144 145 INFO("CLUSTER ID: %d cpu-count: %d\n", cluster_count, cpus_per_cluster[cluster_count]); 146 147 /* Find the maximum number of cpus in any cluster */ 148 max_cpu_per_cluster = MAX(max_cpu_per_cluster, cpus_per_cluster[cluster_count]); 149 total_cpu_count += cpus_per_cluster[cluster_count]; 150 cluster_count++; 151 } 152 153 154 /* At least one cluster node is expected in hardware configuration dtb */ 155 if (cluster_count < 1U) { 156 ERROR("FCONF: Unable to locate the cluster node in cpu-map node\n"); 157 return -1; 158 } 159 160 soc_topology.plat_max_pwr_level = max_pwr_lvl; 161 soc_topology.plat_cluster_count = cluster_count; 162 soc_topology.cluster_cpu_count = max_cpu_per_cluster; 163 soc_topology.plat_cpu_count = total_cpu_count; 164 165 return 0; 166 } 167 168 FCONF_REGISTER_POPULATOR(HW_CONFIG, gicv3_config, fconf_populate_gicv3_config); 169 FCONF_REGISTER_POPULATOR(HW_CONFIG, topology, fconf_populate_topology); 170