| c411396e | 23-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: mhu: Move to drivers/ folder
Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| 14928b88 | 23-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: scmi: Move to drivers/ folder
Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| bd9344f6 | 25-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Sanitise includes
Use full include paths like it is done for common includes.
This cleanup was started in commit d40e0e08283a ("Sanitise includes
across codebase"), but it only cleaned co
plat/arm: Sanitise includes
Use full include paths like it is done for common includes.
This cleanup was started in commit d40e0e08283a ("Sanitise includes
across codebase"), but it only cleaned common files and drivers. This
patch does the same to Arm platforms.
Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 7ca572d9 | 25-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1761 from satheesbalya-arm/sb1/sb1_2661_bl31_overlay
plat/arm: Save BL2 descriptors to reserved memory. |
| 6eee5864 | 25-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1777 from glneo/runtime-gicr
ti: k3: common: Add support for runtime detection of GICR base address |
| e4e97f1d | 23-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Helper function to read ID_AFR0_EL1 system register
This patch provides helper function to read the ID_AFR0_EL1
system register for platforms.
Change-Id: Id5491b18e3bf9f619d98d6cc8efd9d2cf5918c9d
S
Helper function to read ID_AFR0_EL1 system register
This patch provides helper function to read the ID_AFR0_EL1
system register for platforms.
Change-Id: Id5491b18e3bf9f619d98d6cc8efd9d2cf5918c9d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 5b8d50e4 | 15-Nov-2018 |
Sathees Balya <sathees.balya@arm.com> |
plat/arm: Save BL2 descriptors to reserved memory.
On ARM platforms, the BL2 memory can be overlaid by BL31/BL32. The memory
descriptors describing the list of executable images are created in BL2
R
plat/arm: Save BL2 descriptors to reserved memory.
On ARM platforms, the BL2 memory can be overlaid by BL31/BL32. The memory
descriptors describing the list of executable images are created in BL2
R/W memory, which could be possibly corrupted later on by BL31/BL32 due
to overlay. This patch creates a reserved location in SRAM for these
descriptors and are copied over by BL2 before handing over to next BL
image.
Also this patch increases the PLAT_ARM_MAX_BL2_SIZE for juno when TBBR
is enabled.
Fixes ARM-Software/tf-issues#626
Change-Id: I755735706fa702024b4032f51ed4895b3687377f
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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|
| b5443284 | 22-Jan-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Add support for runtime detection of GICR base address
Valid addresses for GICR base are always a set calculable distance from
the GICD and is based on the number of cores a given in
ti: k3: common: Add support for runtime detection of GICR base address
Valid addresses for GICR base are always a set calculable distance from
the GICD and is based on the number of cores a given instance of GICv3 IP
can support. The formula for the number of address bits is given by the
ARM GIC-500 TRM section 3.2 as 2^(18+log2(cores)) with the MSB set to
one for GICR instances. Holes in the GIC address space are also
guaranteed to safely return 0 on reads. This allows us to support runtime
detection of the GICR base address by starting from GIC base address plus
BIT(18) and walking until the GICR ID register (IIDR) is detected. We
stop searching after BIT(20) to prevent searching out into space if
something goes wrong. This can be extended out if we ever have a device
with 16 or more cores.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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|
| 8855e52e | 21-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Rename SPM_DEPRECATED flag to SPM_MM
The SPM implementation based on MM is going to be kept for the
foreseeable future.
Change-Id: I11e96778a4f52a1aa803e7e048d9a7cb24a53954
Signed-off-by: Anto
SPM: Rename SPM_DEPRECATED flag to SPM_MM
The SPM implementation based on MM is going to be kept for the
foreseeable future.
Change-Id: I11e96778a4f52a1aa803e7e048d9a7cb24a53954
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
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| 88ef0425 | 17-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: add BSEC driver
The BSEC (Boot and Security and OTP control) is intended to control an OTP
(one time programmable) fuse box, used for on-chip non-volatile storage
for device configuration
stm32mp1: add BSEC driver
The BSEC (Boot and Security and OTP control) is intended to control an OTP
(one time programmable) fuse box, used for on-chip non-volatile storage
for device configuration and security parameters.
Change-Id: I38c44684c7b9c6a1f24ec0ae3fe99cec481d5a51
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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|
| 1fc2130c | 17-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: update device tree and gpio functions
Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank
stm32mp1: update device tree and gpio functions
Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank helper functions.
Use only one status field in dt_node_info structure including both status
and secure status.
Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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|
| 4156d4da | 17-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
drivers: st: update drivers code
Reword some traces.
Use uintptr_t where required.
Reduce scope of variables.
Improve io_stm32image algo.
Complete some IP registers definitions.
Add failure on suppo
drivers: st: update drivers code
Reword some traces.
Use uintptr_t where required.
Reduce scope of variables.
Improve io_stm32image algo.
Complete some IP registers definitions.
Add failure on supported DDR (stm32mp1_ddr_init()).
Fix cache flush on cache disable (stm32mp1_ddr_setup).
Change-Id: Ie02fa71e02b9d69abc807fd5b7df233e5be6668c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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|
| 077f6828 | 17-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
drivers: st: pmic: update stpmic1 driver
Change-Id: I4a1b281925e0a3a1e2a34b3e363537e4a7f13823
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
drivers: st: pmic: update stpmic1 driver
Change-Id: I4a1b281925e0a3a1e2a34b3e363537e4a7f13823
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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|
| c948f771 | 17-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: update device tree files
The drivers are also updated to reflect the changes.
Set RCC as non-secure.
Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b
Signed-off-by: Yann Gautier <yann
stm32mp1: update device tree files
The drivers are also updated to reflect the changes.
Set RCC as non-secure.
Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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|
| 23684d0e | 16-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: rename stpmu1 to stpmic1
This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.
Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <
stm32mp1: rename stpmu1 to stpmic1
This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.
Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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|
| cd1f39b4 | 16-Jan-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1738 from ardbiesheuvel/synquacer-spm
synquacer: add SPM support |
| edcb50ab | 16-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1757 from antonio-nino-diaz-arm/an/includes
Move BL1 and BL2 private defines to bl_common.h |
| 234bc7f8 | 15-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix header dependencies
From now on, platform_def.h must include any header with definitions that
are platform-specific (like arm_def.h) and the included headers mustn't
include back platf
plat/arm: Fix header dependencies
From now on, platform_def.h must include any header with definitions that
are platform-specific (like arm_def.h) and the included headers mustn't
include back platform_def.h, and shouldn't be used by other files. Only
platform_def.h should be included in other files. This will ensure that all
needed definitions are present, rather than needing to include all the
headers in all the definitions' headers just in case.
This also prevents problems like cyclic dependencies.
Change-Id: I9d3cf4d1de4b956fa035c79545222697acdaf5ca
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| c9f9d9ea | 18-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Move BL1 and BL2 private defines to bl_common.h
The definitions in bl1/bl1_private.h and bl2/bl2_private.h are useful for
platforms that may need to access them.
Change-Id: Ifd1880f855ddafcb3bfcaf1
Move BL1 and BL2 private defines to bl_common.h
The definitions in bl1/bl1_private.h and bl2/bl2_private.h are useful for
platforms that may need to access them.
Change-Id: Ifd1880f855ddafcb3bfcaf1ed4a4e0f121eda174
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| 2559b2c8 | 11-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat v2: Dynamically detect need for CnP bit
ARMv8.2-TTCNP is mandatory from ARMv8.2 onwards, but it can be implemented
in CPUs that don't implement all mandatory 8.2 features (and so have to
claim
xlat v2: Dynamically detect need for CnP bit
ARMv8.2-TTCNP is mandatory from ARMv8.2 onwards, but it can be implemented
in CPUs that don't implement all mandatory 8.2 features (and so have to
claim to be a lower version).
This patch removes usage of the ARM_ARCH_AT_LEAST() macro and uses system
ID registers to detect whether it is needed to set the bit or not.
Change-Id: I7bcbf0c7c937590dfc2ca668cfd9267c50f7d52c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| 0560efb9 | 29-Dec-2018 |
Ard Biesheuvel <ard.biesheuvel@linaro.org> |
services/spm_deprecated: update ARM platform specific asserts
Update some asserts that refer to #defines that only occur in
ARM platforms, preventing this code to be used on other platforms.
Instead
services/spm_deprecated: update ARM platform specific asserts
Update some asserts that refer to #defines that only occur in
ARM platforms, preventing this code to be used on other platforms.
Instead, use a platform agnostic name, and update all the existing
users.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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|
| c8719032 | 08-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1740 from soby-mathew/sm/restrict_pie_to_fvp
plat/arm: Restrict PIE support to FVP |
| d4580d17 | 07-Jan-2019 |
Soby Mathew <soby.mathew@arm.com> |
plat/arm: Restrict PIE support to FVP
The patch SHA 55cf015c enabled PIE support when RESET_TO_BL31=1 for
all ARM platforms. But it seems n1sdp platform doesn't work with PIE
support yet. Hence rest
plat/arm: Restrict PIE support to FVP
The patch SHA 55cf015c enabled PIE support when RESET_TO_BL31=1 for
all ARM platforms. But it seems n1sdp platform doesn't work with PIE
support yet. Hence restrict the ENABLE_PIE=1 to fvp platform.
Change-Id: If44e42528e4b0b57c69084503f346576fe0748bd
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 6e6ab282 | 07-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: do not include platform header files directly in drivers
Instead, only platform_def.h is included.
The required files to be included are added in stm32mp1_def.h.
Signed-off-by: Yann Gauti
stm32mp1: do not include platform header files directly in drivers
Instead, only platform_def.h is included.
The required files to be included are added in stm32mp1_def.h.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 09d40e0e | 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|