| 08fc380a | 17-Jun-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "st-nand-backup-fwu" into integration
* changes: refactor(st): rename plat_set_image_source feat(st): add FWU with boot from NAND feat(st): manage backup partitions fo
Merge changes from topic "st-nand-backup-fwu" into integration
* changes: refactor(st): rename plat_set_image_source feat(st): add FWU with boot from NAND feat(st): manage backup partitions for NAND devices feat(bl): add plat handler for image loading refactor(bl)!: remove unused plat_try_next_boot_source
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| a03dafe5 | 10-Apr-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(bl): add plat handler for image loading
In case of load error, platform may need to try another instance, either from another storage, or from the same storage in case of PSA FWU. On MTD device
feat(bl): add plat handler for image loading
In case of load error, platform may need to try another instance, either from another storage, or from the same storage in case of PSA FWU. On MTD devices such as NAND, it is required to define backup partitions. A new function plat_setup_try_img_ops() should be called by platform code to register handlers (plat_try_images_ops) to manage loading other images.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Change-Id: Ideaecaf296c0037a26fb4e6680f33e507111378a
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| 2c303e39 | 05-Feb-2024 |
Yann Gautier <yann.gautier@st.com> |
refactor(bl)!: remove unused plat_try_next_boot_source
The plat_try_next_boot_source() API is not used by any upstream platform and not used by platforms that asked for this API. It is then removed.
refactor(bl)!: remove unused plat_try_next_boot_source
The plat_try_next_boot_source() API is not used by any upstream platform and not used by platforms that asked for this API. It is then removed. It will be replaced with a more generic interface in next patch.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I298c7acace8c5efb3c66422d8d9280ecd08e5ade
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| 19228752 | 11-Jun-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
fix(spm-mm): carve out NS buffer TZC400 region
SPM-MM defines AP TZC-400 regions as such:
1: 0xff000000 0xffffffff S 2: 0x80000000 0xfeffffff NS 3: 0x880000000 0xfffffffff NS 4: 0xff600000
fix(spm-mm): carve out NS buffer TZC400 region
SPM-MM defines AP TZC-400 regions as such:
1: 0xff000000 0xffffffff S 2: 0x80000000 0xfeffffff NS 3: 0x880000000 0xfffffffff NS 4: 0xff600000 0xff60ffff NS
Region 4 (using filter 0) defines the SPM NS shared buffer between normal world and secure world. However region 4 overlaps with region 1 (using filter 0) defined as secure. It is forbidden to define overlapping regions beyond region 0 for the same filter. This is reported as a violation in the TZC-400 controller.
With FVP models < 11.25 the error is latent but not reported to the PE (reason for this behavior is unclear). With greater FVP model version the error is reported as an asynchronous external abort (SError exception).
By carving out the SPM NS shared region (with regions as defined below), the violation is no longer reported and test passed with recent FVP models:
1: 0x80000000 0xfeffffff NS 2: 0xff000000 0xff5fffff S 3: 0xff600000 0xff60ffff NS 4: 0xff610000 0xffffffff S 5: 0x880000000 0xfffffffff NS
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: Idc3370803ad204ac29efeded77305e52e17cc1c1
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| 0a1df641 | 04-Jun-2024 |
rutigl <rutigl@gmail.com> |
fix(nuvoton): fix MMU mapping settings
MAP_DEVICE0 for internal (register) space access settings flag MT_NS was changed to MT_SECURE to enable access to the TSGEN register, otherwise it brings to MC
fix(nuvoton): fix MMU mapping settings
MAP_DEVICE0 for internal (register) space access settings flag MT_NS was changed to MT_SECURE to enable access to the TSGEN register, otherwise it brings to MCR violation, because access to the TSGEN register is locked and enabled for secure only
Change-Id: Id2fe90d30342706c58064161360d8be6e0d5616b Signed-off-by: Margarita Glushkin <rutigl@gmail.com>
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| e6ae019a | 25-Apr-2024 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(plat): add platform API that gets cluster ID
This patch adds an API(plat_cluster_id_by_mpidr) that retrieves the cluster ID by looking at the MPIDR_EL1 for platforms that have ARM_PLAT_MT set
feat(plat): add platform API that gets cluster ID
This patch adds an API(plat_cluster_id_by_mpidr) that retrieves the cluster ID by looking at the MPIDR_EL1 for platforms that have ARM_PLAT_MT set
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I0266f2e49a3114d169a7708d7ddbd4f6229a7a41
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| a97e1f97 | 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "early_console" into integration
* changes: feat(stm32mp2): use early traces feat(st-bsec): use early traces refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CON
Merge changes from topic "early_console" into integration
* changes: feat(stm32mp2): use early traces feat(st-bsec): use early traces refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE feat(console): introduce EARLY_CONSOLE feat(bl32): create an sp_min_setup function
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| 0a9c244b | 29-Jan-2024 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
fix(psci): mask the Last in Level nibble in StateId
In the ARM recommended StateID Encoding, the index for the power level where the calling core is last to go idle use the last niblle of the StateI
fix(psci): mask the Last in Level nibble in StateId
In the ARM recommended StateID Encoding, the index for the power level where the calling core is last to go idle use the last niblle of the StateId.
Even if this nibble is necessary for OS-initiated mode, it can be used by caller even when this OSI mode is not used.
In arm_validate_power_state() function, the StateId is compared with content of arm_pm_idle_states[] build with the arm_make_pwrstate_lvl2 macro, without Last in Level information. So it is safe to mask this nibble for ARM platform in all the cases, and that avoids issues with caller with use the same StateId encoding with OSI mode activated or not (in tftf tests for example, the input(power state) parameter = (0x40001022) and the associated power state is 0x40000022).
Change-Id: I45e8e2b8f526fb61b94cf134d7d4aa3bac4c215d Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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| f7679d43 | 15-Apr-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move pmf to vendor el3 calls
Move pmf support to vendor-specific EL3 Monitor Service Calls. Remove pmf call count as it's not supported in vendor-specific el3 as per SMCCC Documenta
refactor(smccc): move pmf to vendor el3 calls
Move pmf support to vendor-specific EL3 Monitor Service Calls. Remove pmf call count as it's not supported in vendor-specific el3 as per SMCCC Documentation 1.5: https://developer.arm.com/documentation/den0028/latest
Add a deprecation notice to inform PMF is moved from arm-sip range to vendor-specific EL3 range. PMF support from arm-sip range will be removed and will not available after TF-A 2.12 release.
Change-Id: Ie1e14aa601d4fc3db352cd5621d842017a18e9ec Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 273b8983 | 07-Mar-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subrange
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subranges of Function identifiers to different services are:
0x87000000-0x8700FFFF-SMC32: Vendor-Specific EL3 Monitor Service Calls 0xC7000000-0xC700FFFF-SMC64: Vendor-Specific EL3 Monitor Service Calls
Amend Debugfs FID's to use this range and id.
Add a deprecation notice to inform debugfs moved from arm-sip range to Vendor-Specific EL3 range. Debugfs support from arm-sip range will be removed and will not be available after TF-A 2.12 release.
Reference to debugfs component level documentation: https://trustedfirmware-a.readthedocs.io/en/latest/components/debugfs-design.html#overview
Change-Id: I97a50170178f361f70c95ed0049bc4e278de59d7 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| db2b34d1 | 29-Apr-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(tc): remove timer interrupt from G1S" into integration |
| 9c11ed7e | 22-Dec-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): support FW handoff b/w BL1 & BL2
Leverage the framework between BL1 and BL2. Migrate all handoff structures to the TL.
Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb Signed-off-by:
feat(arm): support FW handoff b/w BL1 & BL2
Leverage the framework between BL1 and BL2. Migrate all handoff structures to the TL.
Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 6a4da290 | 04-Jan-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
refactor(bl1): clean up bl2 layout calculation
Layout calculation is spread out between core BL1 logic and common platform code. Relocate these into common platform code so they are organised logica
refactor(bl1): clean up bl2 layout calculation
Layout calculation is spread out between core BL1 logic and common platform code. Relocate these into common platform code so they are organised logically.
Change-Id: I8b05403e41b800957a0367316cecd373d10bb1a4 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| a5566f65 | 01-Dec-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): support FW handoff b/w BL2 & BL31
Add support for the firmware handoff framework between BL2 and BL31. Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes in recent m
feat(arm): support FW handoff b/w BL2 & BL31
Add support for the firmware handoff framework between BL2 and BL31. Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes in recent models. Load the HW_CONFIG as a TE along with entry point parameters for BL31 execution.
Change-Id: I7c4c6e8353ca978a13520fb3e15fb2803f0f1d0e Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| ae770fed | 16-Jan-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(console): introduce EARLY_CONSOLE
This is a generic porting of what was done on ST platforms with flag STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for plat_setup_early_console(
feat(console): introduce EARLY_CONSOLE
This is a generic porting of what was done on ST platforms with flag STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for plat_setup_early_console(). This function depends on platform implementation. This function call is added at the beginning of each BL image early setup function. The patch also introduce an extra log macro: EARLY_ERROR. This can replace ERROR macro in code that will only be executed before the default console is enabled, and will do nothing when the EARLY_CONSOLE is not enabled. This can then save some space in memory.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I77bf0a0c4289b4c7df94e4bfb783a938e05bf023
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| 9bf31a59 | 28-Feb-2024 |
Jackson Cooper-Driver <jackson.cooper-driver@arm.com> |
fix(tc): remove timer interrupt from G1S
TC3 and TC4 SCP makes use of the system timer interrupt as its own timer. Previously, this timer was marked as a G1S interrupt which routes the interrupt to
fix(tc): remove timer interrupt from G1S
TC3 and TC4 SCP makes use of the system timer interrupt as its own timer. Previously, this timer was marked as a G1S interrupt which routes the interrupt to the secure world and also enables it. This causes spurious interrupts once the SCP has unmasked the interrupt in the timer control itself.
Note that we move the inclusion of the timer interrupt from CSS_G1S_INT_PROPS to CSS_G1S_IRQ_PROPS as the former is only used by TC. This will also result in removing the timer interrupt from TC2. This is not an issue as it does not make use of this interrupt in either the SCP or AP.
Change-Id: I5cc88e2adffbc93fc3c9d9d41b5ba7235dbc39d9 Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com> Signed-off-by: Leo Yan <leo.yan@arm.com>
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| 3b48ca17 | 06-Feb-2024 |
Chris Kay <chris.kay@arm.com> |
fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
The `arm_bl2_dyn_cfg_init` function is intended exclusively for BL2 - it should not be compiled for any other bootloader image. This change hides
fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
The `arm_bl2_dyn_cfg_init` function is intended exclusively for BL2 - it should not be compiled for any other bootloader image. This change hides it for all but BL2.
Change-Id: I9fa95094dcc30f9fa4cc7bc5b3119ceae82df1ea Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 67ff4f56 | 28-Mar-2024 |
Leo Yan <leo.yan@arm.com> |
refactor(arm): remove unused SP_MIN UART macros
Currently, tf-a has been refactored to support the multi UARTs (boot and runtime UARTs). As a result, the SP_MIN UART related code has been removed, a
refactor(arm): remove unused SP_MIN UART macros
Currently, tf-a has been refactored to support the multi UARTs (boot and runtime UARTs). As a result, the SP_MIN UART related code has been removed, and the macros are no longer used.
Therefore, this patch removes these unused UART macros.
Change-Id: I496349f876ba918fcafa7ed6c65d149914762290 Signed-off-by: Leo Yan <leo.yan@arm.com>
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| fe8cc55a | 26-Mar-2024 |
rutigl@gmail.com <rutigl@gmail.com> |
fix(nuvoton): prevent changing clock frequency
prevent changing clock frequency already set in BootBlock based on PLL value
Change-Id: I8b4b53448cc8e703fd88ad6166f85a4fe3ba9e46 Signed-off-by: Marga
fix(nuvoton): prevent changing clock frequency
prevent changing clock frequency already set in BootBlock based on PLL value
Change-Id: I8b4b53448cc8e703fd88ad6166f85a4fe3ba9e46 Signed-off-by: Margarita Glushkin <rutigl@gmail.com>
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| ae2b4a54 | 19-Feb-2024 |
rutigl@gmail.com <rutigl@gmail.com> |
fix(nuvoton): gfx frame buffer memory corruption during secondary boot
gfx frame buffer memory corruption because of moving TF-A to DDR
Change-Id: I6f1e0c8d048273b8047497adec631160aaf393d6 Signed-o
fix(nuvoton): gfx frame buffer memory corruption during secondary boot
gfx frame buffer memory corruption because of moving TF-A to DDR
Change-Id: I6f1e0c8d048273b8047497adec631160aaf393d6 Signed-off-by: Margarita Glushkin <rutigl@gmail.com>
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| e7d14fa8 | 07-Mar-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "DPE" into integration
* changes: feat(tc): group components into certificates feat(dice): add cert_id argument to dpe_derive_context() refactor(sds): modify log level
Merge changes from topic "DPE" into integration
* changes: feat(tc): group components into certificates feat(dice): add cert_id argument to dpe_derive_context() refactor(sds): modify log level for region validity feat(tc): add dummy TRNG support to be able to boot pVMs feat(tc): get the parent component provided DPE context_handle feat(tc): share DPE context handle with child component feat(tc): add DPE context handle node to device tree feat(tc): add DPE backend to the measured boot framework feat(auth): add explicit entries for key OIDs feat(dice): add DPE driver to measured boot feat(dice): add client API for DICE Protection Environment feat(dice): add QCBOR library as a dependency of DPE feat(dice): add typedefs from the Open DICE repo docs(changelog): add 'dice' scope refactor(tc): align image identifier string macros refactor(fvp): align image identifier string macros refactor(imx8m): align image identifier string macros refactor(qemu): align image identifier string macros fix(measured-boot): add missing image identifier string refactor(measured-boot): move metadata size macros to a common header refactor(measured-boot): move image identifier strings to a common header
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| 7b02a572 | 06-Mar-2024 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "fix(gic600): workaround for Part 1 of GIC600 erratum 2384374" into integration |
| 24a4a0a5 | 05-Feb-2024 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
fix(gic600): workaround for Part 1 of GIC600 erratum 2384374
GIC600 erratum 2384374 is a Category B erratum. Part 1 is fixed in this patch, and the Part 1 failure mode is described as 'If the packet
fix(gic600): workaround for Part 1 of GIC600 erratum 2384374
GIC600 erratum 2384374 is a Category B erratum. Part 1 is fixed in this patch, and the Part 1 failure mode is described as 'If the packet to be sent is a SET packet, then a higher priority SET may not be sent when it should be until an unblocking event occurs.'
This is handled by calling gicv3_apply_errata_wa_2384374() in the ehf_deactivate_priority() path, so that when EHF restores the priority to the original priority, the interrupt packet buffered in the GIC can be sent.
gicv3_apply_errata_wa_2384374() is the workaround for the Part 2 of erratum 2384374 which flush packets from the GIC buffer and is being used in this patch.
SDEN can be found here: https://developer.arm.com/documentation/sden892601/latest/
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I4bb6dcf86c94125cbc574e0dc5119abe43e84731
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| 1f47a713 | 12-Jun-2023 |
Tamas Ban <tamas.ban@arm.com> |
feat(tc): add DPE context handle node to device tree
Child software components are inheriting their first valid DPE context handle from their parent components (who loaded and measured them). The co
feat(tc): add DPE context handle node to device tree
Child software components are inheriting their first valid DPE context handle from their parent components (who loaded and measured them). The context handle is shared through the device tree object the following way: - BL1 -> BL2 via TB_FW_CONFIG - BL2 -> BL33 via NT_FW_CONFIG
Signed-off-by: Tamas Ban <tamas.ban@arm.com> Change-Id: I9bf7808fb13a310ad7ca1895674a0c7e6725e08b
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| e7f1181f | 07-Jun-2023 |
Tamas Ban <tamas.ban@arm.com> |
feat(tc): add DPE backend to the measured boot framework
The client platform relies on the DICE attestation scheme. RSS provides the DICE Protection Environment (DPE) service. TF-A measured boot fra
feat(tc): add DPE backend to the measured boot framework
The client platform relies on the DICE attestation scheme. RSS provides the DICE Protection Environment (DPE) service. TF-A measured boot framework supports multiple backends. A given platform always enables the corresponding backend which is required by the attestation scheme.
Signed-off-by: Tamas Ban <tamas.ban@arm.com> Change-Id: Idc3360d0d7216e4859e99b5db3d377407e0aeee5
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