refactor(st-pmic): improve driver usage

Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in d

refactor(st-pmic): improve driver usage

Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in dt_get_pmic_node() as local static variables.

Change-Id: I4585e9dfdde2847a369bffcc6f2b39ecc2b74de1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@

refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id:

feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(stm32_gpio): add a function to reset a pin

Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_se

feat(stm32_gpio): add a function to reset a pin

Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e

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Merge "feat(stm32mp1): preserve the PLL4 settings for USB boot" into integration

feat(drivers/st/uart): add uart driver for STM32MP1

Add a UART/USART driver for STM32 with complete a hardware support;
it used for STM32CubeProgrammer support with even parity.

This driver is not

feat(drivers/st/uart): add uart driver for STM32MP1

Add a UART/USART driver for STM32 with complete a hardware support;
it used for STM32CubeProgrammer support with even parity.

This driver is not used for console, which is already handle
by a simple driver (drivers/st/uart/aarch32/stm32_console.S).

Change-Id: Ia9266e5d177fe7fd09c8a15b81da1a05b1bc8b2d
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(stm32mp1): preserve the PLL4 settings for USB boot

The PLL4 can be used by ROM code as the source clock of USB PHYC and,
in this case, the PLL4 configuration must be preserved
with pll4_preserv

feat(stm32mp1): preserve the PLL4 settings for USB boot

The PLL4 can be used by ROM code as the source clock of USB PHYC and,
in this case, the PLL4 configuration must be preserved
with pll4_preserve to avoid USB disturbance.

This patch also adds an error when the clock tree PLL4 configuration
is not the PLL4 configuration used by ROM code; this error allows to
detect a invalid clock tree.

This commit corrects the coverity issue 343023.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I4bae9312a2db8dd342a38e649513d689b13976bb

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fix: use correct printf format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pande

fix: use correct printf format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic6811cc1788c698adde0807e5f8ab5290a900a26

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feat(drivers/st/usb): add device driver for STM32MP1

Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.

Signed-off-by: Patrick Delauna

feat(drivers/st/usb): add device driver for STM32MP1

Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I90b21f094f6637b85f3ace23a3a3a2f6fd4e0951

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Merge changes from topic "st_dt_match_instance" into integration

* changes:
refactor(stm32_sdmmc2): use DT helpers
feat(plat/st): create new helper for DT access

fix(stpmic1): fix power switches activation

Add enable bit mask description because power switches
are not all enabled by bit 0.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: If7c9ae7

fix(stpmic1): fix power switches activation

Add enable bit mask description because power switches
are not all enabled by bit 0.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: If7c9ae7d800adee8e25416ca35db1be20452741f

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fix(stpmic1): update error cases return

Use errno values, or the return of called functions, instead of -1.
Correct some MISRA issues, like braces.

Change-Id: If7b53de5cbfb4d2c9979bce0e594dd92bf07a

fix(stpmic1): update error cases return

Use errno values, or the return of called functions, instead of -1.
Correct some MISRA issues, like braces.

Change-Id: If7b53de5cbfb4d2c9979bce0e594dd92bf07a77a
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(stm32mp1_clk): keep RTC clock always on

On battery powered systems the RTC keeps the date/time across
system reboot.
The RTC clock should not be disabled otherwise the date/time
counter gets sto

fix(stm32mp1_clk): keep RTC clock always on

On battery powered systems the RTC keeps the date/time across
system reboot.
The RTC clock should not be disabled otherwise the date/time
counter gets stopped.

Tag RTC clock as always on.

Signed-off-by: HE Shushan <shushan.he@st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I6455c3c740d2e5add28255eb84f8ebaf2870d9d8

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refactor(stm32_sdmmc2): use DT helpers

Use dt_match_instance_by_compatible() and dt_fill_device_info()
functions to simplify SDMMC driver code.

Change-Id: Id16aa849ac79a9d3c2dc72c947fe189743856292

refactor(stm32_sdmmc2): use DT helpers

Use dt_match_instance_by_compatible() and dt_fill_device_info()
functions to simplify SDMMC driver code.

Change-Id: Id16aa849ac79a9d3c2dc72c947fe189743856292
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(stm32mp1_clk): set other clocks as always on

AXI, MPU and MCU clocks are always on, put them in the list
in the function clock_is_always_on().

Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3

fix(stm32mp1_clk): set other clocks as always on

AXI, MPU and MCU clocks are always on, put them in the list
in the function clock_is_always_on().

Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3b1
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(stm32mp1_clk): fix MPU clock rate

MPUDIV dividers are stored in a constant array, under bit shifts form.
They must be used in this way by the clock driver.

Change-Id: If758f7a4048eff956067a10a4

fix(stm32mp1_clk): fix MPU clock rate

MPUDIV dividers are stored in a constant array, under bit shifts form.
They must be used in this way by the clock driver.

Change-Id: If758f7a4048eff956067a10a42ab0983a20a000d
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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fix(stm32mp1_clk): fix MCU/AXI parent clock

Correct MCU clock parent selector: MCU subsystem clock is derived
from clock PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is

fix(stm32mp1_clk): fix MCU/AXI parent clock

Correct MCU clock parent selector: MCU subsystem clock is derived
from clock PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is derived
from clock PLL2_P, not PLL2.

This change also renames MCU clock and AXI clock resources to
prevent confusion.

Change-Id: If55618d180e7dce8e4f0977b0e586a6fa8ef28d1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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refactor(stm32mp_clk): keep RCC node offset

To avoid parsing device tree file too often, keep the RCC node
offset value in a variable in fdt_get_rcc_node().

Change-Id: Ibb23ff92247d57c65a23517b8f34

refactor(stm32mp_clk): keep RCC node offset

To avoid parsing device tree file too often, keep the RCC node
offset value in a variable in fdt_get_rcc_node().

Change-Id: Ibb23ff92247d57c65a23517b8f3473f639794d2a
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge "refactor(drivers/st/clk): change fdt_get_rcc_node as static" into integration

refactor(drivers/st/clk): change fdt_get_rcc_node as static

Change the fdt_get_rcc_node function to static, as it is used only in
stm32mp_clkfunc.c file; it is only a cleanup change without function

refactor(drivers/st/clk): change fdt_get_rcc_node as static

Change the fdt_get_rcc_node function to static, as it is used only in
stm32mp_clkfunc.c file; it is only a cleanup change without functional
modification.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ib4ef110f6f1b16dbaa727a065e40275d3cf58a73

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fix(stm32_console): do not skip init for crash console

In BL32, only skip UART initialization if UART enable bit is set.
Due to patch [1], a reset of UART is done in crash console init.
In this case

fix(stm32_console): do not skip init for crash console

In BL32, only skip UART initialization if UART enable bit is set.
Due to patch [1], a reset of UART is done in crash console init.
In this case, UART should then be reconfigured.

[1] 7fa2e96e1 ("stm32mp1: add UART reset in crash console init")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I650d4c387b60dd74b780e6f3adfd629ea44f5834

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refactor(stm32mp1_clk): update RCC registers file

The file is first generated with the peripheral spirit XML file.
And then we add some common definition, to ease driver development.

Change-Id: I4c

refactor(stm32mp1_clk): update RCC registers file

The file is first generated with the peripheral spirit XML file.
And then we add some common definition, to ease driver development.

Change-Id: I4c222cf006caf27cda6da044eaf184ce66bb1442
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(stm32mp1_clk): keep RTCAPB clock always on

Further information such as boot instance are sent over backup
registers. In order to guarantee direct access to backup registers
in uboot, we will kee

fix(stm32mp1_clk): keep RTCAPB clock always on

Further information such as boot instance are sent over backup
registers. In order to guarantee direct access to backup registers
in uboot, we will keep the RTC clock enabled.

Change-Id: I16572d422bfebbf39190a87db8046df486ce91c8
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(stm32mp1_clk): fix RTC clock rating

When RTC clock source is HSE, the RTCDIV is not taken into account.

Change-Id: I1613b638e8932c03f3349adb01e13f5294a3bf5d
Signed-off-by: Gabriel Fernandez <ga

fix(stm32mp1_clk): fix RTC clock rating

When RTC clock source is HSE, the RTCDIV is not taken into account.

Change-Id: I1613b638e8932c03f3349adb01e13f5294a3bf5d
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(stm32mp1_clk): correctly manage RTC clock source

The clksrc value contains the RCC register address and the clock
source number. When applying the clock source, we should filter out
the RCC regi

fix(stm32mp1_clk): correctly manage RTC clock source

The clksrc value contains the RCC register address and the clock
source number. When applying the clock source, we should filter out
the RCC register address from the given value.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4345b03de7b9afd1df78df4131431cf1eb43ec17

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