1 /* 2 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 9 #include <common/debug.h> 10 #include <drivers/delay_timer.h> 11 #include <drivers/st/stm32_i2c.h> 12 #include <drivers/st/stm32mp_pmic.h> 13 #include <drivers/st/stpmic1.h> 14 #include <lib/mmio.h> 15 #include <lib/utils_def.h> 16 #include <libfdt.h> 17 18 #include <platform_def.h> 19 20 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) 21 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2 22 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) 23 #define STPMIC1_LDO3_DDR_SEL 31U 24 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) 25 26 #define STPMIC1_BUCK_OUTPUT_SHIFT 2 27 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) 28 29 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 30 31 static struct i2c_handle_s i2c_handle; 32 static uint32_t pmic_i2c_addr; 33 34 static int dt_get_pmic_node(void *fdt) 35 { 36 return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); 37 } 38 39 int dt_pmic_status(void) 40 { 41 int node; 42 void *fdt; 43 44 if (fdt_get_address(&fdt) == 0) { 45 return -ENOENT; 46 } 47 48 node = dt_get_pmic_node(fdt); 49 if (node <= 0) { 50 return -FDT_ERR_NOTFOUND; 51 } 52 53 return fdt_get_status(node); 54 } 55 56 static bool dt_pmic_is_secure(void) 57 { 58 int status = dt_pmic_status(); 59 60 return (status >= 0) && 61 (status == DT_SECURE) && 62 (i2c_handle.dt_status == DT_SECURE); 63 } 64 65 /* 66 * Get PMIC and its I2C bus configuration from the device tree. 67 * Return 0 on success, negative on error, 1 if no PMIC node is found. 68 */ 69 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info, 70 struct stm32_i2c_init_s *init) 71 { 72 int pmic_node, i2c_node; 73 void *fdt; 74 const fdt32_t *cuint; 75 76 if (fdt_get_address(&fdt) == 0) { 77 return -ENOENT; 78 } 79 80 pmic_node = dt_get_pmic_node(fdt); 81 if (pmic_node < 0) { 82 return 1; 83 } 84 85 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); 86 if (cuint == NULL) { 87 return -FDT_ERR_NOTFOUND; 88 } 89 90 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; 91 if (pmic_i2c_addr > UINT16_MAX) { 92 return -EINVAL; 93 } 94 95 i2c_node = fdt_parent_offset(fdt, pmic_node); 96 if (i2c_node < 0) { 97 return -FDT_ERR_NOTFOUND; 98 } 99 100 dt_fill_device_info(i2c_info, i2c_node); 101 if (i2c_info->base == 0U) { 102 return -FDT_ERR_NOTFOUND; 103 } 104 105 return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init); 106 } 107 108 int dt_pmic_configure_boot_on_regulators(void) 109 { 110 int pmic_node, regulators_node, regulator_node; 111 void *fdt; 112 113 if (fdt_get_address(&fdt) == 0) { 114 return -ENOENT; 115 } 116 117 pmic_node = dt_get_pmic_node(fdt); 118 if (pmic_node < 0) { 119 return -FDT_ERR_NOTFOUND; 120 } 121 122 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); 123 if (regulators_node < 0) { 124 return -ENOENT; 125 } 126 127 fdt_for_each_subnode(regulator_node, fdt, regulators_node) { 128 const fdt32_t *cuint; 129 const char *node_name = fdt_get_name(fdt, regulator_node, NULL); 130 uint16_t voltage; 131 int status; 132 133 #if defined(IMAGE_BL2) 134 if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on", 135 NULL) == NULL) && 136 (fdt_getprop(fdt, regulator_node, "regulator-always-on", 137 NULL) == NULL)) { 138 #else 139 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", 140 NULL) == NULL) { 141 #endif 142 continue; 143 } 144 145 if (fdt_getprop(fdt, regulator_node, "regulator-pull-down", 146 NULL) != NULL) { 147 148 status = stpmic1_regulator_pull_down_set(node_name); 149 if (status != 0) { 150 return status; 151 } 152 } 153 154 if (fdt_getprop(fdt, regulator_node, "st,mask-reset", 155 NULL) != NULL) { 156 157 status = stpmic1_regulator_mask_reset_set(node_name); 158 if (status != 0) { 159 return status; 160 } 161 } 162 163 cuint = fdt_getprop(fdt, regulator_node, 164 "regulator-min-microvolt", NULL); 165 if (cuint == NULL) { 166 continue; 167 } 168 169 /* DT uses microvolts, whereas driver awaits millivolts */ 170 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); 171 172 status = stpmic1_regulator_voltage_set(node_name, voltage); 173 if (status != 0) { 174 return status; 175 } 176 177 if (!stpmic1_is_regulator_enabled(node_name)) { 178 status = stpmic1_regulator_enable(node_name); 179 if (status != 0) { 180 return status; 181 } 182 } 183 } 184 185 return 0; 186 } 187 188 bool initialize_pmic_i2c(void) 189 { 190 int ret; 191 struct dt_node_info i2c_info; 192 struct i2c_handle_s *i2c = &i2c_handle; 193 struct stm32_i2c_init_s i2c_init; 194 195 ret = dt_pmic_i2c_config(&i2c_info, &i2c_init); 196 if (ret < 0) { 197 ERROR("I2C configuration failed %d\n", ret); 198 panic(); 199 } 200 201 if (ret != 0) { 202 return false; 203 } 204 205 /* Initialize PMIC I2C */ 206 i2c->i2c_base_addr = i2c_info.base; 207 i2c->dt_status = i2c_info.status; 208 i2c->clock = i2c_info.clock; 209 i2c->i2c_state = I2C_STATE_RESET; 210 i2c_init.own_address1 = pmic_i2c_addr; 211 i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; 212 i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; 213 i2c_init.own_address2 = 0; 214 i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; 215 i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; 216 i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; 217 i2c_init.analog_filter = 1; 218 i2c_init.digital_filter_coef = 0; 219 220 ret = stm32_i2c_init(i2c, &i2c_init); 221 if (ret != 0) { 222 ERROR("Cannot initialize I2C %x (%d)\n", 223 i2c->i2c_base_addr, ret); 224 panic(); 225 } 226 227 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1, 228 I2C_TIMEOUT_BUSY_MS)) { 229 ERROR("I2C device not ready\n"); 230 panic(); 231 } 232 233 stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr); 234 235 return true; 236 } 237 238 static void register_pmic_shared_peripherals(void) 239 { 240 uintptr_t i2c_base = i2c_handle.i2c_base_addr; 241 242 if (dt_pmic_is_secure()) { 243 stm32mp_register_secure_periph_iomem(i2c_base); 244 } else { 245 if (i2c_base != 0U) { 246 stm32mp_register_non_secure_periph_iomem(i2c_base); 247 } 248 } 249 } 250 251 void initialize_pmic(void) 252 { 253 unsigned long pmic_version; 254 255 if (!initialize_pmic_i2c()) { 256 VERBOSE("No PMIC\n"); 257 return; 258 } 259 260 register_pmic_shared_peripherals(); 261 262 if (stpmic1_get_version(&pmic_version) != 0) { 263 ERROR("Failed to access PMIC\n"); 264 panic(); 265 } 266 267 INFO("PMIC version = 0x%02lx\n", pmic_version); 268 stpmic1_dump_regulators(); 269 270 #if defined(IMAGE_BL2) 271 if (dt_pmic_configure_boot_on_regulators() != 0) { 272 panic(); 273 }; 274 #endif 275 } 276 277 int pmic_ddr_power_init(enum ddr_type ddr_type) 278 { 279 bool buck3_at_1v8 = false; 280 uint8_t read_val; 281 int status; 282 283 switch (ddr_type) { 284 case STM32MP_DDR3: 285 /* Set LDO3 to sync mode */ 286 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 287 if (status != 0) { 288 return status; 289 } 290 291 read_val &= ~STPMIC1_LDO3_MODE; 292 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 293 read_val |= STPMIC1_LDO3_DDR_SEL << 294 STPMIC1_LDO12356_OUTPUT_SHIFT; 295 296 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 297 if (status != 0) { 298 return status; 299 } 300 301 status = stpmic1_regulator_voltage_set("buck2", 1350); 302 if (status != 0) { 303 return status; 304 } 305 306 status = stpmic1_regulator_enable("buck2"); 307 if (status != 0) { 308 return status; 309 } 310 311 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 312 313 status = stpmic1_regulator_enable("vref_ddr"); 314 if (status != 0) { 315 return status; 316 } 317 318 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 319 320 status = stpmic1_regulator_enable("ldo3"); 321 if (status != 0) { 322 return status; 323 } 324 325 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 326 break; 327 328 case STM32MP_LPDDR2: 329 case STM32MP_LPDDR3: 330 /* 331 * Set LDO3 to 1.8V 332 * Set LDO3 to bypass mode if BUCK3 = 1.8V 333 * Set LDO3 to normal mode if BUCK3 != 1.8V 334 */ 335 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); 336 if (status != 0) { 337 return status; 338 } 339 340 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { 341 buck3_at_1v8 = true; 342 } 343 344 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 345 if (status != 0) { 346 return status; 347 } 348 349 read_val &= ~STPMIC1_LDO3_MODE; 350 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 351 read_val |= STPMIC1_LDO3_1800000; 352 if (buck3_at_1v8) { 353 read_val |= STPMIC1_LDO3_MODE; 354 } 355 356 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 357 if (status != 0) { 358 return status; 359 } 360 361 status = stpmic1_regulator_voltage_set("buck2", 1200); 362 if (status != 0) { 363 return status; 364 } 365 366 status = stpmic1_regulator_enable("ldo3"); 367 if (status != 0) { 368 return status; 369 } 370 371 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 372 373 status = stpmic1_regulator_enable("buck2"); 374 if (status != 0) { 375 return status; 376 } 377 378 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 379 380 status = stpmic1_regulator_enable("vref_ddr"); 381 if (status != 0) { 382 return status; 383 } 384 385 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 386 break; 387 388 default: 389 break; 390 }; 391 392 return 0; 393 } 394