1 /* 2 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 9 #include <common/debug.h> 10 #include <drivers/delay_timer.h> 11 #include <drivers/st/stm32_i2c.h> 12 #include <drivers/st/stm32mp_pmic.h> 13 #include <drivers/st/stpmic1.h> 14 #include <lib/mmio.h> 15 #include <lib/utils_def.h> 16 #include <libfdt.h> 17 18 #include <platform_def.h> 19 20 #define PMIC_NODE_NOT_FOUND 1 21 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) 22 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2 23 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) 24 #define STPMIC1_LDO3_DDR_SEL 31U 25 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) 26 27 #define STPMIC1_BUCK_OUTPUT_SHIFT 2 28 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) 29 30 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 31 32 static struct i2c_handle_s i2c_handle; 33 static uint32_t pmic_i2c_addr; 34 35 static int dt_get_pmic_node(void *fdt) 36 { 37 static int node = -FDT_ERR_BADOFFSET; 38 39 if (node == -FDT_ERR_BADOFFSET) { 40 node = fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); 41 } 42 43 return node; 44 } 45 46 int dt_pmic_status(void) 47 { 48 static int status = -FDT_ERR_BADVALUE; 49 int node; 50 void *fdt; 51 52 if (status != -FDT_ERR_BADVALUE) { 53 return status; 54 } 55 56 if (fdt_get_address(&fdt) == 0) { 57 return -ENOENT; 58 } 59 60 node = dt_get_pmic_node(fdt); 61 if (node <= 0) { 62 status = -FDT_ERR_NOTFOUND; 63 64 return status; 65 } 66 67 status = (int)fdt_get_status(node); 68 69 return status; 70 } 71 72 static bool dt_pmic_is_secure(void) 73 { 74 int status = dt_pmic_status(); 75 76 return (status >= 0) && 77 (status == DT_SECURE) && 78 (i2c_handle.dt_status == DT_SECURE); 79 } 80 81 /* 82 * Get PMIC and its I2C bus configuration from the device tree. 83 * Return 0 on success, negative on error, 1 if no PMIC node is defined. 84 */ 85 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info, 86 struct stm32_i2c_init_s *init) 87 { 88 static int i2c_node = -FDT_ERR_NOTFOUND; 89 void *fdt; 90 91 if (fdt_get_address(&fdt) == 0) { 92 return -FDT_ERR_NOTFOUND; 93 } 94 95 if (i2c_node == -FDT_ERR_NOTFOUND) { 96 int pmic_node; 97 const fdt32_t *cuint; 98 99 pmic_node = dt_get_pmic_node(fdt); 100 if (pmic_node < 0) { 101 return PMIC_NODE_NOT_FOUND; 102 } 103 104 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); 105 if (cuint == NULL) { 106 return -FDT_ERR_NOTFOUND; 107 } 108 109 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; 110 if (pmic_i2c_addr > UINT16_MAX) { 111 return -FDT_ERR_BADVALUE; 112 } 113 114 i2c_node = fdt_parent_offset(fdt, pmic_node); 115 if (i2c_node < 0) { 116 return -FDT_ERR_NOTFOUND; 117 } 118 } 119 120 dt_fill_device_info(i2c_info, i2c_node); 121 if (i2c_info->base == 0U) { 122 return -FDT_ERR_NOTFOUND; 123 } 124 125 return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init); 126 } 127 128 int dt_pmic_configure_boot_on_regulators(void) 129 { 130 int pmic_node, regulators_node, regulator_node; 131 void *fdt; 132 133 if (fdt_get_address(&fdt) == 0) { 134 return -ENOENT; 135 } 136 137 pmic_node = dt_get_pmic_node(fdt); 138 if (pmic_node < 0) { 139 return -FDT_ERR_NOTFOUND; 140 } 141 142 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); 143 if (regulators_node < 0) { 144 return -ENOENT; 145 } 146 147 fdt_for_each_subnode(regulator_node, fdt, regulators_node) { 148 const fdt32_t *cuint; 149 const char *node_name = fdt_get_name(fdt, regulator_node, NULL); 150 uint16_t voltage; 151 int status; 152 153 #if defined(IMAGE_BL2) 154 if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on", 155 NULL) == NULL) && 156 (fdt_getprop(fdt, regulator_node, "regulator-always-on", 157 NULL) == NULL)) { 158 #else 159 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", 160 NULL) == NULL) { 161 #endif 162 continue; 163 } 164 165 if (fdt_getprop(fdt, regulator_node, "regulator-pull-down", 166 NULL) != NULL) { 167 168 status = stpmic1_regulator_pull_down_set(node_name); 169 if (status != 0) { 170 return status; 171 } 172 } 173 174 if (fdt_getprop(fdt, regulator_node, "st,mask-reset", 175 NULL) != NULL) { 176 177 status = stpmic1_regulator_mask_reset_set(node_name); 178 if (status != 0) { 179 return status; 180 } 181 } 182 183 cuint = fdt_getprop(fdt, regulator_node, 184 "regulator-min-microvolt", NULL); 185 if (cuint == NULL) { 186 continue; 187 } 188 189 /* DT uses microvolts, whereas driver awaits millivolts */ 190 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); 191 192 status = stpmic1_regulator_voltage_set(node_name, voltage); 193 if (status != 0) { 194 return status; 195 } 196 197 if (!stpmic1_is_regulator_enabled(node_name)) { 198 status = stpmic1_regulator_enable(node_name); 199 if (status != 0) { 200 return status; 201 } 202 } 203 } 204 205 return 0; 206 } 207 208 bool initialize_pmic_i2c(void) 209 { 210 int ret; 211 struct dt_node_info i2c_info; 212 struct i2c_handle_s *i2c = &i2c_handle; 213 struct stm32_i2c_init_s i2c_init; 214 215 ret = dt_pmic_i2c_config(&i2c_info, &i2c_init); 216 if (ret < 0) { 217 ERROR("I2C configuration failed %d\n", ret); 218 panic(); 219 } 220 221 if (ret != 0) { 222 return false; 223 } 224 225 /* Initialize PMIC I2C */ 226 i2c->i2c_base_addr = i2c_info.base; 227 i2c->dt_status = i2c_info.status; 228 i2c->clock = i2c_info.clock; 229 i2c->i2c_state = I2C_STATE_RESET; 230 i2c_init.own_address1 = pmic_i2c_addr; 231 i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; 232 i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; 233 i2c_init.own_address2 = 0; 234 i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; 235 i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; 236 i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; 237 i2c_init.analog_filter = 1; 238 i2c_init.digital_filter_coef = 0; 239 240 ret = stm32_i2c_init(i2c, &i2c_init); 241 if (ret != 0) { 242 ERROR("Cannot initialize I2C %x (%d)\n", 243 i2c->i2c_base_addr, ret); 244 panic(); 245 } 246 247 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1, 248 I2C_TIMEOUT_BUSY_MS)) { 249 ERROR("I2C device not ready\n"); 250 panic(); 251 } 252 253 stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr); 254 255 return true; 256 } 257 258 static void register_pmic_shared_peripherals(void) 259 { 260 uintptr_t i2c_base = i2c_handle.i2c_base_addr; 261 262 if (dt_pmic_is_secure()) { 263 stm32mp_register_secure_periph_iomem(i2c_base); 264 } else { 265 if (i2c_base != 0U) { 266 stm32mp_register_non_secure_periph_iomem(i2c_base); 267 } 268 } 269 } 270 271 void initialize_pmic(void) 272 { 273 unsigned long pmic_version; 274 275 if (!initialize_pmic_i2c()) { 276 VERBOSE("No PMIC\n"); 277 return; 278 } 279 280 register_pmic_shared_peripherals(); 281 282 if (stpmic1_get_version(&pmic_version) != 0) { 283 ERROR("Failed to access PMIC\n"); 284 panic(); 285 } 286 287 INFO("PMIC version = 0x%02lx\n", pmic_version); 288 stpmic1_dump_regulators(); 289 290 #if defined(IMAGE_BL2) 291 if (dt_pmic_configure_boot_on_regulators() != 0) { 292 panic(); 293 }; 294 #endif 295 } 296 297 int pmic_ddr_power_init(enum ddr_type ddr_type) 298 { 299 bool buck3_at_1v8 = false; 300 uint8_t read_val; 301 int status; 302 303 switch (ddr_type) { 304 case STM32MP_DDR3: 305 /* Set LDO3 to sync mode */ 306 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 307 if (status != 0) { 308 return status; 309 } 310 311 read_val &= ~STPMIC1_LDO3_MODE; 312 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 313 read_val |= STPMIC1_LDO3_DDR_SEL << 314 STPMIC1_LDO12356_OUTPUT_SHIFT; 315 316 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 317 if (status != 0) { 318 return status; 319 } 320 321 status = stpmic1_regulator_voltage_set("buck2", 1350); 322 if (status != 0) { 323 return status; 324 } 325 326 status = stpmic1_regulator_enable("buck2"); 327 if (status != 0) { 328 return status; 329 } 330 331 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 332 333 status = stpmic1_regulator_enable("vref_ddr"); 334 if (status != 0) { 335 return status; 336 } 337 338 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 339 340 status = stpmic1_regulator_enable("ldo3"); 341 if (status != 0) { 342 return status; 343 } 344 345 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 346 break; 347 348 case STM32MP_LPDDR2: 349 case STM32MP_LPDDR3: 350 /* 351 * Set LDO3 to 1.8V 352 * Set LDO3 to bypass mode if BUCK3 = 1.8V 353 * Set LDO3 to normal mode if BUCK3 != 1.8V 354 */ 355 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); 356 if (status != 0) { 357 return status; 358 } 359 360 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { 361 buck3_at_1v8 = true; 362 } 363 364 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 365 if (status != 0) { 366 return status; 367 } 368 369 read_val &= ~STPMIC1_LDO3_MODE; 370 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 371 read_val |= STPMIC1_LDO3_1800000; 372 if (buck3_at_1v8) { 373 read_val |= STPMIC1_LDO3_MODE; 374 } 375 376 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 377 if (status != 0) { 378 return status; 379 } 380 381 status = stpmic1_regulator_voltage_set("buck2", 1200); 382 if (status != 0) { 383 return status; 384 } 385 386 status = stpmic1_regulator_enable("ldo3"); 387 if (status != 0) { 388 return status; 389 } 390 391 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 392 393 status = stpmic1_regulator_enable("buck2"); 394 if (status != 0) { 395 return status; 396 } 397 398 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 399 400 status = stpmic1_regulator_enable("vref_ddr"); 401 if (status != 0) { 402 return status; 403 } 404 405 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 406 break; 407 408 default: 409 break; 410 }; 411 412 return 0; 413 } 414