feat(memmap): add summary command to memory map script

This patch adds a `summary` command, invoked with:

poetry run memory summary <map-file>

This command is capable of producing a summary tabl

feat(memmap): add summary command to memory map script

This patch adds a `summary` command, invoked with:

poetry run memory summary <map-file>

This command is capable of producing a summary table, similar to the
footprint command, or an HTML flame-graph representing the size of ELF
image sections.

When specified with `-o` (`--old`), an old GNU map file is used as a
past state and subtracted from the GNU map file specified by
`<map-file>` to annotate printed information with additional size
deltas.

Note that many bootloaders include alignment padding and will align to
a page size. To exclude this alignment-padding from the summary, use the
`-e` switch.

For example:

$ poetry run memory summary bl1.map -e -d 1
| Module | .text | .data | .bss |
|-----------|--------------|----------|-----------|
| bl1 | 32616(+24) | 2217(+0) | 11175(+0) |
| lib | 55932(+2060) | 40(+0) | 10628(+0) |
| Subtotals | 88548(+2084) | 2257(+0) | 21803(+0) |
Total Static RAM memory (data + bss): 24060(+0) bytes
Total Flash memory (text + data): 90805(+2084) bytes

Change-Id: Id0bc157d09e654f89730dfbe318fa5f820e9f18d
Co-authored-by: Chris Kay <chris.kay@arm.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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feat(errata): implement workaround for DSU-120 erratum 2900952

DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum

feat(errata): implement workaround for DSU-120 erratum 2900952

DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.

The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.

SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4

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fix(build): remove SUPPORT_STACK_MEMTAG

This flag enables the memtag sanitizer in clang. However, for this to
work, other generic and platform-specific logic is required that was
never implemented.

fix(build): remove SUPPORT_STACK_MEMTAG

This flag enables the memtag sanitizer in clang. However, for this to
work, other generic and platform-specific logic is required that was
never implemented. So in effect, the feature is half-baked and at best a
simple test (of which we have plenty in tftf) or a NOP at worst.

So remove the option to simplify code a little.

Change-Id: Iab4150871c89545d813c5ae14be67bf6459d051a
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "build(poetry): wrap docs build in poetry" into integration

fix(cpus): workaround for Cortex-A710 erratum 1917258

Cortex-A710 erratum 1917258 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4

fix(cpus): workaround for Cortex-A710 erratum 1917258

Cortex-A710 erratum 1917258 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[43]. This has no
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I1fae91a5e3a8ecea255f0f0a481bfd6196a7db51
Signed-off-by: John Powell <john.powell@arm.com>

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fix(cpus): workaround for Cortex-A710 erratum 1916945

Cortex-A710 erratum 1916945 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.

The workaround is to set CPUECTLR_

fix(cpus): workaround for Cortex-A710 erratum 1916945

Cortex-A710 erratum 1916945 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.

The workaround is to set CPUECTLR_EL1[8]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I54793492c527928d7f266165a31b8613de838e69
Signed-off-by: John Powell <john.powell@arm.com>

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fix(cpus): workaround for Cortex-A710 erratum 1901946

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15].

fix(cpus): workaround for Cortex-A710 erratum 1901946

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>

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Merge changes If4cd4e71,I0b5158ef into integration

* changes:
docs(fvp): add FVP_HW_CONFIG_ADDR documentation
feat(fvp): add FVP_HW_CONFIG_ADDR make variable

Merge "docs(commit-style): add a message about lower case" into integration

feat(handoff): support libtl submodule builds

Refactor transfer list support to enable building the transfer list
and updates include paths accordingly.

Change-Id: Icdbe19924678a4023c15897a9765b8e7

feat(handoff): support libtl submodule builds

Refactor transfer list support to enable building the transfer list
and updates include paths accordingly.

Change-Id: Icdbe19924678a4023c15897a9765b8e7f150d9e3
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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docs(fvp): add FVP_HW_CONFIG_ADDR documentation

Add documentation to describe FVP_HW_CONFIG_ADDR, its default, and its
intended use.

Change-Id: If4cd4e712aa914fee1aeab2fa9fbe682f180b956
Signed-off-

docs(fvp): add FVP_HW_CONFIG_ADDR documentation

Add documentation to describe FVP_HW_CONFIG_ADDR, its default, and its
intended use.

Change-Id: If4cd4e712aa914fee1aeab2fa9fbe682f180b956
Signed-off-by: emily.boarer@arm.com

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docs(commit-style): add a message about lower case

Although not clearly mentioned in Conventional Commits spec[1], the
first letter of the description must be lower case to pass the
commitlint check

docs(commit-style): add a message about lower case

Although not clearly mentioned in Conventional Commits spec[1], the
first letter of the description must be lower case to pass the
commitlint check. This is described in the test for subject case[2].

[1]: https://www.conventionalcommits.org/en/v1.0.0/#specification
[2]: https://github.com/conventional-changelog/commitlint/tree/master/%40commitlint/config-conventional#subject-case

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I862382452784319a9ae659a70e49a61d79de6ed2

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docs(stm32mp2): introduce new STM32MP23 family

STM32MP23 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP235: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD

docs(stm32mp2): introduce new STM32MP23 family

STM32MP23 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP235: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
H264 - 3D GPU - AI / NN - LVDS / DSI
- STM32MP233: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
- STM32MP231: Single Cortex-A35 + Cortex-M33 - 1x Ethernet

Change-Id: Iaf3dd7e0c1eda055063361af3c98855b1272d4c6
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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docs(stm32mp2): introduce new STM32MP21 family

STM32MP21 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD

docs(stm32mp2): introduce new STM32MP21 family

STM32MP21 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
CSI - LTDC
- STM32MP213: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
- STM32MP211: Single Cortex-A35 + Cortex-M33 - 1x Ethernet

Change-Id: Ie3db430bedd86c3b444bec647792be24b20a0cba
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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build(poetry): wrap docs build in poetry

Simplify building documentation by wrapping the Sphinx command inside
a Poetry environment. Previously, the developer had to manually
activate Poetry and in

build(poetry): wrap docs build in poetry

Simplify building documentation by wrapping the Sphinx command inside
a Poetry environment. Previously, the developer had to manually
activate Poetry and install the docs group. This change makes the
process consistent with other build targets and reduces user error.
Falls back gracefully if Poetry is not installed.

Change-Id: I1dfea58314253773bec5e2c70d27e2216e3143d9
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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docs(fconf): streamline TB_FW_CONFIG bindings

This change simplifies the documentation for TB_FW_CONFIG by removing
outdated or platform-specific bindings and introducing a clear section
referencing

docs(fconf): streamline TB_FW_CONFIG bindings

This change simplifies the documentation for TB_FW_CONFIG by removing
outdated or platform-specific bindings and introducing a clear section
referencing the standardized Chain of Trust (CoT) bindings.

Change-Id: I3f3f96ed333a57153bde929fa35863655c30e8ed
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge changes from topic "xlnx_versal_custom_sip" into integration

* changes:
feat(versal): add hooks for mmap and early setup
refactor(zynqmp): refactor custom sip service

refactor(memmap)!: change behavioural flags to commands

This change factors out the following memory map tool flags into
independent commands:

- `--footprint` (becomes `memory footprint`)
- `--tree

refactor(memmap)!: change behavioural flags to commands

This change factors out the following memory map tool flags into
independent commands:

- `--footprint` (becomes `memory footprint`)
- `--tree` (becomes `memory tree`)
- `--symbol` (becomes `memory symbol`)

So, for example, where previously you would generate the memory
footprint of a build with:

memory --tree

You would now instead use:

memory footprint

Any flags specific to a command (e.g. `--depth` for `tree`) must be
specified after the command, e.g.

memory tree --depth 1

... instead of:

memory --depth 1 tree

BREAKING-CHANGE: The image memory map visualization tool now uses
commands, rather than arguments, to determine the behaviour of the
script. See the commit message for further details.

Change-Id: I11d54d1f6276b8447bdfb8496544ab80399459ac
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "feat(smcc): introduce a new vendor_el3 service for ACS SMC handler" into integration

Merge "docs(versal-net): update documentation for SDEI" into integration

Merge "docs: remove Chris from LTS maintainers" into integration

docs: remove Chris from LTS maintainers

Change-Id: If371cd2e9ef3383702d23456cb73ff1194f95e80
Signed-off-by: Chris Palmer <palmer@google.com>

docs(changelog): changelog for v2.13 release

Generated this change-log using below command:
npm run release -- --skip.commit --skip.tag --release-as 2.13.0

Change-Id: Ibb0623f04c641b65a03deaffd50a5

docs(changelog): changelog for v2.13 release

Generated this change-log using below command:
npm run release -- --skip.commit --skip.tag --release-as 2.13.0

Change-Id: Ibb0623f04c641b65a03deaffd50a5a8b65637419
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge "docs(juno): revert SCP version for Juno to 2.14.0" into integration

docs(juno): revert SCP version for Juno to 2.14.0

Updated the Juno platform documentation to reflect testing with SCP
version 2.14.0 instead of 2.15.0. The version used in testing was
reverted in [1

docs(juno): revert SCP version for Juno to 2.14.0

Updated the Juno platform documentation to reflect testing with SCP
version 2.14.0 instead of 2.15.0. The version used in testing was
reverted in [1] due to instability in the tftf-manual-reboot tests
caused by upgrading to v2.15 and v2.16.

[1] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/37997

Change-Id: I48c2b51a33950ad096e021d7bdd9cdb6a1303f8c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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