1 /* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <bl31/bl31.h> 11 #include <common/debug.h> 12 #include <common/desc_image_load.h> 13 #include <drivers/console.h> 14 #include <drivers/generic_delay_timer.h> 15 #include <lib/bl_aux_params/bl_aux_params.h> 16 #include <lib/coreboot.h> 17 #include <lib/spinlock.h> 18 19 #include <platform.h> 20 #include <qti_interrupt_svc.h> 21 #include <qti_plat.h> 22 #include <qti_uart_console.h> 23 #include <qtiseclib_interface.h> 24 25 /* Variable to hold QTI UART configuration */ 26 static console_t g_qti_console_uart; 27 28 /* 29 * Placeholder variables for copying the BL32 and Bl33 arguments that have been 30 * passed to BL31 from BL2. 31 */ 32 static entry_point_info_t bl32_image_ep_info; 33 static entry_point_info_t bl33_image_ep_info; 34 35 /* 36 * Variable to hold bl31 cold boot status. Default value 0x0 means yet to boot. 37 * Any other value means cold booted. 38 */ 39 uint32_t g_qti_bl31_cold_booted; 40 41 /******************************************************************************* 42 * Perform any BL31 early platform setup common to ARM standard platforms. 43 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 44 * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be 45 * done before the MMU is initialized so that the memory layout can be used 46 * while creating page tables. BL2 has flushed this information to memory, so 47 * we are guaranteed to pick up good data. 48 ******************************************************************************/ 49 void bl31_early_platform_setup(u_register_t from_bl2, 50 u_register_t plat_params_from_bl2) 51 { 52 bl_aux_params_parse(plat_params_from_bl2, NULL); 53 54 qti_console_uart_register(&g_qti_console_uart, PLAT_QTI_UART_BASE); 55 console_set_scope(&g_qti_console_uart, CONSOLE_FLAG_RUNTIME | 56 CONSOLE_FLAG_BOOT | CONSOLE_FLAG_CRASH); 57 /* 58 * Tell BL31 where the non-trusted software image 59 * is located and the entry state information 60 */ 61 bl31_params_parse_helper(from_bl2, &bl32_image_ep_info, &bl33_image_ep_info); 62 } 63 64 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 65 u_register_t arg2, u_register_t arg3) 66 { 67 bl31_early_platform_setup(arg0, arg1); 68 } 69 70 /******************************************************************************* 71 * Perform the very early platform specific architectural setup here. At the 72 * moment this only initializes the mmu in a quick and dirty way. 73 ******************************************************************************/ 74 void bl31_plat_arch_setup(void) 75 { 76 qti_setup_page_tables( 77 BL31_START, 78 BL31_END-BL31_START, 79 BL_CODE_BASE, 80 BL_CODE_END, 81 BL_RO_DATA_BASE, 82 BL_RO_DATA_END 83 ); 84 enable_mmu_el3(0); 85 } 86 87 /******************************************************************************* 88 * Perform any BL31 platform setup common to ARM standard platforms 89 ******************************************************************************/ 90 void bl31_platform_setup(void) 91 { 92 generic_delay_timer_init(); 93 /* Initialize the GIC driver, CPU and distributor interfaces */ 94 plat_qti_gic_driver_init(); 95 plat_qti_gic_init(); 96 qti_interrupt_svc_init(bl32_image_ep_info.pc != 0); 97 qtiseclib_bl31_platform_setup(); 98 99 /* set boot state to cold boot complete. */ 100 g_qti_bl31_cold_booted = 0x1; 101 } 102 103 /******************************************************************************* 104 * Return a pointer to the 'entry_point_info' structure of the next image for the 105 * security state specified. BL33 corresponds to the non-secure image type 106 * while BL32 corresponds to the secure image type. A NULL pointer is returned 107 * if the image does not exist. 108 ******************************************************************************/ 109 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 110 { 111 entry_point_info_t *ep; 112 113 assert(sec_state_is_valid(type) != 0); 114 ep = (type == SECURE) ? &bl32_image_ep_info : &bl33_image_ep_info; 115 116 return ep->pc ? ep : NULL; 117 } 118 119 /******************************************************************************* 120 * This function is used by the architecture setup code to retrieve the counter 121 * frequency for the CPU's generic timer. This value will be programmed into the 122 * CNTFRQ_EL0 register. In Arm standard platforms, it returns the base frequency 123 * of the system counter, which is retrieved from the first entry in the 124 * frequency modes table. This will be used later in warm boot (psci_arch_setup) 125 * of CPUs to set when CPU frequency. 126 ******************************************************************************/ 127 unsigned int plat_get_syscnt_freq2(void) 128 { 129 return PLAT_SYSCNT_FREQ; 130 } 131