drivers: gpio: add operation inline description

Adds few inline description comment to GPIO operators.

Acked-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.c

drivers: gpio: add operation inline description

Adds few inline description comment to GPIO operators.

Acked-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: gpio: add put operation handle

Adds a put operation handler for a GPIO consumer driver to be able
to release the GPIO resources it has allocated when getting its
GPIO. This is needed for ex

drivers: gpio: add put operation handle

Adds a put operation handler for a GPIO consumer driver to be able
to release the GPIO resources it has allocated when getting its
GPIO. This is needed for example, when such a consumer driver must defer
its probe sequence and will get again its GPIO making gpio_dt_alloc_pin()
to be called again.

Acked-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: stm32_gpio: fix driver header file guards

Fixes the names of the macro used as stm32_gpio.h header file guard.

Acked-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne

drivers: stm32_gpio: fix driver header file guards

Fixes the names of the macro used as stm32_gpio.h header file guard.

Acked-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: pinctrl: fix stubbed pinctrl_free_state()

Fixes pinctrl_free_state() when CFG_DRIVERS_PINCTRL is disabled
as the API function has no return value.

The issue is reported by GCC with an erro

drivers: pinctrl: fix stubbed pinctrl_free_state()

Fixes pinctrl_free_state() when CFG_DRIVERS_PINCTRL is disabled
as the API function has no return value.

The issue is reported by GCC with an error trace like the below:

core/include/drivers/pinctrl.h: In function ‘pinctrl_free_state’:
lib/libutee/include/tee_api_defines.h:117:43: error: ‘return’ with a value, in function returning void [-Werror=return-type]
117 | #define TEE_ERROR_NOT_SUPPORTED 0xFFFF000A
| ^~~~~~~~~~
core/include/drivers/pinctrl.h:158:16: note: in expansion of macro ‘TEE_ERROR_NOT_SUPPORTED’
158 | return TEE_ERROR_NOT_SUPPORTED;
| ^~~~~~~~~~~~~~~~~~~~~~~
In file included from core/include/drivers/stm32_uart.h:10,
from core/arch/arm/plat-stm32mp1/main.c:14:
core/include/drivers/pinctrl.h:156:6: note: declared here
156 | void pinctrl_free_state(struct pinctrl_state *state __unused)
| ^~~~~~~~~~~~~~~~~~

Fixes: 9aec039ec0d7 ("drivers: pinctrl: add pinctrl support")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: spmc: support virtualization with SPMC at S-EL1

Adds support for virtualization with OP-TEE as SPMC at S-EL1. This if
the FF-A counterpart of SMC based ABI with virtualization.

Reviewed-by: B

core: spmc: support virtualization with SPMC at S-EL1

Adds support for virtualization with OP-TEE as SPMC at S-EL1. This if
the FF-A counterpart of SMC based ABI with virtualization.

Reviewed-by: Balint Dobszay <balint.dobszay@arm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add memory type MEM_AREA_NEX_NSEC_SHM

Adds the memory type MEM_AREA_NEX_NSEC_SHM used to map non-secure shared
memory in the nexus.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: add memory type MEM_AREA_NEX_NSEC_SHM

Adds the memory type MEM_AREA_NEX_NSEC_SHM used to map non-secure shared
memory in the nexus.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add virt_get_current_guest_id()

Adds the helper function virt_get_current_guest_id().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander

core: add virt_get_current_guest_id()

Adds the helper function virt_get_current_guest_id().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: interrupt: rename itr_init()

Renames itr_init() to interrupt_main_init() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by: Jens Wiklander <je

core: interrupt: rename itr_init()

Renames itr_init() to interrupt_main_init() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: interrupt: rename itr_core_handler()

Renames itr_core_handler() to interrupt_main_handler() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by:

core: interrupt: rename itr_core_handler()

Renames itr_core_handler() to interrupt_main_handler() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: gic: factorize call to gic_init() or gic_init_base_addr()

Platforms call either gic_init() or gic_init_base_addr() depending
on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This chang

drivers: gic: factorize call to gic_init() or gic_init_base_addr()

Platforms call either gic_init() or gic_init_base_addr() depending
on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This change
factorize this logic from gic_init() implementation and makes
gic_init_base_addr() local to gic.c.

For that purpose functions gic_init_base_address() and gic_dt_get_irq()
are moved inside gic.c source file.
source file.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: define main interrupt controller data from its driver

All but one platforms define CPU core interrupt controller from their
platform main.c source file next to its main interrupt handler.
This

core: define main interrupt controller data from its driver

All but one platforms define CPU core interrupt controller from their
platform main.c source file next to its main interrupt handler.
This change factorize these implementation by moving the definition
of the controller data instance straight in the controller driver
source file. This change makes each controller driver to implement
straight itr_core_handler() function, preventing a extra branch on
interrupt execution. Interrupt controller driver initialization
function now straight calls itr_core_init().

This changes treats case when CFG_CORE_WORKAROUND_ARM_NMFI is enable
to not conflict with core/arch/arm/kernel/thread.c that already
overrides itr_core_handler() weak implementation.

With this change, the main controller initialization function
(gic_init(), gic_init_base_addr(), gic_cpu_init() and hfic_init())
no more gets the controller data as input argument.

As a consequence, definition of struct hfic_data and struct gic_data
moves from their respective driver header file to the respective
driver source file.

As a consequence, gic_dump() no more requires an argument.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: pinctrl: add pinctrl support

Add support for pinctrl support using device-tree. The device-tree
"pinctrl-<x>" and "pinctrl-names" properties are supported and
allows to apply a pinctrl conf

drivers: pinctrl: add pinctrl support

Add support for pinctrl support using device-tree. The device-tree
"pinctrl-<x>" and "pinctrl-names" properties are supported and
allows to apply a pinctrl configuration based on this. This support
also includes a way to register pin muxing controllers that can apply
these states.
A few properties of the pinctrl nodes are supported such as
"bias-disable", "bias-pull-up" and "bias-pull-down".

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver: add support for DT_DRIVER_PINCTRL

In order to handle pinctrl the same way that other driver are handled by
DT driver support, modify node parsing to refer to the parent node in case

core: dt_driver: add support for DT_DRIVER_PINCTRL

In order to handle pinctrl the same way that other driver are handled by
DT driver support, modify node parsing to refer to the parent node in case
we are handling a pinctrl request.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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core: dt_driver: fix a typo

Replace "controlle" with "controller".

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

drivers: gpio: add device-tree based gpio controller framework

Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows t

drivers: gpio: add device-tree based gpio controller framework

Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows to register
gpio controllers and to retrieve gpio struct based on a "<name>-gpios"
properties.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: move gpio.h include to drivers/

GPIOs are typically handled by drivers and this will be modified to add
device-tree support.

Also rename "ena_dis" with "enable_disable" because more explic

drivers: move gpio.h include to drivers/

GPIOs are typically handled by drivers and this will be modified to add
device-tree support.

Also rename "ena_dis" with "enable_disable" because more explicit.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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dt-bindings: at91: add SCMI identifiers for clocks

Add defines for clocks that are available via SCMI for this platform.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Fo

dt-bindings: at91: add SCMI identifiers for clocks

Add defines for clocks that are available via SCMI for this platform.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: scmi-msg: add support for clock using generic clock framework

Integrating the clock framework with SCMI allows to avoid boilerplate
code to do so in platform specific files. This patch adds

drivers: scmi-msg: add support for clock using generic clock framework

Integrating the clock framework with SCMI allows to avoid boilerplate
code to do so in platform specific files. This patch adds a generic
layer that uses the generic clock framework to access and expose clocks.
SCMI clocks can be added from platform code using scmi_clk_add().
A new CFG_SCMI_MSG_USE_CLK configuration option is added to enable
this generic clock support.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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Add missing conditional compilation for RISC-V

RV64 also uses kern_sp. The elf.h is also used by RV32 and RV64.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome

Add missing conditional compilation for RISC-V

RV64 also uses kern_sp. The elf.h is also used by RV32 and RV64.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: ffa: parse boot info

With CFG_CORE_SEL2_SPMC=y OP-TEE is executed as an SP at S-EL1. The
manifest describing the OP-TEE SP is passed as a boot argument.

The manifest contains among other thin

core: ffa: parse boot info

With CFG_CORE_SEL2_SPMC=y OP-TEE is executed as an SP at S-EL1. The
manifest describing the OP-TEE SP is passed as a boot argument.

The manifest contains among other things the two properties
"load-address" and "mem-size". These cover the secure memory allocated
for OP-TEE to cover core and TA memory. The retrieved memory range is
saved with a call to core_mmu_set_secure_memory() to be used when
initializing MMU and other memory configuration.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add core_mmu_set_secure_memory()

Adds core_mmu_set_secure_memory() for use with CFG_CORE_PHYS_RELOCATABLE
where the secure physical memory range is determined at boot.

Reviewed-by: Etienne Ca

core: add core_mmu_set_secure_memory()

Adds core_mmu_set_secure_memory() for use with CFG_CORE_PHYS_RELOCATABLE
where the secure physical memory range is determined at boot.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add dt_getprop_as_number()

Adds dt_getprop_as_number() to read a property and parse it as a number
returned as a uint64_t. The size of the property determines if it's read
as an unsigned 32-bi

core: add dt_getprop_as_number()

Adds dt_getprop_as_number() to read a property and parse it as a number
returned as a uint64_t. The size of the property determines if it's read
as an unsigned 32-bit or 64-bit integer.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add core_mmu_get_ta_range()

Adds core_mmu_get_ta_range() to return the range of physical memory
reserved for TAs.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Je

core: add core_mmu_get_ta_range()

Adds core_mmu_get_ta_range() to return the range of physical memory
reserved for TAs.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add core_mmu_tee_load_pa address

Adds core_mmu_tee_load_pa for a dynamic record of where OP-TEE is loaded
into memory.

With CFG_CORE_PHYS_RELOCATABLE=y core_mmu_tee_base_pa may need to be
upd

core: add core_mmu_tee_load_pa address

Adds core_mmu_tee_load_pa for a dynamic record of where OP-TEE is loaded
into memory.

With CFG_CORE_PHYS_RELOCATABLE=y core_mmu_tee_base_pa may need to be
updated during early boot since the physical address to use isn't
determined until then.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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driver: tpm2: remove TPM2 driver

Remove TPM2 driver from OP-TEE core. OP-TEE will instead rely on a
remote REE TPM2 driver allowing REE OS to embed TPM2 software stack
and leverage TPM2 features.

A

driver: tpm2: remove TPM2 driver

Remove TPM2 driver from OP-TEE core. OP-TEE will instead rely on a
remote REE TPM2 driver allowing REE OS to embed TPM2 software stack
and leverage TPM2 features.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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