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Searched refs:u8IQSwap (Results 1 – 25 of 38) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/demodulator/drv/demod/
H A DdrvDMD_INTERN_DVBC_v2.c496 MS_U8 u8IQSwap = 0, u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBC_Init() local
603 u8IQSwap = _sDMD_DVBC_InitData.u8DMD_DVBC_InitExt[12]; // IQ Swap in DMD_DVBC_Init()
604 u8IQSwap = u8IQSwap; in DMD_DVBC_Init()
653 ULOGD("DEMOD","u8IQSwap %d\n",u8IQSwap); in DMD_DVBC_Init()
H A DdrvDMD_INTERN_DVBT_v2.c906 …BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in DMD_DVBT_SetConfigHPLPSetIF() argument
916 …PLPSetIF %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u32IFFreq, u32FSFreq, u8IQSwap); in DMD_DVBT_SetConfigHPLPSetIF()
937 bRet=INTERN_DVBT_Config(BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap); in DMD_DVBT_SetConfigHPLPSetIF()
1424 …BT_SetConfigHPLPSetIF_PARAM)pArgs)->u32FSFreq, ((PDVBT_SetConfigHPLPSetIF_PARAM)pArgs)->u8IQSwap); in DVBTIoctl()
H A DdrvDMD_INTERN_DVBT.c854 …BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in MDrv_DMD_DVBT_SetConfigHPLPSetIF() argument
864 Drv_DVBT_SetConfigHPLPSetIF_PARAM.u8IQSwap=u8IQSwap; in MDrv_DMD_DVBT_SetConfigHPLPSetIF()
H A DdrvDMD_INTERN_DVBS_v2.c480 MS_U8 u8IQSwap=0, u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBS_Init() local
560 u8IQSwap = _sDMD_DVBS_InitData.u8DMD_DVBS_InitExt[12]; // IQ Swap in DMD_DVBS_Init()
609 ULOGD("DEMOD","u8IQSwap %d\n",u8IQSwap); in DMD_DVBS_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBT.c1113 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1118 …d %d %d %d %d %d %d %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap); in INTERN_DVBT_Config()
1153 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
H A DhalDMD_INTERN_DVBT.h411 …MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap);
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBT.c1164 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1168 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1203 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
H A DhalDMD_INTERN_DVBT.h411 …MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap);
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBT.c1121 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1126 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1161 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_DVBT.c1512 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1517 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1552 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBT.c1287 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1292 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1327 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBT.c1308 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1313 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1348 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
H A DhalDMD_INTERN_DVBT.h411 …MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap);
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBT.c1526 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1531 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1566 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
H A DhalDMD_INTERN_DVBT.h411 …MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap);
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBT.c1287 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1292 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1327 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
H A DhalDMD_INTERN_DVBT.h411 …MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap);
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBT.c1287 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1292 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1327 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_DVBT.c1510 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1515 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1550 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBT.c1287 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1292 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1327 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
H A DhalDMD_INTERN_DVBT.h411 …MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap);
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBT.c1287 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1292 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1327 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBT.c1287 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1292 …d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap)); in INTERN_DVBT_Config()
1327 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBT.c1308 … MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap) in INTERN_DVBT_Config() argument
1313 …d %d %d %d %d %d %d %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap); in INTERN_DVBT_Config()
1348 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_IQ_SWAP, (u8IQSwap)); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/mxlib/include/
H A DdrvDMD_INTERN_DVBT_v2.h261 MS_U8 u8IQSwap; member

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