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Searched refs:TSO_CONFIG5_FIXED_MIU_REG_FLUSH (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DregTSO.h493 #define TSO_CONFIG5_FIXED_MIU_REG_FLUSH 0x0080 macro
H A DhalTSO.c246 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH); in HAL_TSO_Init()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DregTSO.h493 #define TSO_CONFIG5_FIXED_MIU_REG_FLUSH 0x0080 macro
H A DhalTSO.c246 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH); in HAL_TSO_Init()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DregTSO.h494 #define TSO_CONFIG5_FIXED_MIU_REG_FLUSH 0x0080 macro
H A DhalTSO.c243 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH); in HAL_TSO_Init()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DregTSO.h514 #define TSO_CONFIG5_FIXED_MIU_REG_FLUSH 0x0080 // fix svq_tx error macro
H A DhalTSO.c244 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH); in HAL_TSO_Init()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DregTSO.h518 #define TSO_CONFIG5_FIXED_MIU_REG_FLUSH 0x0080 // fix svq_tx error macro
H A DhalTSO.c247 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH); in HAL_TSO_Init()