Searched refs:TSO1_SVQ1_BASE_MASK (Results 1 – 10 of 10) sorted by relevance
699 #define TSO1_SVQ1_BASE_MASK 0x0FFFFFFF macro
1814 _HAL_REG32_W(Base, ((phyBufAddr >> TSO_MIU_BUS) & TSO1_SVQ1_BASE_MASK)); in HAL_TSO_SVQBuf_Set()
702 #define TSO1_SVQ1_BASE_MASK 0x0FFFFFFF macro
1877 _HAL_REG32_W(Base, ((phyMiuOffsetSVQBuf >> TSO_MIU_BUS) & TSO1_SVQ1_BASE_MASK)); in HAL_TSO_SVQBuf_Set()
730 #define TSO1_SVQ1_BASE_MASK 0x0FFFFFFF macro
1883 _HAL_REG32_W(Base, ((phyMiuOffsetSVQBuf >> TSO_MIU_BUS) & TSO1_SVQ1_BASE_MASK)); in HAL_TSO_SVQBuf_Set()
734 #define TSO1_SVQ1_BASE_MASK 0x0FFFFFFF macro
1875 _HAL_REG32_W(Base, ((phyBufAddr >> TSO_MIU_BUS) & TSO1_SVQ1_BASE_MASK)); in HAL_TSO_SVQBuf_Set()