Searched refs:REG_CLKGEN0_STC_SRC_SHIFT (Results 1 – 14 of 14) sorted by relevance
154 #define REG_CLKGEN0_STC_SRC_SHIFT 2 macro
494 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC0_SHIFT)); in HAL_TSP_Power()497 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
138 #define REG_CLKGEN0_STC_SRC_SHIFT 2 macro
450 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC0_SHIFT)); in HAL_TSP_Power()453 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
147 #define REG_CLKGEN0_STC_SRC_SHIFT 2 macro
599 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC0_SHIFT)); in HAL_TSP_Power()602 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
143 #define REG_CLKGEN0_STC_SRC_SHIFT 2 macro
144 #define REG_CLKGEN0_STC_SRC_SHIFT 2 macro
611 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC0_SHIFT)); in HAL_TSP_Power()614 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
523 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC0_SHIFT)); in HAL_TSP_Power()526 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()