Home
last modified time | relevance | path

Searched refs:NPM_REG_ANAMISC (Results 1 – 21 of 21) sorted by relevance

/utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026UL)
154 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
155 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/
H A DregCPU.h119 #define NPM_REG_ANAMISC 0x010C00 //0x110c00 //ana misc macro
148 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026)
149 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0)
150 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2)
/utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026UL)
154 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
155 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026UL)
154 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
155 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/
H A DregCPU.h119 #define NPM_REG_ANAMISC 0x010C00 //0x110c00 //ana misc macro
148 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026)
149 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0)
150 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
153 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
154 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
153 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
154 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
154 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
155 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
153 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
154 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/
H A DregCPU.h120 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
153 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
154 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/
H A DregCPU.h125 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
181 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
182 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
183 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/
H A DregCPU.h125 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
181 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
182 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
183 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/
H A DregCPU.h132 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
191 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
193 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
194 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/
H A DregCPU.h134 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
194 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
196 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
197 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/
H A DregCPU.h132 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
191 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
193 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
194 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/
H A DregCPU.h133 #define NPM_REG_ANAMISC 0x010C00UL //0x110c00 //ana misc macro
192 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL)
194 #define NPM_REG_LPF_LOW (NPM_REG_ANAMISC + 0x00C0UL)
195 #define NPM_REG_LPF_HIGH (NPM_REG_ANAMISC + 0x00C2UL)
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c595 #define NPM_REG_ANAMISC 0x10C00 //0x110c00 //ana misc
596 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c595 #define NPM_REG_ANAMISC 0x10C00 //0x110c00 //ana misc
596 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c598 #define NPM_REG_ANAMISC 0x10C00 //0x110c00 //ana misc
599 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c596 #define NPM_REG_ANAMISC 0x10C00 //0x110c00 //ana misc
597 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c599 #define NPM_REG_ANAMISC 0x10C00 //0x110c00 //ana misc
600 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)