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Searched refs:E_IRQEXPH_START (Results 1 – 25 of 42) sorted by relevance

12

/utopia/UTPA2-700.0.x/mxlib/hal/mustang/
H A DhalIRQTBL.h241 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
242 E_IRQ_48 = E_IRQEXPH_START + 0,
243 E_IRQ_49 = E_IRQEXPH_START + 1,
244 E_IRQ_50 = E_IRQEXPH_START + 2,
245 E_IRQ_51 = E_IRQEXPH_START + 3,
246 E_IRQ_52 = E_IRQEXPH_START + 4,
247 E_IRQ_53 = E_IRQEXPH_START + 5,
248 E_IRQ_54 = E_IRQEXPH_START + 6,
249 E_IRQ_55 = E_IRQEXPH_START + 7,
250 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
H A DregCHIP.h281 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
282 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
283 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
284 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
285 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
286 #define IRQEXPH_G3D2MCU (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
287 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
288 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
289 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
290 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DregCHIP.h285 …define IRQEXPH_BDMA0 (0x1 << (E_IRQEXPH_BDMA0 - E_IRQEXPH_START) )
286 …define IRQEXPH_BDMA1 (0x1 << (E_IRQEXPH_BDMA1 - E_IRQEXPH_START) )
287 …define IRQEXPH_UART2MCU (0x1 << (E_IRQEXPH_UART2MCU - E_IRQEXPH_START) )
288 …define IRQEXPH_URDMA2MCU (0x1 << (E_IRQEXPH_URDMA2MCU - E_IRQEXPH_START) )
289 …define IRQEXPH_DVI_HDMI_HDCP (0x1 << (E_IRQEXPH_DVI_HDMI_HDCP - E_IRQEXPH_START) )
290 …define IRQEXPH_G3D2MCU (0x1 << (E_IRQEXPH_G3D2MCU - E_IRQEXPH_START) )
291 …define IRQEXPH_CEC_INT_PM (0x1 << (E_IRQEXPH_CEC - E_IRQEXPH_START) )
292 …define IRQEXPH_HDCP_IIC (0x1 << (E_IRQEXPH_HDCP_IIC - E_IRQEXPH_START) )
293 …define IRQEXPH_HDCP_X74 (0x1 << (E_IRQEXPH_HDCP_X74 - E_IRQEXPH_START) )
294 …define IRQEXPH_WADR_ERR (0x1 << (E_IRQEXPH_WADR_ERR - E_IRQEXPH_START) )
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DregCHIP.h279 …define IRQEXPH_BDMA0 (0x1 << (E_IRQEXPH_BDMA0 - E_IRQEXPH_START) )
280 …define IRQEXPH_BDMA1 (0x1 << (E_IRQEXPH_BDMA1 - E_IRQEXPH_START) )
281 …define IRQEXPH_UART2MCU (0x1 << (E_IRQEXPH_UART2MCU - E_IRQEXPH_START) )
282 …define IRQEXPH_URDMA2MCU (0x1 << (E_IRQEXPH_URDMA2MCU - E_IRQEXPH_START) )
283 …define IRQEXPH_DVI_HDMI_HDCP (0x1 << (E_IRQEXPH_DVI_HDMI_HDCP - E_IRQEXPH_START) )
284 …define IRQEXPH_G3D2MCU (0x1 << (E_IRQEXPH_G3D2MCU - E_IRQEXPH_START) )
285 …define IRQEXPH_CEC_INT_PM (0x1 << (E_IRQEXPH_CEC - E_IRQEXPH_START) )
286 …define IRQEXPH_HDCP_IIC (0x1 << (E_IRQEXPH_HDCP_IIC - E_IRQEXPH_START) )
287 …define IRQEXPH_HDCP_X74 (0x1 << (E_IRQEXPH_HDCP_X74 - E_IRQEXPH_START) )
288 …define IRQEXPH_WADR_ERR (0x1 << (E_IRQEXPH_WADR_ERR - E_IRQEXPH_START) )
[all …]
H A DhalIRQTBL.h285 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
286 E_IRQ_48 = E_IRQEXPH_START + 0,
287 E_IRQ_49 = E_IRQEXPH_START + 1,
288 E_IRQ_50 = E_IRQEXPH_START + 2,
289 E_IRQ_51 = E_IRQEXPH_START + 3,
290 E_IRQ_52 = E_IRQEXPH_START + 4,
291 E_IRQ_53 = E_IRQEXPH_START + 5,
292 E_IRQ_54 = E_IRQEXPH_START + 6,
293 E_IRQ_55 = E_IRQEXPH_START + 7,
294 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/messi/
H A DregCHIP.h281 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
282 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
283 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
284 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
285 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
286 #define IRQEXPH_EXT_GPIO6 (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
287 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
288 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
289 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
290 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h275 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
276 E_IRQ_48 = E_IRQEXPH_START + 0,
277 E_IRQ_49 = E_IRQEXPH_START + 1,
278 E_IRQ_50 = E_IRQEXPH_START + 2,
279 E_IRQ_51 = E_IRQEXPH_START + 3,
280 E_IRQ_52 = E_IRQEXPH_START + 4,
281 E_IRQ_53 = E_IRQEXPH_START + 5,
282 E_IRQ_54 = E_IRQEXPH_START + 6,
283 E_IRQ_55 = E_IRQEXPH_START + 7,
284 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/mainz/
H A DregCHIP.h281 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
282 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
283 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
284 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
285 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
286 #define IRQEXPH_EXT_GPIO6 (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
287 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
288 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
289 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
290 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h275 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
276 E_IRQ_48 = E_IRQEXPH_START + 0,
277 E_IRQ_49 = E_IRQEXPH_START + 1,
278 E_IRQ_50 = E_IRQEXPH_START + 2,
279 E_IRQ_51 = E_IRQEXPH_START + 3,
280 E_IRQ_52 = E_IRQEXPH_START + 4,
281 E_IRQ_53 = E_IRQEXPH_START + 5,
282 E_IRQ_54 = E_IRQEXPH_START + 6,
283 E_IRQ_55 = E_IRQEXPH_START + 7,
284 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/manhattan/
H A DregCHIP.h279 …define IRQEXPH_BDMA0 (0x1 << (E_IRQEXPH_BDMA0 - E_IRQEXPH_START) )
280 …define IRQEXPH_BDMA1 (0x1 << (E_IRQEXPH_BDMA1 - E_IRQEXPH_START) )
281 …define IRQEXPH_UART2MCU (0x1 << (E_IRQEXPH_UART2MCU - E_IRQEXPH_START) )
282 …define IRQEXPH_URDMA2MCU (0x1 << (E_IRQEXPH_URDMA2MCU - E_IRQEXPH_START) )
283 …define IRQEXPH_DVI_HDMI_HDCP (0x1 << (E_IRQEXPH_DVI_HDMI_HDCP - E_IRQEXPH_START) )
284 …define IRQEXPH_G3D2MCU (0x1 << (E_IRQEXPH_G3D2MCU - E_IRQEXPH_START) )
285 …define IRQEXPH_CEC_INT_PM (0x1 << (E_IRQEXPH_CEC - E_IRQEXPH_START) )
286 …define IRQEXPH_HDCP_IIC (0x1 << (E_IRQEXPH_HDCP_IIC - E_IRQEXPH_START) )
287 …define IRQEXPH_HDCP_X74 (0x1 << (E_IRQEXPH_HDCP_X74 - E_IRQEXPH_START) )
288 …define IRQEXPH_WADR_ERR (0x1 << (E_IRQEXPH_WADR_ERR - E_IRQEXPH_START) )
[all …]
H A DhalIRQTBL.h285 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
286 E_IRQ_48 = E_IRQEXPH_START + 0,
287 E_IRQ_49 = E_IRQEXPH_START + 1,
288 E_IRQ_50 = E_IRQEXPH_START + 2,
289 E_IRQ_51 = E_IRQEXPH_START + 3,
290 E_IRQ_52 = E_IRQEXPH_START + 4,
291 E_IRQ_53 = E_IRQEXPH_START + 5,
292 E_IRQ_54 = E_IRQEXPH_START + 6,
293 E_IRQ_55 = E_IRQEXPH_START + 7,
294 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DregCHIP.h279 …define IRQEXPH_BDMA0 (0x1 << (E_IRQEXPH_BDMA0 - E_IRQEXPH_START) )
280 …define IRQEXPH_BDMA1 (0x1 << (E_IRQEXPH_BDMA1 - E_IRQEXPH_START) )
281 …define IRQEXPH_UART2MCU (0x1 << (E_IRQEXPH_UART2MCU - E_IRQEXPH_START) )
282 …define IRQEXPH_URDMA2MCU (0x1 << (E_IRQEXPH_URDMA2MCU - E_IRQEXPH_START) )
283 …define IRQEXPH_DVI_HDMI_HDCP (0x1 << (E_IRQEXPH_DVI_HDMI_HDCP - E_IRQEXPH_START) )
284 …define IRQEXPH_G3D2MCU (0x1 << (E_IRQEXPH_G3D2MCU - E_IRQEXPH_START) )
285 …define IRQEXPH_CEC_INT_PM (0x1 << (E_IRQEXPH_CEC - E_IRQEXPH_START) )
286 …define IRQEXPH_HDCP_IIC (0x1 << (E_IRQEXPH_HDCP_IIC - E_IRQEXPH_START) )
287 …define IRQEXPH_HDCP_X74 (0x1 << (E_IRQEXPH_HDCP_X74 - E_IRQEXPH_START) )
288 …define IRQEXPH_WADR_ERR (0x1 << (E_IRQEXPH_WADR_ERR - E_IRQEXPH_START) )
[all …]
H A DhalIRQTBL.h285 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
286 E_IRQ_48 = E_IRQEXPH_START + 0,
287 E_IRQ_49 = E_IRQEXPH_START + 1,
288 E_IRQ_50 = E_IRQEXPH_START + 2,
289 E_IRQ_51 = E_IRQEXPH_START + 3,
290 E_IRQ_52 = E_IRQEXPH_START + 4,
291 E_IRQ_53 = E_IRQEXPH_START + 5,
292 E_IRQ_54 = E_IRQEXPH_START + 6,
293 E_IRQ_55 = E_IRQEXPH_START + 7,
294 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DregCHIP.h285 …define IRQEXPH_BDMA0 (0x1 << (E_IRQEXPH_BDMA0 - E_IRQEXPH_START) )
286 …define IRQEXPH_BDMA1 (0x1 << (E_IRQEXPH_BDMA1 - E_IRQEXPH_START) )
287 …define IRQEXPH_UART2MCU (0x1 << (E_IRQEXPH_UART2MCU - E_IRQEXPH_START) )
288 …define IRQEXPH_URDMA2MCU (0x1 << (E_IRQEXPH_URDMA2MCU - E_IRQEXPH_START) )
289 …define IRQEXPH_DVI_HDMI_HDCP (0x1 << (E_IRQEXPH_DVI_HDMI_HDCP - E_IRQEXPH_START) )
290 …define IRQEXPH_G3D2MCU (0x1 << (E_IRQEXPH_G3D2MCU - E_IRQEXPH_START) )
291 …define IRQEXPH_CEC_INT_PM (0x1 << (E_IRQEXPH_CEC - E_IRQEXPH_START) )
292 …define IRQEXPH_HDCP_IIC (0x1 << (E_IRQEXPH_HDCP_IIC - E_IRQEXPH_START) )
293 …define IRQEXPH_HDCP_X74 (0x1 << (E_IRQEXPH_HDCP_X74 - E_IRQEXPH_START) )
294 …define IRQEXPH_WADR_ERR (0x1 << (E_IRQEXPH_WADR_ERR - E_IRQEXPH_START) )
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DregCHIP.h279 …define IRQEXPH_BDMA0 (0x1 << (E_IRQEXPH_BDMA0 - E_IRQEXPH_START) )
280 …define IRQEXPH_BDMA1 (0x1 << (E_IRQEXPH_BDMA1 - E_IRQEXPH_START) )
281 …define IRQEXPH_UART2MCU (0x1 << (E_IRQEXPH_UART2MCU - E_IRQEXPH_START) )
282 …define IRQEXPH_URDMA2MCU (0x1 << (E_IRQEXPH_URDMA2MCU - E_IRQEXPH_START) )
283 …define IRQEXPH_DVI_HDMI_HDCP (0x1 << (E_IRQEXPH_DVI_HDMI_HDCP - E_IRQEXPH_START) )
284 …define IRQEXPH_G3D2MCU (0x1 << (E_IRQEXPH_G3D2MCU - E_IRQEXPH_START) )
285 …define IRQEXPH_CEC_INT_PM (0x1 << (E_IRQEXPH_CEC - E_IRQEXPH_START) )
286 …define IRQEXPH_HDCP_IIC (0x1 << (E_IRQEXPH_HDCP_IIC - E_IRQEXPH_START) )
287 …define IRQEXPH_HDCP_X74 (0x1 << (E_IRQEXPH_HDCP_X74 - E_IRQEXPH_START) )
288 …define IRQEXPH_WADR_ERR (0x1 << (E_IRQEXPH_WADR_ERR - E_IRQEXPH_START) )
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/curry/
H A DregCHIP.h329 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
330 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
331 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
332 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
333 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
334 #define IRQEXPH_G3D2MCU (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
335 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
336 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
337 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
338 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h304 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
305 E_IRQ_48 = E_IRQEXPH_START + 0,
306 E_IRQ_49 = E_IRQEXPH_START + 1,
307 E_IRQ_50 = E_IRQEXPH_START + 2,
308 E_IRQ_51 = E_IRQEXPH_START + 3,
309 E_IRQ_52 = E_IRQEXPH_START + 4,
310 E_IRQ_53 = E_IRQEXPH_START + 5,
311 E_IRQ_54 = E_IRQEXPH_START + 6,
312 E_IRQ_55 = E_IRQEXPH_START + 7,
313 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k7u/
H A DregCHIP.h329 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
330 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
331 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
332 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
333 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
334 #define IRQEXPH_G3D2MCU (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
335 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
336 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
337 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
338 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h304 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
305 E_IRQ_48 = E_IRQEXPH_START + 0,
306 E_IRQ_49 = E_IRQEXPH_START + 1,
307 E_IRQ_50 = E_IRQEXPH_START + 2,
308 E_IRQ_51 = E_IRQEXPH_START + 3,
309 E_IRQ_52 = E_IRQEXPH_START + 4,
310 E_IRQ_53 = E_IRQEXPH_START + 5,
311 E_IRQ_54 = E_IRQEXPH_START + 6,
312 E_IRQ_55 = E_IRQEXPH_START + 7,
313 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k6lite/
H A DregCHIP.h329 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
330 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
331 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
332 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
333 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
334 #define IRQEXPH_G3D2MCU (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
335 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
336 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
337 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
338 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h304 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
305 E_IRQ_48 = E_IRQEXPH_START + 0,
306 E_IRQ_49 = E_IRQEXPH_START + 1,
307 E_IRQ_50 = E_IRQEXPH_START + 2,
308 E_IRQ_51 = E_IRQEXPH_START + 3,
309 E_IRQ_52 = E_IRQEXPH_START + 4,
310 E_IRQ_53 = E_IRQEXPH_START + 5,
311 E_IRQ_54 = E_IRQEXPH_START + 6,
312 E_IRQ_55 = E_IRQEXPH_START + 7,
313 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k6/
H A DregCHIP.h329 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
330 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
331 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
332 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
333 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
334 #define IRQEXPH_G3D2MCU (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
335 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
336 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
337 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
338 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h304 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
305 E_IRQ_48 = E_IRQEXPH_START + 0,
306 E_IRQ_49 = E_IRQEXPH_START + 1,
307 E_IRQ_50 = E_IRQEXPH_START + 2,
308 E_IRQ_51 = E_IRQEXPH_START + 3,
309 E_IRQ_52 = E_IRQEXPH_START + 4,
310 E_IRQ_53 = E_IRQEXPH_START + 5,
311 E_IRQ_54 = E_IRQEXPH_START + 6,
312 E_IRQ_55 = E_IRQEXPH_START + 7,
313 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/kano/
H A DregCHIP.h329 #define IRQEXPH_BDMA0 (0x01 << (E_IRQ_48 - E_IRQEXPH_START))
330 #define IRQEXPH_BDMA1 (0x01 << (E_IRQ_49 - E_IRQEXPH_START))
331 #define IRQEXPH_UART2MCU (0x01 << (E_IRQ_50 - E_IRQEXPH_START))
332 #define IRQEXPH_URDMA2MCU (0x01 << (E_IRQ_51 - E_IRQEXPH_START))
333 #define IRQEXPH_DVI_HDMI_HDCP (0x01 << (E_IRQ_52 - E_IRQEXPH_START))
334 #define IRQEXPH_G3D2MCU (0x01 << (E_IRQ_53 - E_IRQEXPH_START))
335 #define IRQEXPH_CEC (0x01 << (E_IRQ_54 - E_IRQEXPH_START))
336 #define IRQEXPH_HDCP_IIC (0x01 << (E_IRQ_55 - E_IRQEXPH_START))
337 #define IRQEXPH_HDCP_X74 (0x01 << (E_IRQ_56 - E_IRQEXPH_START))
338 #define IRQEXPH_WADR_ERR (0x01 << (E_IRQ_57 - E_IRQEXPH_START))
[all …]
H A DhalIRQTBL.h304 E_IRQEXPH_START = CONFIG_IRQEXPH_BASE_ADDRESS, enumerator
305 E_IRQ_48 = E_IRQEXPH_START + 0,
306 E_IRQ_49 = E_IRQEXPH_START + 1,
307 E_IRQ_50 = E_IRQEXPH_START + 2,
308 E_IRQ_51 = E_IRQEXPH_START + 3,
309 E_IRQ_52 = E_IRQEXPH_START + 4,
310 E_IRQ_53 = E_IRQEXPH_START + 5,
311 E_IRQ_54 = E_IRQEXPH_START + 6,
312 E_IRQ_55 = E_IRQEXPH_START + 7,
313 E_IRQ_56 = E_IRQEXPH_START + 8,
[all …]

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