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Searched refs:ibase (Results 1 – 9 of 9) sorted by relevance

/rk3399_rockchip-uboot/arch/x86/cpu/
H A Dirq.c29 pirq = readb((uintptr_t)priv->ibase + LINK_N2V(link, base)); in pirq_check_irq_routed()
59 writeb(irq, (uintptr_t)priv->ibase + LINK_N2V(link, base)); in pirq_assign_irq()
146 dm_pci_read_config32(dev->parent, ibase_off, &priv->ibase); in create_pirq_routing_table()
147 priv->ibase &= ~0xf; in create_pirq_routing_table()
237 writel(0, (uintptr_t)priv->ibase + priv->actl_addr); in irq_enable_sci()
/rk3399_rockchip-uboot/doc/device-tree-bindings/misc/
H A Dintel,irq-router.txt14 "ibase": IRQ routing is in the memory-mapped IBASE register block
15 - intel,ibase-offset : IBASE register offset in the interrupt router's PCI
16 configuration space, required only if intel,pirq-config = "ibase".
/rk3399_rockchip-uboot/arch/x86/include/asm/
H A Dirq.h45 u32 ibase; member
/rk3399_rockchip-uboot/arch/x86/dts/
H A Dbaytrail_som-db5800-som-6867.dts130 intel,pirq-config = "ibase";
131 intel,ibase-offset = <0x50>;
H A Dbayleybay.dts107 intel,pirq-config = "ibase";
108 intel,ibase-offset = <0x50>;
H A Dconga-qeval20-qa3-e3845.dts117 intel,pirq-config = "ibase";
118 intel,ibase-offset = <0x50>;
H A Ddfi-bt700.dtsi128 intel,pirq-config = "ibase";
129 intel,ibase-offset = <0x50>;
H A Dminnowmax.dts131 intel,pirq-config = "ibase";
132 intel,ibase-offset = <0x50>;
/rk3399_rockchip-uboot/
H A DMakefile967 …/_image_binary_end/ {end = $$1} END {if (start != "" && end != "") print "ibase=16; " toupper(end)…