| #
dc557e9a |
| 18-Jun-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
6d54868e |
| 23-May-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
| #
d4e61f50 |
| 07-May-2016 |
Bin Meng <bmeng.cn@gmail.com> |
x86: irq: Enable SCI on IRQ9
By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to
x86: irq: Enable SCI on IRQ9
By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
show more ...
|
| #
0bdce075 |
| 20-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: x86: Drop the weak cpu_irq_init() function
There are no callers now. Platforms which need to set up interrupts their own way can implement an interrupt driver. Drop this function.
Signed-off-by
dm: x86: Drop the weak cpu_irq_init() function
There are no callers now. Platforms which need to set up interrupts their own way can implement an interrupt driver. Drop this function.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
d3b884b2 |
| 20-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: x86: Add a common PIRQ init function
Most x86 interrupt drivers will want to use the standard PIRQ routing and table setup. Put this code in a common function so it can be used by those drivers
dm: x86: Add a common PIRQ init function
Most x86 interrupt drivers will want to use the standard PIRQ routing and table setup. Put this code in a common function so it can be used by those drivers that want it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
12d6929e |
| 20-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: x86: Set up interrupt routing from interrupt_init()
At present interrupt routing is set up from arch_misc_init(). We can do it a little later instead, in interrupt_init().
This removes the manu
dm: x86: Set up interrupt routing from interrupt_init()
At present interrupt routing is set up from arch_misc_init(). We can do it a little later instead, in interrupt_init().
This removes the manual pirq_init() call. Where the platform does not have an interrupt router defined in its device tree, no error is generated. Some platforms do not have this.
Drop pirq_init() since it is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
632093b5 |
| 14-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
| #
7e4be120 |
| 10-Aug-2015 |
Simon Glass <sjg@chromium.org> |
x86: Allow pirq_init() to return an error
This function can fail. In this case we should return the error rather than swallowing it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin M
x86: Allow pirq_init() to return an error
This function can fail. In this case we should return the error rather than swallowing it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
6f43ba70 |
| 07-Jul-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
|
| #
9c7dea60 |
| 25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memor
x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|