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1f4e2578 |
| 18-Jul-2017 |
Stefan Roese <sr@denx.de> |
x86: dfi-bt700: Add xHCI USB support
Change from EHCI to xHCI on the DFI BayTrail SoM.
The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For correct operation, it needs to get reset
x86: dfi-bt700: Add xHCI USB support
Change from EHCI to xHCI on the DFI BayTrail SoM.
The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For correct operation, it needs to get reset upon power-up. Otherwise it may happen that the hub is not detected after a software reboot. This patch also configures this GPIO in the dts for correct operation.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
f0a1ad46 |
| 05-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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| #
f8f291b0 |
| 31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
5e74e5a6 |
| 31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings
Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers.
Signed-off-by: Bin Men
x86: baytrail: Use macros instead of magic numbers for FSP settings
Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
455a5a80 |
| 31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1
The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid.
Signed-off-by: Bin Meng
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1
The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
ae1b9399 |
| 17-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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| #
770ee017 |
| 08-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: ich6_gpio: Add use-lvl-write-cache for I/O access mode
Add a device-tree property use-lvl-write-cache that will cause writes to lvl to be cached instead of read from lvl before each write. This
x86: ich6_gpio: Add use-lvl-write-cache for I/O access mode
Add a device-tree property use-lvl-write-cache that will cause writes to lvl to be cached instead of read from lvl before each write. This is required on some platforms that have the register implemented as dual read/write (such as Baytrail).
Prior to this fix the blue USB port on the Minnowboard Max was unusable since USB_HOST_EN0 was set high then immediately set low when USB_HOST_EN1 was written.
This also resolves the 'gpio clear | set' command warning like: "Warning: value of pin is still 0"
Signed-off-by: George McCollister <george.mccollister@gmail.com> <rebased on latest origin/master, fixed all baytrail boards> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
793fd86f |
| 16-Aug-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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| #
b1ad6c69 |
| 15-Aug-2016 |
Stefan Roese <sr@denx.de> |
x86: Add DFI BT700 BayTrail board support
This patch adds support for the DFI BayTrail BT700 QSeven SoM installed on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton NCT6102D Su
x86: Add DFI BT700 BayTrail board support
This patch adds support for the DFI BayTrail BT700 QSeven SoM installed on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton NCT6102D Super IO chip providing the UART as console.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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