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Searched refs:DCLK_VOP0 (Results 1 – 14 of 14) sorted by relevance

/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Drk3288-cru.h95 #define DCLK_VOP0 190 macro
H A Drk3528-cru.h277 #define DCLK_VOP0 341 macro
H A Drk3399-cru.h132 #define DCLK_VOP0 180 macro
H A Drk3568-cru.h286 #define DCLK_VOP0 223 macro
H A Drk3588-cru.h624 #define DCLK_VOP0 628 macro
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3288.c487 case DCLK_VOP0: in rockchip_vop_set_clk()
1186 case DCLK_VOP0: in rk3288_clk_set_rate()
1424 case DCLK_VOP0: in rk3288_vop_set_parent()
1444 case DCLK_VOP0: in rk3288_clk_set_parent()
H A Dclk_rk3528.c1057 case DCLK_VOP0: in rk3528_dclk_vop_get_clk()
1099 case DCLK_VOP0: in rk3528_dclk_vop_set_clk()
1403 case DCLK_VOP0: in rk3528_clk_get_rate()
1521 case DCLK_VOP0: in rk3528_clk_set_rate()
1573 case DCLK_VOP0: in rk3528_clk_set_parent()
H A Dclk_rk3588.c1067 case DCLK_VOP0: in rk3588_dclk_vop_get_clk()
1118 case DCLK_VOP0: in rk3588_dclk_vop_set_clk()
1651 case DCLK_VOP0: in rk3588_clk_get_rate()
1804 case DCLK_VOP0: in rk3588_clk_set_rate()
1995 case DCLK_VOP0: in rk3588_dclk_vop_set_parent()
2037 case DCLK_VOP0: in rk3588_clk_set_parent()
H A Dclk_rk3568.c1787 case DCLK_VOP0: in rk3568_dclk_vop_get_clk()
1828 case DCLK_VOP0: in rk3568_dclk_vop_set_clk()
2616 case DCLK_VOP0: in rk3568_clk_get_rate()
2802 case DCLK_VOP0: in rk3568_clk_set_rate()
3109 case DCLK_VOP0: in rk3568_dclk_vop_set_parent()
3217 case DCLK_VOP0: in rk3568_clk_set_parent()
H A Dclk_rk3399.c757 case DCLK_VOP0: in rk3399_vop_set_clk()
1180 case DCLK_VOP0: in rk3399_clk_get_rate()
1267 case DCLK_VOP0: in rk3399_clk_set_rate()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3288.dtsi719 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
1617 <&cru DCLK_VOP0>,
H A Drk3528.dtsi1005 <&cru DCLK_VOP0>,
1011 assigned-clocks = <&cru DCLK_VOP0>;
H A Drk3399.dtsi1554 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
H A Drk3568.dtsi1242 clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;