Searched refs:odt (Results 1 – 11 of 11) sorted by relevance
100 unsigned int odt[4]; member
816 debug("odt[%d] = 0x%x\n", i, input->odt[i]); in phy_gen2_init_input()891 msg_blk->acsm_odt_ctrl0 = input->odt[0]; in phy_gen2_msg_init()892 msg_blk->acsm_odt_ctrl1 = input->odt[1]; in phy_gen2_msg_init()893 msg_blk->acsm_odt_ctrl2 = input->odt[2]; in phy_gen2_msg_init()894 msg_blk->acsm_odt_ctrl3 = input->odt[3]; in phy_gen2_msg_init()2309 unsigned int *odt) in parse_odt() argument2320 odt[i] |= (1 << i) << shift; in parse_odt()2330 odt[j] |= (1 << i) << shift; in parse_odt()2334 odt[i] |= (1 << i) << 4; in parse_odt()2342 odt[j] |= (1 << i) << shift; in parse_odt()[all …]
147 popts->odt = U(60); in ddr_board_options()157 popts->odt = U(48); in ddr_board_options()
113 unsigned int odt; member
145 unsigned char odt; member
51 uint32_t odt; member218 ptiming_config->odt = (mmio_read_32(PHY_REG(0, 5)) >> 16) & 0x1; in sdram_timing_cfg_init()638 if (timing_config->odt) { in gen_rk3399_ctl_params_f0()887 if (timing_config->odt) { in gen_rk3399_ctl_params_f1()1930 rk3399_dram_status.timing_config.odt = arg2 & 0x1; in dram_set_odt_pd()1992 if (rk3399_dram_status.timing_config.odt == 1) in prepare_ddr_timing()2041 if (rk3399_dram_status.timing_config.odt == 0) in ddr_set_rate()2075 rk3399_suspend_status.odt = rk3399_dram_status.timing_config.odt; in ddr_prepare_for_sys_suspend()2077 rk3399_dram_status.timing_config.odt = 1; in ddr_prepare_for_sys_suspend()2100 rk3399_dram_status.timing_config.odt = rk3399_suspend_status.odt; in ddr_prepare_for_sys_resume()[all …]
197 uint32_t odt; member
249 if (timing_config->odt) in ddr3_get_parameter()739 if (timing_config->odt) in lpddr3_get_parameter()1107 if (timing_config->odt) { in lpddr4_get_parameter()
721 sdram_params->odt = (((mmio_read_32(PHY_REG(0, 5)) >> 16) & in dmc_suspend()
278 popts->odt = U(60); in ddr_board_options()288 popts->odt = U(48); in ddr_board_options()
278 popts->odt = 60U; in ddr_board_options()288 popts->odt = 60U; in ddr_board_options()