Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration

* changes:
fix(layerscape): unlock write access SMMU_CBn_ACTLR
fix(nxp-ddr): add checking return value
fea

Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration

* changes:
fix(layerscape): unlock write access SMMU_CBn_ACTLR
fix(nxp-ddr): add checking return value
feat(lx2): enable OCRAM ECC
fix(nxp-tools): fix coverity issue
fix(nxp-ddr): fix coverity issue
fix(nxp-ddr): fix underrun coverity issue
fix(nxp-drivers): fix sd secure boot failure
feat(lx2): support more variants
fix(lx2): init global data before using it
fix(ls1046a): 4 keys secureboot failure resolved
fix(nxp-crypto): fix secure boot assert inclusion
fix(nxp-crypto): fix coverity issue
fix(nxp-drivers): fix fspi coverity issue
fix(nxp-drivers): fix tzc380 memory regions config
fix(layerscape): fix nv_storage assert checking
fix(nxp-ddr): apply Max CDD values for warm boot
fix(nxp-ddr): use CDDWW for write to read delay
fix(layerscape): fix errata a008850

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fix(nxp-ddr): add checking return value

Coverity Issue 21268351
Fixed unused value of xspi read while reading training values from
xspi during warm reset.

Signed-off-by: Maninder Singh <maninder.si

fix(nxp-ddr): add checking return value

Coverity Issue 21268351
Fixed unused value of xspi read while reading training values from
xspi during warm reset.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I779587afedb1c73d174a132bbfbcb21bf45bdff8

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fix(nxp-ddr): fix coverity issue

Fixed coverity issue for "shifting by a negtive value", returned
before go to the next shifting code.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I001

fix(nxp-ddr): fix coverity issue

Fixed coverity issue for "shifting by a negtive value", returned
before go to the next shifting code.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I00171b057b8948cb9e9ec5d9405b2e32aba568fb

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fix(nxp-ddr): apply Max CDD values for warm boot

Timing CFG 0 and Timing CFG 4 are ddr controller registers that
have been affected by 1d phy training during cold boot. They are
needed to be stored

fix(nxp-ddr): apply Max CDD values for warm boot

Timing CFG 0 and Timing CFG 4 are ddr controller registers that
have been affected by 1d phy training during cold boot. They are
needed to be stored and restored along with phy training values.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I29c55256e74456515aaeb098e2e0e3475697a466

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fix(nxp-ddr): use CDDWW for write to read delay

we need to apply the value of CDD write to write for the write to
read CDD delay calculations. Since the current implementation always
provide a negat

fix(nxp-ddr): use CDDWW for write to read delay

we need to apply the value of CDD write to write for the write to
read CDD delay calculations. Since the current implementation always
provide a negative value of CDDwr so a value of zero was selected.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6829997d2ea6ba6cddaaab8332b82b8c66752d7e

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Merge "fix(nxp-ddr): fix firmware buffer re-mapping issue" into integration

fix(nxp-ddr): fix firmware buffer re-mapping issue

Firmware buffer has already been mapped when loading 1D firmware,
so the same buffer address will be re-mapped when loading 2D
firmware. Move the b

fix(nxp-ddr): fix firmware buffer re-mapping issue

Firmware buffer has already been mapped when loading 1D firmware,
so the same buffer address will be re-mapped when loading 2D
firmware. Move the buffer mapping to be out of load_fw().

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idb29d504bc482a1e7ca58bc51bec09ffe6068324

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Merge changes I84e257b3,I1317e482 into integration

* changes:
fix(layerscape): fix coverity issue
fix(nxp-ddr): fix coverity issue

fix(nxp-ddr): fix coverity issue

Check return value of mmap_add_dynamic_region().

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1317e4822f3da329185d54005f08047872b5cdce

Merge changes from topics "ls1088a", "ls1088a-prepare" into integration

* changes:
docs(layerscape): add ls1088a soc and board support
feat(ls1088aqds): add ls1088aqds board support
feat(ls108

Merge changes from topics "ls1088a", "ls1088a-prepare" into integration

* changes:
docs(layerscape): add ls1088a soc and board support
feat(ls1088aqds): add ls1088aqds board support
feat(ls1088ardb): add ls1088ardb board support
feat(ls1088a): add new SoC platform ls1088a
build(changelog): add new scopes for ls1088a
feat(bl2): add support to separate no-loadable sections
refactor(layerscape): refine comparison of inerconnection
feat(layerscape): add soc helper macro definition for chassis 3
feat(nxp-gic): add some macros definition for gicv3
feat(layerscape): add CHASSIS 3 support for tbbr
feat(layerscape): define more chassis 3 hardware address
feat(nxp-crypto): add chassis 3 support
feat(nxp-dcfg): add Chassis 3 support
feat(lx2): enable DDR erratas for lx2 platforms
feat(layerscape): print DDR errata information
feat(nxp-ddr): add workaround for errata A050958
feat(layerscape): add new soc errata a010539 support
feat(layerscape): add new soc errata a009660 support
feat(nxp-ddr): add rawcard 1F support
fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically
fix(nxp-tools): fix create_pbl print log
build(changelog): add new scopes for NXP driver

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feat(nxp-ddr): add workaround for errata A050958

Set the receiver gain to max value to recover
cold temp marginality issue for phy-gen2

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-b

feat(nxp-ddr): add workaround for errata A050958

Set the receiver gain to max value to recover
cold temp marginality issue for phy-gen2

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If639fa3ed404cf6e1b8abcc2b7137db1fdd0b2c2

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Merge changes I3c20611a,Ib1671011,I5eab3f33,Ib149b3ea into integration

* changes:
refactor(plat/nxp): refine api to read SVR register
refactor(plat/nxp): each errata use a seperate source file

Merge changes I3c20611a,Ib1671011,I5eab3f33,Ib149b3ea into integration

* changes:
refactor(plat/nxp): refine api to read SVR register
refactor(plat/nxp): each errata use a seperate source file
refactor(plat/nxp): use a unified errata api
refactor(plat/soc-lx2160): move errata to common directory

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refactor(plat/nxp): refine api to read SVR register

1. Refined struct soc_info_t definition.
2. Refined get_soc_info function.
3. Fixed some SVR persernality value.
4. Refined API to get cluster num

refactor(plat/nxp): refine api to read SVR register

1. Refined struct soc_info_t definition.
2. Refined get_soc_info function.
3. Fixed some SVR persernality value.
4. Refined API to get cluster numbers and cores per cluster.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3c20611a523516cc63330dce4c925e6cda1e93c4

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Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration

* changes:
nxp lx2160a-aqds: new plat based on soc lx2160a
NXP lx2160a-rdb: new plat based on SoC lx2160a

Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration

* changes:
nxp lx2160a-aqds: new plat based on soc lx2160a
NXP lx2160a-rdb: new plat based on SoC lx2160a
nxp lx2162aqds: new plat based on soc lx2160a
nxp: errata handling at soc level for lx2160a
nxp: make file for loading additional ddr image
nxp: adding support of soc lx2160a
nxp: deflt hdr files for soc & their platforms
nxp: platform files for bl2 and bl31 setup
nxp: warm reset support to retain ddr content
nxp: nv storage api on platforms
nxp: supports two mode of trusted board boot
nxp: fip-handler for additional fip_fuse.bin
nxp: fip-handler for additional ddr-fip.bin
nxp: image loader for loading fip image
nxp: svp & sip smc handling
nxp: psci platform functions used by lib/psci
nxp: helper function used by plat & common code
nxp: add data handler used by bl31
nxp: adding the driver.mk file
nxp-tool: for creating pbl file from bl2
nxp: adding the smmu driver
nxp: cot using nxp internal and mbedtls
nxp:driver for crypto h/w accelerator caam
nxp:add driver support for sd and emmc
nxp:add qspi driver
nxp: add flexspi driver support
nxp: adding gic apis for nxp soc
nxp: gpio driver support
nxp: added csu driver
nxp: driver pmu for nxp soc
nxp: ddr driver enablement for nxp layerscape soc
nxp: i2c driver support.
NXP: Driver for NXP Security Monitor
NXP: SFP driver support for NXP SoC
NXP: Interconnect API based on ARM CCN-CCI driver
NXP: TZC API to configure ddr region
NXP: Timer API added to enable ARM generic timer
nxp: add dcfg driver
nxp:add console driver for nxp platform
tools: add mechanism to allow platform specific image UUID
tbbr-cot: conditional definition for the macro
tbbr-cot: fix the issue of compiling time define
cert_create: updated tool for platform defined certs, keys & extensions
tbbr-tools: enable override TRUSTED_KEY_CERT

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nxp: ddr driver enablement for nxp layerscape soc

DDR driver for NXP layerscape SoC(s):
- lx2160aqds
- lx2162aqds
- lx2160ardb
- Other Board with SoC(s) like ls1046a, ls1043a etc;
-- These othe

nxp: ddr driver enablement for nxp layerscape soc

DDR driver for NXP layerscape SoC(s):
- lx2160aqds
- lx2162aqds
- lx2160ardb
- Other Board with SoC(s) like ls1046a, ls1043a etc;
-- These other boards are not verified yet.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ic84a63cb30eba054f432d479862cd4d1097cbbaf

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