History log of /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/suspend.c (Results 1 – 25 of 33)
Revision Date Author Comments
# 4bd8c929 09-May-2023 Manish Pandey <manish.pandey2@arm.com>

Merge changes I1bfa797e,I0ec7a70e into integration

* changes:
fix(tree): correct some typos
fix(rockchip): use semicolon instead of comma


# 1b491eea 13-Feb-2023 Elyes Haouas <ehaouas@noos.fr>

fix(tree): correct some typos

found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6

fix(tree): correct some typos

found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373

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# 7fb82d82 27-Jul-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(rk3399/suspend): correct LPDDR4 resume sequence" into integration


# 2c4b0c05 29-Jun-2020 Jimmy Brisson <jimmy.brisson@arm.com>

fix(rk3399/suspend): correct LPDDR4 resume sequence

This change adds 208 bytes to PMUSRAM, pushing the end of text from
0xff3b0de0 to 0xff3b0eb0, which is still shy of the maximum
0xff3b1000.

Furth

fix(rk3399/suspend): correct LPDDR4 resume sequence

This change adds 208 bytes to PMUSRAM, pushing the end of text from
0xff3b0de0 to 0xff3b0eb0, which is still shy of the maximum
0xff3b1000.

Further, this skips enabling the watchdog when it's not being used
elsewhere, as you can't turn the watchdog off.

Change-Id: I2e6fa3c7e01f2be6b32ce04ce479edf64e278554
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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# d0d0f171 16-Jul-2019 Soby Mathew <soby.mathew@arm.com>

Merge changes from topic "jc/shift-overflow" into integration

* changes:
Enable -Wshift-overflow=2 to check for undefined shift behavior
Update base code to not rely on undefined overflow behavi

Merge changes from topic "jc/shift-overflow" into integration

* changes:
Enable -Wshift-overflow=2 to check for undefined shift behavior
Update base code to not rely on undefined overflow behaviour
Update hisilicon drivers to not rely on undefined overflow behaviour
Update synopsys drivers to not rely on undefined overflow behaviour
Update imx platform to not rely on undefined overflow behaviour
Update mediatek platform to not rely on undefined overflow behaviour
Update layerscape platform to not rely on undefined overflow behaviour
Update intel platform to not rely on undefined overflow behaviour
Update rockchip platform to not rely on undefined overflow behaviour
Update renesas platform to not rely on undefined overflow behaviour
Update meson platform to not rely on undefined overflow behaviour
Update marvell platform to not rely on undefined overflow behaviour

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# 79ca7807 03-Jul-2019 Justin Chadwell <justin.chadwell@arm.com>

Update rockchip platform to not rely on undefined overflow behaviour

This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

C

Update rockchip platform to not rely on undefined overflow behaviour

This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>

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# 9a207532 04-Jan-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase


# 09d40e0e 14-Dec-2018 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# a54616a6 17-May-2018 Dimitris Papastamos <dimitris.papastamos@arm.com>

Merge pull request #1384 from rockchip-linux/for_m0_patch

for rk3399 suspend/resume


# 5b886432 23-Apr-2018 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Add watchdog support in pmusram

To catch early hangs in resume, this sets up the watchdog before
anything else in the pmusram code (ignoring setting up the stack...).
This uses hard

rockchip/rk3399: Add watchdog support in pmusram

To catch early hangs in resume, this sets up the watchdog before
anything else in the pmusram code (ignoring setting up the stack...).
This uses hard coded settings for the watchdog until the proper
watchdog restore later on in the firmware/kernel.

This also restores the old watchdog register values before the PLLs
are restored to make sure we don't temporarily switch over to a 1/3s
timeout on the watchdog when the pclk_wdt goes from 4MHz to 100MHz.

Change-Id: I8f7652089a88783271b17482117b4609330abe80
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# a8d9550b 26-Apr-2018 Dimitris Papastamos <dimitris.papastamos@arm.com>

Merge pull request #1345 from dbasehore/udelay

rockchip/rk3399: Fix sram_udelay


# 3cb74922 06-Apr-2018 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Fix sram_udelay

This fixes an off by 576x bug the the sram_udelay code. The wrong
value was multipled by the system ticks per mhz value (which is 24),
so we delayed for 1/576th of t

rockchip/rk3399: Fix sram_udelay

This fixes an off by 576x bug the the sram_udelay code. The wrong
value was multipled by the system ticks per mhz value (which is 24),
so we delayed for 1/576th of the requested time.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# 6328f76b 29-Aug-2017 danh-arm <dan.handley@arm.com>

Merge pull request #1070 from rockchip-linux/rk3399-fixes-logic

rockchip/rk3399: Support Turning off VD_LOGIC during suspend-to-ram


# a7bb3388 27-May-2017 Lin Huang <hl@rock-chips.com>

rockchip/rk3399: do secure timer init in pmusram

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc1

rockchip/rk3399: do secure timer init in pmusram

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc197f56223e6fff9167556c1c5e3bc
Signed-off-by: Lin Huang <hl@rock-chips.com>

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# 4c3770d9 26-May-2017 Lin Huang <hl@rock-chips.com>

rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id5

rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id54a7944f33d01a8f244cee6a8a0707bfe4d42da
Signed-off-by: Lin Huang <hl@rock-chips.com>

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# 9aadf25c 17-May-2017 Lin Huang <hl@rock-chips.com>

rockchip/rk3399: set ddr clock source back to dpll when ddr resume

when logic power rail shutdown, CRU register will back to reset
value, ddr use abpll as clock source when do suspend, we need to sa

rockchip/rk3399: set ddr clock source back to dpll when ddr resume

when logic power rail shutdown, CRU register will back to reset
value, ddr use abpll as clock source when do suspend, we need to save
and dpll value in pmusram, then set back these ddr clock back to dpll
when dddr resume.

Change-Id: I95dc0173649e8515859cfa46b40a606e0cc2fe3f
Signed-off-by: Lin Huang <hl@rock-chips.com>

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# aa965e15 20-Jul-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1029 from islmit01/im/fix_includes

Fix order of includes


# ee1ebbd1 14-Jul-2017 Isla Mitchell <isla.mitchell@arm.com>

Fix order of remaining platform #includes

This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupi

Fix order of remaining platform #includes

This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupings and where there are headers within #if statements.

Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>

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# c906d2a8 08-Jun-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #967 from rockchip-linux/rockchip-cleanup-20170606

RK3399: Shrink M0 SRAM code to fit in PMUSRAM


# af27fb89 16-May-2017 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Move DRAM restore to PMUSRAM

This moves the DRAM restore code to PMUSRAM. This is so that the
voltage domain that contains the SRAM that it was stored in before may
be turned off du

rockchip/rk3399: Move DRAM restore to PMUSRAM

This moves the DRAM restore code to PMUSRAM. This is so that the
voltage domain that contains the SRAM that it was stored in before may
be turned off during system suspend.

Change-Id: Id761181a30caadd12f1ce061d1034f3159a76d28
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# c82eef6c 13-May-2017 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: convert to for-loops to save code space

This converts two functions to use for-loops. This saves a bit of
space to help moving DRAM resume code to PMUSRAM.

Change-Id: Ie6ca490cf50c

rockchip/rk3399: convert to for-loops to save code space

This converts two functions to use for-loops. This saves a bit of
space to help moving DRAM resume code to PMUSRAM.

Change-Id: Ie6ca490cf50c2ec83335cf1845b337c3e8a47496
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# 87aad734 11-May-2017 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Remove unneeded if statement

The removed if statement would make the same check that the for loop
it is in does to break out of the for loop, so it doesn't make any
sense to keep it

rockchip/rk3399: Remove unneeded if statement

The removed if statement would make the same check that the for loop
it is in does to break out of the for loop, so it doesn't make any
sense to keep it there.

Change-Id: I819c29f9182e6de1fc47e418aed15ad38e8f9fa9
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# 18f705fa 11-May-2017 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Remove unneeded register sets

This removes the mmio_... function calls to set the multicast bit for
the PHY registers when overriding the write leveling values. These are
not needed

rockchip/rk3399: Remove unneeded register sets

This removes the mmio_... function calls to set the multicast bit for
the PHY registers when overriding the write leveling values. These are
not needed since multicast is set by default when calling the
function, and it's also better not to leave the side effect of
disabling multicast when exiting the function.

Change-Id: I83e089a2a2d55268b3832f36724c3b2c4be81082
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# 7d1b3f5a 07-May-2017 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: remove unneeded DDR restore function

This removes the phy_dll_bypass_set function as it is unneeded. The
values that function sets are saved during suspend, so the proper
values wil

rockchip/rk3399: remove unneeded DDR restore function

This removes the phy_dll_bypass_set function as it is unneeded. The
values that function sets are saved during suspend, so the proper
values will be restored on resume.

Change-Id: I17542206c56e639ce8cb6375233145167441d4e2
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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# 60400fc8 06-May-2017 Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Save space for DRAM suspend data

This removes the space allocation for the unused PHY register space.
For instance in PHY registers 0-127, only 0-90 are used, so don't save
the 91-1

rockchip/rk3399: Save space for DRAM suspend data

This removes the space allocation for the unused PHY register space.
For instance in PHY registers 0-127, only 0-90 are used, so don't save
the 91-127 registers. This saves about 1.6KB of space.

Change-Id: I0c9f6d9bed8f0c1f3b8b805dfb10cf0c06208919
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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